1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2011-2013
4 * Texas Instruments, <www.ti.com>
5 */
6
7 #include <common.h>
8 #include <i2c.h>
9 #include <power/tps65910.h>
10
11 /*
12 * tps65910_set_i2c_control() - Set the TPS65910 to be controlled via the I2C
13 * interface.
14 * @return: 0 on success, not 0 on failure
15 */
tps65910_set_i2c_control(void)16 int tps65910_set_i2c_control(void)
17 {
18 int ret;
19 uchar buf;
20
21 /* VDD1/2 voltage selection register access by control i/f */
22 ret = i2c_read(TPS65910_CTRL_I2C_ADDR, TPS65910_DEVCTRL_REG, 1,
23 &buf, 1);
24
25 if (ret)
26 return ret;
27
28 buf |= TPS65910_DEVCTRL_REG_SR_CTL_I2C_SEL_CTL_I2C;
29
30 return i2c_write(TPS65910_CTRL_I2C_ADDR, TPS65910_DEVCTRL_REG, 1,
31 &buf, 1);
32 }
33
34 /*
35 * tps65910_voltage_update() - Voltage switching for MPU frequency switching.
36 * @module: mpu - 0, core - 1
37 * @vddx_op_vol_sel: vdd voltage to set
38 * @return: 0 on success, not 0 on failure
39 */
tps65910_voltage_update(unsigned int module,unsigned char vddx_op_vol_sel)40 int tps65910_voltage_update(unsigned int module, unsigned char vddx_op_vol_sel)
41 {
42 uchar buf;
43 unsigned int reg_offset;
44 int ret;
45
46 if (module == MPU)
47 reg_offset = TPS65910_VDD1_OP_REG;
48 else
49 reg_offset = TPS65910_VDD2_OP_REG;
50
51 /* Select VDDx OP */
52 ret = i2c_read(TPS65910_CTRL_I2C_ADDR, reg_offset, 1, &buf, 1);
53 if (ret)
54 return ret;
55
56 buf &= ~TPS65910_OP_REG_CMD_MASK;
57
58 ret = i2c_write(TPS65910_CTRL_I2C_ADDR, reg_offset, 1, &buf, 1);
59 if (ret)
60 return ret;
61
62 /* Configure VDDx OP Voltage */
63 ret = i2c_read(TPS65910_CTRL_I2C_ADDR, reg_offset, 1, &buf, 1);
64 if (ret)
65 return ret;
66
67 buf &= ~TPS65910_OP_REG_SEL_MASK;
68 buf |= vddx_op_vol_sel;
69
70 ret = i2c_write(TPS65910_CTRL_I2C_ADDR, reg_offset, 1, &buf, 1);
71 if (ret)
72 return ret;
73
74 ret = i2c_read(TPS65910_CTRL_I2C_ADDR, reg_offset, 1, &buf, 1);
75 if (ret)
76 return ret;
77
78 if ((buf & TPS65910_OP_REG_SEL_MASK) != vddx_op_vol_sel)
79 return 1;
80
81 return 0;
82 }
83