1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2011-2015 Vladimir Zapolskiy <vz@mleia.com>
4 */
5
6 #include <common.h>
7 #include <dm.h>
8 #include <serial.h>
9 #include <dm/platform_data/lpc32xx_hsuart.h>
10
11 #include <asm/arch/uart.h>
12 #include <linux/compiler.h>
13
14 struct lpc32xx_hsuart_priv {
15 struct hsuart_regs *hsuart;
16 };
17
lpc32xx_serial_setbrg(struct udevice * dev,int baudrate)18 static int lpc32xx_serial_setbrg(struct udevice *dev, int baudrate)
19 {
20 struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
21 struct hsuart_regs *hsuart = priv->hsuart;
22 u32 div;
23
24 /* UART rate = PERIPH_CLK / ((HSU_RATE + 1) x 14) */
25 div = (get_serial_clock() / 14 + baudrate / 2) / baudrate - 1;
26 if (div > 255)
27 div = 255;
28
29 writel(div, &hsuart->rate);
30
31 return 0;
32 }
33
lpc32xx_serial_getc(struct udevice * dev)34 static int lpc32xx_serial_getc(struct udevice *dev)
35 {
36 struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
37 struct hsuart_regs *hsuart = priv->hsuart;
38
39 if (!(readl(&hsuart->level) & HSUART_LEVEL_RX))
40 return -EAGAIN;
41
42 return readl(&hsuart->rx) & HSUART_RX_DATA;
43 }
44
lpc32xx_serial_putc(struct udevice * dev,const char c)45 static int lpc32xx_serial_putc(struct udevice *dev, const char c)
46 {
47 struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
48 struct hsuart_regs *hsuart = priv->hsuart;
49
50 /* Wait for empty FIFO */
51 if (readl(&hsuart->level) & HSUART_LEVEL_TX)
52 return -EAGAIN;
53
54 writel(c, &hsuart->tx);
55
56 return 0;
57 }
58
lpc32xx_serial_pending(struct udevice * dev,bool input)59 static int lpc32xx_serial_pending(struct udevice *dev, bool input)
60 {
61 struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
62 struct hsuart_regs *hsuart = priv->hsuart;
63
64 if (input) {
65 if (readl(&hsuart->level) & HSUART_LEVEL_RX)
66 return 1;
67 } else {
68 if (readl(&hsuart->level) & HSUART_LEVEL_TX)
69 return 1;
70 }
71
72 return 0;
73 }
74
lpc32xx_serial_init(struct hsuart_regs * hsuart)75 static int lpc32xx_serial_init(struct hsuart_regs *hsuart)
76 {
77 /* Disable hardware RTS and CTS flow control, set up RX and TX FIFO */
78 writel(HSUART_CTRL_TMO_16 | HSUART_CTRL_HSU_OFFSET(20) |
79 HSUART_CTRL_HSU_RX_TRIG_32 | HSUART_CTRL_HSU_TX_TRIG_0,
80 &hsuart->ctrl);
81
82 return 0;
83 }
84
lpc32xx_hsuart_probe(struct udevice * dev)85 static int lpc32xx_hsuart_probe(struct udevice *dev)
86 {
87 struct lpc32xx_hsuart_platdata *platdata = dev_get_platdata(dev);
88 struct lpc32xx_hsuart_priv *priv = dev_get_priv(dev);
89
90 priv->hsuart = (struct hsuart_regs *)platdata->base;
91
92 lpc32xx_serial_init(priv->hsuart);
93
94 return 0;
95 }
96
97 static const struct dm_serial_ops lpc32xx_hsuart_ops = {
98 .setbrg = lpc32xx_serial_setbrg,
99 .getc = lpc32xx_serial_getc,
100 .putc = lpc32xx_serial_putc,
101 .pending = lpc32xx_serial_pending,
102 };
103
104 U_BOOT_DRIVER(lpc32xx_hsuart) = {
105 .name = "lpc32xx_hsuart",
106 .id = UCLASS_SERIAL,
107 .probe = lpc32xx_hsuart_probe,
108 .ops = &lpc32xx_hsuart_ops,
109 .priv_auto_alloc_size = sizeof(struct lpc32xx_hsuart_priv),
110 .flags = DM_FLAG_PRE_RELOC,
111 };
112