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1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2009 SAMSUNG Electronics
4  * Minkyu Kang <mk7.kang@samsung.com>
5  * Heungjun Kim <riverful.kim@samsung.com>
6  *
7  * based on drivers/serial/s3c64xx.c
8  */
9 
10 #include <common.h>
11 #include <dm.h>
12 #include <errno.h>
13 #include <fdtdec.h>
14 #include <linux/compiler.h>
15 #include <asm/io.h>
16 #include <asm/arch/clk.h>
17 #include <asm/arch/uart.h>
18 #include <serial.h>
19 #include <clk.h>
20 
21 DECLARE_GLOBAL_DATA_PTR;
22 
23 #define RX_FIFO_COUNT_SHIFT	0
24 #define RX_FIFO_COUNT_MASK	(0xff << RX_FIFO_COUNT_SHIFT)
25 #define RX_FIFO_FULL		(1 << 8)
26 #define TX_FIFO_COUNT_SHIFT	16
27 #define TX_FIFO_COUNT_MASK	(0xff << TX_FIFO_COUNT_SHIFT)
28 #define TX_FIFO_FULL		(1 << 24)
29 
30 /* Information about a serial port */
31 struct s5p_serial_platdata {
32 	struct s5p_uart *reg;  /* address of registers in physical memory */
33 	u8 port_id;     /* uart port number */
34 };
35 
36 /*
37  * The coefficient, used to calculate the baudrate on S5P UARTs is
38  * calculated as
39  * C = UBRDIV * 16 + number_of_set_bits_in_UDIVSLOT
40  * however, section 31.6.11 of the datasheet doesn't recomment using 1 for 1,
41  * 3 for 2, ... (2^n - 1) for n, instead, they suggest using these constants:
42  */
43 static const int udivslot[] = {
44 	0,
45 	0x0080,
46 	0x0808,
47 	0x0888,
48 	0x2222,
49 	0x4924,
50 	0x4a52,
51 	0x54aa,
52 	0x5555,
53 	0xd555,
54 	0xd5d5,
55 	0xddd5,
56 	0xdddd,
57 	0xdfdd,
58 	0xdfdf,
59 	0xffdf,
60 };
61 
s5p_serial_init(struct s5p_uart * uart)62 static void __maybe_unused s5p_serial_init(struct s5p_uart *uart)
63 {
64 	/* enable FIFOs, auto clear Rx FIFO */
65 	writel(0x3, &uart->ufcon);
66 	writel(0, &uart->umcon);
67 	/* 8N1 */
68 	writel(0x3, &uart->ulcon);
69 	/* No interrupts, no DMA, pure polling */
70 	writel(0x245, &uart->ucon);
71 }
72 
s5p_serial_baud(struct s5p_uart * uart,uint uclk,int baudrate)73 static void __maybe_unused s5p_serial_baud(struct s5p_uart *uart, uint uclk,
74 					   int baudrate)
75 {
76 	u32 val;
77 
78 	val = uclk / baudrate;
79 
80 	writel(val / 16 - 1, &uart->ubrdiv);
81 
82 	if (s5p_uart_divslot())
83 		writew(udivslot[val % 16], &uart->rest.slot);
84 	else
85 		writeb(val % 16, &uart->rest.value);
86 }
87 
88 #ifndef CONFIG_SPL_BUILD
s5p_serial_setbrg(struct udevice * dev,int baudrate)89 int s5p_serial_setbrg(struct udevice *dev, int baudrate)
90 {
91 	struct s5p_serial_platdata *plat = dev->platdata;
92 	struct s5p_uart *const uart = plat->reg;
93 	u32 uclk;
94 
95 #ifdef CONFIG_CLK_EXYNOS
96 	struct clk clk;
97 	u32 ret;
98 
99 	ret = clk_get_by_index(dev, 1, &clk);
100 	if (ret < 0)
101 		return ret;
102 	uclk = clk_get_rate(&clk);
103 #else
104 	uclk = get_uart_clk(plat->port_id);
105 #endif
106 
107 	s5p_serial_baud(uart, uclk, baudrate);
108 
109 	return 0;
110 }
111 
s5p_serial_probe(struct udevice * dev)112 static int s5p_serial_probe(struct udevice *dev)
113 {
114 	struct s5p_serial_platdata *plat = dev->platdata;
115 	struct s5p_uart *const uart = plat->reg;
116 
117 	s5p_serial_init(uart);
118 
119 	return 0;
120 }
121 
serial_err_check(const struct s5p_uart * const uart,int op)122 static int serial_err_check(const struct s5p_uart *const uart, int op)
123 {
124 	unsigned int mask;
125 
126 	/*
127 	 * UERSTAT
128 	 * Break Detect	[3]
129 	 * Frame Err	[2] : receive operation
130 	 * Parity Err	[1] : receive operation
131 	 * Overrun Err	[0] : receive operation
132 	 */
133 	if (op)
134 		mask = 0x8;
135 	else
136 		mask = 0xf;
137 
138 	return readl(&uart->uerstat) & mask;
139 }
140 
s5p_serial_getc(struct udevice * dev)141 static int s5p_serial_getc(struct udevice *dev)
142 {
143 	struct s5p_serial_platdata *plat = dev->platdata;
144 	struct s5p_uart *const uart = plat->reg;
145 
146 	if (!(readl(&uart->ufstat) & RX_FIFO_COUNT_MASK))
147 		return -EAGAIN;
148 
149 	serial_err_check(uart, 0);
150 	return (int)(readb(&uart->urxh) & 0xff);
151 }
152 
s5p_serial_putc(struct udevice * dev,const char ch)153 static int s5p_serial_putc(struct udevice *dev, const char ch)
154 {
155 	struct s5p_serial_platdata *plat = dev->platdata;
156 	struct s5p_uart *const uart = plat->reg;
157 
158 	if (readl(&uart->ufstat) & TX_FIFO_FULL)
159 		return -EAGAIN;
160 
161 	writeb(ch, &uart->utxh);
162 	serial_err_check(uart, 1);
163 
164 	return 0;
165 }
166 
s5p_serial_pending(struct udevice * dev,bool input)167 static int s5p_serial_pending(struct udevice *dev, bool input)
168 {
169 	struct s5p_serial_platdata *plat = dev->platdata;
170 	struct s5p_uart *const uart = plat->reg;
171 	uint32_t ufstat = readl(&uart->ufstat);
172 
173 	if (input)
174 		return (ufstat & RX_FIFO_COUNT_MASK) >> RX_FIFO_COUNT_SHIFT;
175 	else
176 		return (ufstat & TX_FIFO_COUNT_MASK) >> TX_FIFO_COUNT_SHIFT;
177 }
178 
s5p_serial_ofdata_to_platdata(struct udevice * dev)179 static int s5p_serial_ofdata_to_platdata(struct udevice *dev)
180 {
181 	struct s5p_serial_platdata *plat = dev->platdata;
182 	fdt_addr_t addr;
183 
184 	addr = devfdt_get_addr(dev);
185 	if (addr == FDT_ADDR_T_NONE)
186 		return -EINVAL;
187 
188 	plat->reg = (struct s5p_uart *)addr;
189 	plat->port_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
190 					"id", dev->seq);
191 	return 0;
192 }
193 
194 static const struct dm_serial_ops s5p_serial_ops = {
195 	.putc = s5p_serial_putc,
196 	.pending = s5p_serial_pending,
197 	.getc = s5p_serial_getc,
198 	.setbrg = s5p_serial_setbrg,
199 };
200 
201 static const struct udevice_id s5p_serial_ids[] = {
202 	{ .compatible = "samsung,exynos4210-uart" },
203 	{ }
204 };
205 
206 U_BOOT_DRIVER(serial_s5p) = {
207 	.name	= "serial_s5p",
208 	.id	= UCLASS_SERIAL,
209 	.of_match = s5p_serial_ids,
210 	.ofdata_to_platdata = s5p_serial_ofdata_to_platdata,
211 	.platdata_auto_alloc_size = sizeof(struct s5p_serial_platdata),
212 	.probe = s5p_serial_probe,
213 	.ops	= &s5p_serial_ops,
214 	.flags = DM_FLAG_PRE_RELOC,
215 };
216 #endif
217 
218 #ifdef CONFIG_DEBUG_UART_S5P
219 
220 #include <debug_uart.h>
221 
_debug_uart_init(void)222 static inline void _debug_uart_init(void)
223 {
224 	struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE;
225 
226 	s5p_serial_init(uart);
227 	s5p_serial_baud(uart, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE);
228 }
229 
_debug_uart_putc(int ch)230 static inline void _debug_uart_putc(int ch)
231 {
232 	struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE;
233 
234 	while (readl(&uart->ufstat) & TX_FIFO_FULL);
235 
236 	writeb(ch, &uart->utxh);
237 }
238 
239 DEBUG_UART_FUNCS
240 
241 #endif
242