1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * da8xx.c - TI's DA8xx platform specific usb wrapper functions.
4 *
5 * Author: Ajay Kumar Gupta <ajay.gupta@ti.com>
6 *
7 * Based on drivers/usb/musb/davinci.c
8 *
9 * Copyright (C) 2009 Texas Instruments Incorporated
10 */
11 #include <common.h>
12
13 #include "musb_core.h"
14 #include <asm/arch/da8xx-usb.h>
15
16 /* MUSB platform configuration */
17 struct musb_config musb_cfg = {
18 .regs = (struct musb_regs *)DA8XX_USB_OTG_CORE_BASE,
19 .timeout = DA8XX_USB_OTG_TIMEOUT,
20 .musb_speed = 0,
21 };
22
23 /*
24 * This function enables VBUS by driving the GPIO Bank4 Pin 15 high.
25 */
enable_vbus(void)26 static void enable_vbus(void)
27 {
28 u32 value;
29
30 /* configure GPIO bank4 pin 15 in output direction */
31 value = readl(&davinci_gpio_bank45->dir);
32 writel((value & (~DA8XX_USB_VBUS_GPIO)), &davinci_gpio_bank45->dir);
33
34 /* set GPIO bank4 pin 15 high to drive VBUS */
35 value = readl(&davinci_gpio_bank45->set_data);
36 writel((value | DA8XX_USB_VBUS_GPIO), &davinci_gpio_bank45->set_data);
37 }
38
39 /*
40 * Enable the usb0 phy. This initialization procedure is explained in
41 * the DA8xx USB user guide document.
42 */
phy_on(void)43 static u8 phy_on(void)
44 {
45 u32 timeout;
46 u32 cfgchip2;
47
48 cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2);
49
50 cfgchip2 &= ~(CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN |
51 CFGCHIP2_OTGMODE | CFGCHIP2_REFFREQ);
52 cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN | CFGCHIP2_PHY_PLLON |
53 CFGCHIP2_REFFREQ_24MHZ;
54
55 writel(cfgchip2, &davinci_syscfg_regs->cfgchip2);
56
57 /* wait until the usb phy pll locks */
58 timeout = musb_cfg.timeout;
59 while (timeout--)
60 if (readl(&davinci_syscfg_regs->cfgchip2) & CFGCHIP2_PHYCLKGD)
61 return 1;
62
63 /* USB phy was not turned on */
64 return 0;
65 }
66
67 /*
68 * Disable the usb phy
69 */
phy_off(void)70 static void phy_off(void)
71 {
72 u32 cfgchip2;
73
74 /*
75 * Power down the on-chip PHY.
76 */
77 cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2);
78 cfgchip2 &= ~CFGCHIP2_PHY_PLLON;
79 cfgchip2 |= CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN;
80 writel(cfgchip2, &davinci_syscfg_regs->cfgchip2);
81 }
82
83 /*
84 * This function performs DA8xx platform specific initialization for usb0.
85 */
musb_platform_init(void)86 int musb_platform_init(void)
87 {
88 u32 revision;
89
90 /* enable psc for usb2.0 */
91 lpsc_on(33);
92
93 /* enable usb vbus */
94 enable_vbus();
95
96 /* reset the controller */
97 writel(0x1, &da8xx_usb_regs->control);
98 udelay(5000);
99
100 /* start the on-chip usb phy and its pll */
101 if (phy_on() == 0)
102 return -1;
103
104 /* Returns zero if e.g. not clocked */
105 revision = readl(&da8xx_usb_regs->revision);
106 if (revision == 0)
107 return -1;
108
109 /* Disable all interrupts */
110 writel((DA8XX_USB_USBINT_MASK | DA8XX_USB_TXINT_MASK |
111 DA8XX_USB_RXINT_MASK), &da8xx_usb_regs->intmsk_set);
112 return 0;
113 }
114
115 /*
116 * This function performs DA8xx platform specific deinitialization for usb0.
117 */
musb_platform_deinit(void)118 void musb_platform_deinit(void)
119 {
120 /* Turn of the phy */
121 phy_off();
122
123 /* flush any interrupts */
124 writel((DA8XX_USB_USBINT_MASK | DA8XX_USB_TXINT_MASK |
125 DA8XX_USB_RXINT_MASK), &da8xx_usb_regs->intmsk_clr);
126 writel(0, &da8xx_usb_regs->eoi);
127 }
128