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1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Configuation settings for the Renesas Solutions ECOVEC board
4  *
5  * Copyright (C) 2009 - 2011 Renesas Solutions Corp.
6  * Copyright (C) 2009 Kuninori Morimoto <morimoto.kuninori@renesas.com>
7  * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
8  */
9 
10 #ifndef __ECOVEC_H
11 #define __ECOVEC_H
12 
13 /*
14  *  Address      Interface        BusWidth
15  *-----------------------------------------
16  *  0x0000_0000  U-Boot           16bit
17  *  0x0004_0000  Linux romImage   16bit
18  *  0x0014_0000  MTD for Linux    16bit
19  *  0x0400_0000  Internal I/O     16/32bit
20  *  0x0800_0000  DRAM             32bit
21  *  0x1800_0000  MFI              16bit
22  */
23 
24 #define CONFIG_CPU_SH7724	1
25 
26 #define CONFIG_ECOVEC_ROMIMAGE_ADDR 0xA0040000
27 
28 #define CONFIG_DISPLAY_BOARDINFO
29 #undef  CONFIG_SHOW_BOOT_PROGRESS
30 
31 /* I2C */
32 #define CONFIG_SYS_I2C
33 #define CONFIG_SYS_I2C_SH
34 #define CONFIG_SYS_I2C_SLAVE	0x7F
35 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 2
36 #define CONFIG_SYS_I2C_SH_BASE0	0xA4470000
37 #define CONFIG_SYS_I2C_SH_SPEED0	100000
38 #define CONFIG_SYS_I2C_SH_BASE1	0xA4750000
39 #define CONFIG_SYS_I2C_SH_SPEED1	100000
40 #define CONFIG_SH_I2C_DATA_HIGH	4
41 #define CONFIG_SH_I2C_DATA_LOW 	5
42 #define CONFIG_SH_I2C_CLOCK  	41666666
43 
44 /* Ether */
45 #define CONFIG_SH_ETHER_USE_PORT (0)
46 #define CONFIG_SH_ETHER_PHY_ADDR (0x1f)
47 #define CONFIG_PHY_SMSC 1
48 #define CONFIG_BITBANGMII
49 #define CONFIG_BITBANGMII_MULTI
50 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
51 
52 /* USB / R8A66597 */
53 #define CONFIG_USB_R8A66597_HCD
54 #define CONFIG_R8A66597_BASE_ADDR   0xA4D80000
55 #define CONFIG_R8A66597_XTAL        0x0000  /* 12MHz */
56 #define CONFIG_R8A66597_LDRV        0x8000  /* 3.3V */
57 #define CONFIG_R8A66597_ENDIAN      0x0000  /* little */
58 #define CONFIG_SUPERH_ON_CHIP_R8A66597
59 
60 /* undef to save memory	*/
61 /* Monitor Command Prompt */
62 /* Buffer size for Console output */
63 #define CONFIG_SYS_PBSIZE		256
64 /* List of legal baudrate settings for this board */
65 #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }
66 
67 /* SCIF */
68 #define CONFIG_SCIF		1
69 #define CONFIG_CONS_SCIF0	1
70 
71 /* Suppress display of console information at boot */
72 
73 /* SDRAM */
74 #define CONFIG_SYS_SDRAM_BASE	(0x88000000)
75 #define CONFIG_SYS_SDRAM_SIZE	(256 * 1024 * 1024)
76 #define CONFIG_SYS_LOAD_ADDR	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
77 
78 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
79 #define CONFIG_SYS_MEMTEST_END	 (CONFIG_SYS_MEMTEST_START + 200 * 1024 * 1024)
80 /* Enable alternate, more extensive, memory test */
81 /* Scratch address used by the alternate memory test */
82 #undef  CONFIG_SYS_MEMTEST_SCRATCH
83 
84 /* Enable temporary baudrate change while serial download */
85 #undef  CONFIG_SYS_LOADS_BAUD_CHANGE
86 
87 /* FLASH */
88 #define CONFIG_FLASH_CFI_DRIVER 1
89 #define CONFIG_SYS_FLASH_CFI
90 #undef  CONFIG_SYS_FLASH_QUIET_TEST
91 #define CONFIG_SYS_FLASH_EMPTY_INFO
92 #define CONFIG_SYS_FLASH_BASE	(0xA0000000)
93 #define CONFIG_SYS_MAX_FLASH_SECT	512
94 
95 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */
96 #define CONFIG_SYS_MAX_FLASH_BANKS	1
97 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
98 
99 /* Timeout for Flash erase operations (in ms) */
100 #define CONFIG_SYS_FLASH_ERASE_TOUT	(3 * 1000)
101 /* Timeout for Flash write operations (in ms) */
102 #define CONFIG_SYS_FLASH_WRITE_TOUT	(3 * 1000)
103 /* Timeout for Flash set sector lock bit operations (in ms) */
104 #define CONFIG_SYS_FLASH_LOCK_TOUT	(3 * 1000)
105 /* Timeout for Flash clear lock bit operations (in ms) */
106 #define CONFIG_SYS_FLASH_UNLOCK_TOUT	(3 * 1000)
107 
108 /*
109  * Use hardware flash sectors protection instead
110  * of U-Boot software protection
111  */
112 #undef  CONFIG_SYS_FLASH_PROTECTION
113 #undef  CONFIG_SYS_DIRECT_FLASH_TFTP
114 
115 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
116 #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE)
117 /* Monitor size */
118 #define CONFIG_SYS_MONITOR_LEN	(256 * 1024)
119 /* Size of DRAM reserved for malloc() use */
120 #define CONFIG_SYS_MALLOC_LEN	(256 * 1024)
121 #define CONFIG_SYS_BOOTMAPSZ	(8 * 1024 * 1024)
122 
123 /* ENV setting */
124 #define CONFIG_ENV_OVERWRITE	1
125 #define CONFIG_ENV_SECT_SIZE	(128 * 1024)
126 #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
127 #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
128 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
129 #define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
130 #define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
131 
132 /* Board Clock */
133 #define CONFIG_SYS_CLK_FREQ 41666666
134 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
135 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
136 #define CONFIG_SYS_TMU_CLK_DIV      4
137 
138 #endif	/* __ECOVEC_H */
139