1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2003 4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 5 */ 6 7 /* 8 * This file contains the configuration parameters for the dbau1x00 board. 9 */ 10 11 #ifndef __CONFIG_H 12 #define __CONFIG_H 13 14 #define CONFIG_SOC_AU1X00 1 /* alchemy series cpu */ 15 16 #ifdef CONFIG_PB1000 17 #define CONFIG_SOC_AU1000 1 18 #else 19 #ifdef CONFIG_PB1100 20 #define CONFIG_SOC_AU1100 1 21 #else 22 #ifdef CONFIG_PB1500 23 #define CONFIG_SOC_AU1500 1 24 #else 25 #error "No valid board set" 26 #endif 27 #endif 28 #endif 29 30 #define CONFIG_TIMESTAMP /* Print image info with timestamp */ 31 32 #define CONFIG_EXTRA_ENV_SETTINGS \ 33 "addmisc=setenv bootargs ${bootargs} " \ 34 "console=ttyS0,${baudrate} " \ 35 "panic=1\0" \ 36 "bootfile=/vmlinux.img\0" \ 37 "load=tftp 80500000 ${u-boot}\0" \ 38 "" 39 /* Boot from NFS root */ 40 #define CONFIG_BOOTCOMMAND "bootp; setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; bootm" 41 42 /* 43 * Miscellaneous configurable options 44 */ 45 46 #define CONFIG_SYS_MALLOC_LEN 128*1024 47 48 #define CONFIG_SYS_BOOTPARAMS_LEN 128*1024 49 50 #define CONFIG_SYS_MIPS_TIMER_FREQ 396000000 51 52 #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */ 53 54 #define CONFIG_SYS_LOAD_ADDR 0x81000000 /* default load address */ 55 56 #define CONFIG_SYS_MEMTEST_START 0x80100000 57 #undef CONFIG_SYS_MEMTEST_START 58 #define CONFIG_SYS_MEMTEST_START 0x80200000 59 #define CONFIG_SYS_MEMTEST_END 0x83800000 60 61 /*----------------------------------------------------------------------- 62 * FLASH and environment organization 63 */ 64 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ 65 #define CONFIG_SYS_MAX_FLASH_SECT (128) /* max number of sectors on one chip */ 66 67 #define PHYS_FLASH_1 0xbec00000 /* Flash Bank #1 */ 68 #define PHYS_FLASH_2 0xbfc00000 /* Flash Bank #2 */ 69 70 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 71 #define CONFIG_SYS_MONITOR_LEN (192 << 10) 72 73 #define CONFIG_SYS_INIT_SP_OFFSET 0x4000000 74 75 /* We boot from this flash, selected with dip switch */ 76 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_2 77 78 /* timeout values are in ticks */ 79 #define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Erase */ 80 #define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Timeout for Flash Write */ 81 82 /* Address and size of Primary Environment Sector */ 83 #define CONFIG_ENV_ADDR 0xB0030000 84 #define CONFIG_ENV_SIZE 0x10000 85 86 #define CONFIG_FLASH_16BIT 87 88 #define CONFIG_NR_DRAM_BANKS 2 89 90 #define CONFIG_MEMSIZE_IN_BYTES 91 92 /*---USB -------------------------------------------*/ 93 #if 0 94 #define CONFIG_USB_OHCI 95 #endif 96 97 /*---ATA PCMCIA ------------------------------------*/ 98 #if 0 99 #define CONFIG_SYS_PCMCIA_MEM_SIZE 0x4000000 /* Offset to slot 1 FIXME!!! */ 100 #define CONFIG_SYS_PCMCIA_MEM_ADDR 0x20000000 101 #define CONFIG_PCMCIA_SLOT_A 102 103 #define CONFIG_ATAPI 1 104 105 /* We run CF in "true ide" mode or a harddrive via pcmcia */ 106 #define CONFIG_IDE_PCMCIA 1 107 108 /* We only support one slot for now */ 109 #define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */ 110 #define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */ 111 112 #undef CONFIG_IDE_RESET /* reset for ide not supported */ 113 114 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000 115 116 #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_MEM_ADDR 117 118 /* Offset for data I/O */ 119 #define CONFIG_SYS_ATA_DATA_OFFSET 8 120 121 /* Offset for normal register accesses */ 122 #define CONFIG_SYS_ATA_REG_OFFSET 0 123 124 /* Offset for alternate registers */ 125 #define CONFIG_SYS_ATA_ALT_OFFSET 0x0100 126 127 #endif 128 129 /* 130 * BOOTP options 131 */ 132 #define CONFIG_BOOTP_BOOTFILESIZE 133 134 /* 135 * Command line configuration. 136 */ 137 138 #endif /* __CONFIG_H */ 139