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1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
4  *
5  * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
6  *
7  * Configuration for the woodburn board.
8  */
9 
10 #ifndef __WOODBURN_COMMON_CONFIG_H
11 #define __WOODBURN_COMMON_CONFIG_H
12 
13 #include <asm/arch/imx-regs.h>
14 
15  /* High Level Configuration Options */
16 #define CONFIG_MX35
17 #define CONFIG_MX35_HCLK_FREQ	24000000
18 #define CONFIG_SYS_FSL_CLK
19 
20 #define CONFIG_SYS_DCACHE_OFF
21 
22 #define CONFIG_MACH_TYPE		MACH_TYPE_FLEA3
23 
24 /* This is required to setup the ESDC controller */
25 
26 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
27 #define CONFIG_REVISION_TAG
28 #define CONFIG_SETUP_MEMORY_TAGS
29 #define CONFIG_INITRD_TAG
30 
31 /*
32  * Size of malloc() pool
33  */
34 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1024 * 1024)
35 
36 /*
37  * Hardware drivers
38  */
39 #define CONFIG_SYS_I2C
40 #define CONFIG_SYS_I2C_MXC
41 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
42 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
43 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
44 #define CONFIG_SYS_SPD_BUS_NUM		0
45 
46 /* PMIC Controller */
47 #define CONFIG_POWER
48 #define CONFIG_POWER_I2C
49 #define CONFIG_POWER_FSL
50 #define CONFIG_POWER_FSL_MC13892
51 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR	0x8
52 #define CONFIG_RTC_MC13XXX
53 
54 /* mmc driver */
55 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
56 #define CONFIG_SYS_FSL_ESDHC_NUM	1
57 
58 /*
59  * UART (console)
60  */
61 #define CONFIG_MXC_UART
62 #define CONFIG_MXC_UART_BASE	UART1_BASE
63 
64 /* allow to overwrite serial and ethaddr */
65 #define CONFIG_ENV_OVERWRITE
66 
67 /*
68  * Command definition
69  */
70 
71 #define CONFIG_NET_RETRY_COUNT	100
72 
73 
74 #define CONFIG_LOADADDR		0x80800000	/* loadaddr env var */
75 
76 /*
77  * Ethernet on SOC (FEC)
78  */
79 #define CONFIG_FEC_MXC
80 #define IMX_FEC_BASE	FEC_BASE_ADDR
81 #define CONFIG_FEC_MXC_PHYADDR	0x1
82 
83 #define CONFIG_MII
84 #define CONFIG_DISCOVER_PHY
85 
86 #define CONFIG_ARP_TIMEOUT	200UL
87 
88 /*
89  * Miscellaneous configurable options
90  */
91 
92 #define CONFIG_SYS_MEMTEST_START	0	/* memtest works on */
93 #define CONFIG_SYS_MEMTEST_END		0x10000
94 
95 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
96 
97 /*
98  * Physical Memory Map
99  */
100 #define CONFIG_NR_DRAM_BANKS	1
101 #define PHYS_SDRAM_1		CSD0_BASE_ADDR
102 #define PHYS_SDRAM_1_SIZE	(256 * 1024 * 1024)
103 
104 #define CONFIG_SYS_SDRAM_BASE		CSD0_BASE_ADDR
105 
106 #define CONFIG_SYS_GBL_DATA_OFFSET	(LOW_LEVEL_SRAM_STACK - \
107 						IRAM_BASE_ADDR - \
108 						GENERATED_GBL_DATA_SIZE)
109 #define CONFIG_SYS_INIT_SP_ADDR		(IRAM_BASE_ADDR + \
110 					CONFIG_SYS_GBL_DATA_OFFSET)
111 
112 /*
113  * MTD Command for mtdparts
114  */
115 #define CONFIG_MTD_DEVICE
116 #define CONFIG_FLASH_CFI_MTD
117 #define CONFIG_MTD_PARTITIONS
118 
119 /*
120  * FLASH and environment organization
121  */
122 #define CONFIG_SYS_FLASH_BASE		CS0_BASE_ADDR
123 #define CONFIG_SYS_MAX_FLASH_BANKS 1	/* max number of memory banks */
124 #define CONFIG_SYS_MAX_FLASH_SECT 512	/* max number of sectors on one chip */
125 /* Monitor at beginning of flash */
126 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
127 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
128 
129 #define CONFIG_ENV_SECT_SIZE	(128 * 1024)
130 #define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
131 
132 /* Address and size of Redundant Environment Sector	*/
133 #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
134 #define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE
135 
136 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + \
137 				CONFIG_SYS_MONITOR_LEN)
138 
139 /*
140  * CFI FLASH driver setup
141  */
142 #define CONFIG_SYS_FLASH_CFI		/* Flash memory is CFI compliant */
143 #define CONFIG_FLASH_CFI_DRIVER
144 
145 /* A non-standard buffered write algorithm */
146 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/* faster */
147 #define CONFIG_SYS_FLASH_PROTECTION	/* Use hardware sector protection */
148 
149 /*
150  * NAND FLASH driver setup
151  */
152 #define CONFIG_NAND_MXC_V1_1
153 #define CONFIG_MXC_NAND_REGS_BASE	(NFC_BASE_ADDR)
154 #define CONFIG_SYS_MAX_NAND_DEVICE	1
155 #define CONFIG_SYS_NAND_BASE		(NFC_BASE_ADDR)
156 #define CONFIG_MXC_NAND_HWECC
157 #define CONFIG_SYS_NAND_LARGEPAGE
158 
159 #define CONFIG_SYS_NAND_ONFI_DETECTION
160 
161 /*
162  * Default environment and default scripts
163  * to update uboot and load kernel
164  */
165 
166 #define CONFIG_HOSTNAME "woodburn"
167 #define	CONFIG_EXTRA_ENV_SETTINGS					\
168 	"netdev=eth0\0"							\
169 	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
170 		"nfsroot=${serverip}:${rootpath}\0"			\
171 	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
172 	"addip_sta=setenv bootargs ${bootargs} "			\
173 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
174 		":${hostname}:${netdev}:off panic=1\0"			\
175 	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"		\
176 	"addip=if test -n ${ipdyn};then run addip_dyn;"			\
177 		"else run addip_sta;fi\0"	\
178 	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
179 	"addtty=setenv bootargs ${bootargs}"				\
180 		" console=ttymxc0,${baudrate}\0"			\
181 	"addmisc=setenv bootargs ${bootargs} ${misc}\0"			\
182 	"loadaddr=80800000\0"						\
183 	"kernel_addr_r=80800000\0"					\
184 	"hostname=" CONFIG_HOSTNAME "\0"			\
185 	"bootfile=" CONFIG_HOSTNAME "/uImage\0"		\
186 	"ramdisk_file=" CONFIG_HOSTNAME "/uRamdisk\0"	\
187 	"flash_self=run ramargs addip addtty addmtd addmisc;"		\
188 		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
189 	"flash_nfs=run nfsargs addip addtty addmtd addmisc;"		\
190 		"bootm ${kernel_addr}\0"				\
191 	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; "			\
192 		"run nfsargs addip addtty addmtd addmisc;"		\
193 		"bootm ${kernel_addr_r}\0"				\
194 	"net_self_load=tftp ${kernel_addr_r} ${bootfile};"		\
195 		"tftp ${ramdisk_addr_r} ${ramdisk_file};\0"		\
196 	"net_self=if run net_self_load;then "				\
197 		"run ramargs addip addtty addmtd addmisc;"		\
198 		"bootm ${kernel_addr_r} ${ramdisk_addr_r};"		\
199 		"else echo Images not loades;fi\0"			\
200 	"u-boot=" CONFIG_HOSTNAME "/u-boot.bin\0"		\
201 	"load=tftp ${loadaddr} ${u-boot}\0"				\
202 	"uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0"		\
203 	"update=protect off ${uboot_addr} +80000;"			\
204 		"erase ${uboot_addr} +80000;"				\
205 		"cp.b ${loadaddr} ${uboot_addr} ${filesize}\0"		\
206 	"upd=if run load;then echo Updating u-boot;if run update;"	\
207 		"then echo U-Boot updated;"				\
208 			"else echo Error updating u-boot !;"		\
209 			"echo Board without bootloader !!;"		\
210 		"fi;"							\
211 		"else echo U-Boot not downloaded..exiting;fi\0"		\
212 	"bootcmd=run net_nfs\0"
213 
214 #endif				/* __CONFIG_H */
215