1 #ifndef _DT_BINDINGS_STM32H7_PINFUNC_H 2 #define _DT_BINDINGS_STM32H7_PINFUNC_H 3 4 #define STM32H7_PA0_FUNC_GPIO 0x0 5 #define STM32H7_PA0_FUNC_TIM2_CH1_TIM2_ETR 0x2 6 #define STM32H7_PA0_FUNC_TIM5_CH1 0x3 7 #define STM32H7_PA0_FUNC_TIM8_ETR 0x4 8 #define STM32H7_PA0_FUNC_TIM15_BKIN 0x5 9 #define STM32H7_PA0_FUNC_USART2_CTS_NSS 0x8 10 #define STM32H7_PA0_FUNC_UART4_TX 0x9 11 #define STM32H7_PA0_FUNC_SDMMC2_CMD 0xa 12 #define STM32H7_PA0_FUNC_SAI2_SD_B 0xb 13 #define STM32H7_PA0_FUNC_ETH_MII_CRS 0xc 14 #define STM32H7_PA0_FUNC_EVENTOUT 0x10 15 #define STM32H7_PA0_FUNC_ANALOG 0x11 16 17 #define STM32H7_PA1_FUNC_GPIO 0x100 18 #define STM32H7_PA1_FUNC_TIM2_CH2 0x102 19 #define STM32H7_PA1_FUNC_TIM5_CH2 0x103 20 #define STM32H7_PA1_FUNC_LPTIM3_OUT 0x104 21 #define STM32H7_PA1_FUNC_TIM15_CH1N 0x105 22 #define STM32H7_PA1_FUNC_USART2_RTS 0x108 23 #define STM32H7_PA1_FUNC_UART4_RX 0x109 24 #define STM32H7_PA1_FUNC_QUADSPI_BK1_IO3 0x10a 25 #define STM32H7_PA1_FUNC_SAI2_MCK_B 0x10b 26 #define STM32H7_PA1_FUNC_ETH_MII_RX_CLK_ETH_RMII_REF_CLK 0x10c 27 #define STM32H7_PA1_FUNC_LCD_R2 0x10f 28 #define STM32H7_PA1_FUNC_EVENTOUT 0x110 29 #define STM32H7_PA1_FUNC_ANALOG 0x111 30 31 #define STM32H7_PA2_FUNC_GPIO 0x200 32 #define STM32H7_PA2_FUNC_TIM2_CH3 0x202 33 #define STM32H7_PA2_FUNC_TIM5_CH3 0x203 34 #define STM32H7_PA2_FUNC_LPTIM4_OUT 0x204 35 #define STM32H7_PA2_FUNC_TIM15_CH1 0x205 36 #define STM32H7_PA2_FUNC_USART2_TX 0x208 37 #define STM32H7_PA2_FUNC_SAI2_SCK_B 0x209 38 #define STM32H7_PA2_FUNC_ETH_MDIO 0x20c 39 #define STM32H7_PA2_FUNC_MDIOS_MDIO 0x20d 40 #define STM32H7_PA2_FUNC_LCD_R1 0x20f 41 #define STM32H7_PA2_FUNC_EVENTOUT 0x210 42 #define STM32H7_PA2_FUNC_ANALOG 0x211 43 44 #define STM32H7_PA3_FUNC_GPIO 0x300 45 #define STM32H7_PA3_FUNC_TIM2_CH4 0x302 46 #define STM32H7_PA3_FUNC_TIM5_CH4 0x303 47 #define STM32H7_PA3_FUNC_LPTIM5_OUT 0x304 48 #define STM32H7_PA3_FUNC_TIM15_CH2 0x305 49 #define STM32H7_PA3_FUNC_USART2_RX 0x308 50 #define STM32H7_PA3_FUNC_LCD_B2 0x30a 51 #define STM32H7_PA3_FUNC_OTG_HS_ULPI_D0 0x30b 52 #define STM32H7_PA3_FUNC_ETH_MII_COL 0x30c 53 #define STM32H7_PA3_FUNC_LCD_B5 0x30f 54 #define STM32H7_PA3_FUNC_EVENTOUT 0x310 55 #define STM32H7_PA3_FUNC_ANALOG 0x311 56 57 #define STM32H7_PA4_FUNC_GPIO 0x400 58 #define STM32H7_PA4_FUNC_TIM5_ETR 0x403 59 #define STM32H7_PA4_FUNC_SPI1_NSS_I2S1_WS 0x406 60 #define STM32H7_PA4_FUNC_SPI3_NSS_I2S3_WS 0x407 61 #define STM32H7_PA4_FUNC_USART2_CK 0x408 62 #define STM32H7_PA4_FUNC_SPI6_NSS 0x409 63 #define STM32H7_PA4_FUNC_OTG_HS_SOF 0x40d 64 #define STM32H7_PA4_FUNC_DCMI_HSYNC 0x40e 65 #define STM32H7_PA4_FUNC_LCD_VSYNC 0x40f 66 #define STM32H7_PA4_FUNC_EVENTOUT 0x410 67 #define STM32H7_PA4_FUNC_ANALOG 0x411 68 69 #define STM32H7_PA5_FUNC_GPIO 0x500 70 #define STM32H7_PA5_FUNC_TIM2_CH1_TIM2_ETR 0x502 71 #define STM32H7_PA5_FUNC_TIM8_CH1N 0x504 72 #define STM32H7_PA5_FUNC_SPI1_SCK_I2S1_CK 0x506 73 #define STM32H7_PA5_FUNC_SPI6_SCK 0x509 74 #define STM32H7_PA5_FUNC_OTG_HS_ULPI_CK 0x50b 75 #define STM32H7_PA5_FUNC_LCD_R4 0x50f 76 #define STM32H7_PA5_FUNC_EVENTOUT 0x510 77 #define STM32H7_PA5_FUNC_ANALOG 0x511 78 79 #define STM32H7_PA6_FUNC_GPIO 0x600 80 #define STM32H7_PA6_FUNC_TIM1_BKIN 0x602 81 #define STM32H7_PA6_FUNC_TIM3_CH1 0x603 82 #define STM32H7_PA6_FUNC_TIM8_BKIN 0x604 83 #define STM32H7_PA6_FUNC_SPI1_MISO_I2S1_SDI 0x606 84 #define STM32H7_PA6_FUNC_SPI6_MISO 0x609 85 #define STM32H7_PA6_FUNC_TIM13_CH1 0x60a 86 #define STM32H7_PA6_FUNC_TIM8_BKIN_COMP12 0x60b 87 #define STM32H7_PA6_FUNC_MDIOS_MDC 0x60c 88 #define STM32H7_PA6_FUNC_TIM1_BKIN_COMP12 0x60d 89 #define STM32H7_PA6_FUNC_DCMI_PIXCLK 0x60e 90 #define STM32H7_PA6_FUNC_LCD_G2 0x60f 91 #define STM32H7_PA6_FUNC_EVENTOUT 0x610 92 #define STM32H7_PA6_FUNC_ANALOG 0x611 93 94 #define STM32H7_PA7_FUNC_GPIO 0x700 95 #define STM32H7_PA7_FUNC_TIM1_CH1N 0x702 96 #define STM32H7_PA7_FUNC_TIM3_CH2 0x703 97 #define STM32H7_PA7_FUNC_TIM8_CH1N 0x704 98 #define STM32H7_PA7_FUNC_SPI1_MOSI_I2S1_SDO 0x706 99 #define STM32H7_PA7_FUNC_SPI6_MOSI 0x709 100 #define STM32H7_PA7_FUNC_TIM14_CH1 0x70a 101 #define STM32H7_PA7_FUNC_ETH_MII_RX_DV_ETH_RMII_CRS_DV 0x70c 102 #define STM32H7_PA7_FUNC_FMC_SDNWE 0x70d 103 #define STM32H7_PA7_FUNC_EVENTOUT 0x710 104 #define STM32H7_PA7_FUNC_ANALOG 0x711 105 106 #define STM32H7_PA8_FUNC_GPIO 0x800 107 #define STM32H7_PA8_FUNC_MCO1 0x801 108 #define STM32H7_PA8_FUNC_TIM1_CH1 0x802 109 #define STM32H7_PA8_FUNC_HRTIM_CHB2 0x803 110 #define STM32H7_PA8_FUNC_TIM8_BKIN2 0x804 111 #define STM32H7_PA8_FUNC_I2C3_SCL 0x805 112 #define STM32H7_PA8_FUNC_USART1_CK 0x808 113 #define STM32H7_PA8_FUNC_OTG_FS_SOF 0x80b 114 #define STM32H7_PA8_FUNC_UART7_RX 0x80c 115 #define STM32H7_PA8_FUNC_TIM8_BKIN2_COMP12 0x80d 116 #define STM32H7_PA8_FUNC_LCD_B3 0x80e 117 #define STM32H7_PA8_FUNC_LCD_R6 0x80f 118 #define STM32H7_PA8_FUNC_EVENTOUT 0x810 119 #define STM32H7_PA8_FUNC_ANALOG 0x811 120 121 #define STM32H7_PA9_FUNC_GPIO 0x900 122 #define STM32H7_PA9_FUNC_TIM1_CH2 0x902 123 #define STM32H7_PA9_FUNC_HRTIM_CHC1 0x903 124 #define STM32H7_PA9_FUNC_LPUART1_TX 0x904 125 #define STM32H7_PA9_FUNC_I2C3_SMBA 0x905 126 #define STM32H7_PA9_FUNC_SPI2_SCK_I2S2_CK 0x906 127 #define STM32H7_PA9_FUNC_USART1_TX 0x908 128 #define STM32H7_PA9_FUNC_CAN1_RXFD 0x90a 129 #define STM32H7_PA9_FUNC_ETH_TX_ER 0x90c 130 #define STM32H7_PA9_FUNC_DCMI_D0 0x90e 131 #define STM32H7_PA9_FUNC_LCD_R5 0x90f 132 #define STM32H7_PA9_FUNC_EVENTOUT 0x910 133 #define STM32H7_PA9_FUNC_ANALOG 0x911 134 135 #define STM32H7_PA10_FUNC_GPIO 0xa00 136 #define STM32H7_PA10_FUNC_TIM1_CH3 0xa02 137 #define STM32H7_PA10_FUNC_HRTIM_CHC2 0xa03 138 #define STM32H7_PA10_FUNC_LPUART1_RX 0xa04 139 #define STM32H7_PA10_FUNC_USART1_RX 0xa08 140 #define STM32H7_PA10_FUNC_CAN1_TXFD 0xa0a 141 #define STM32H7_PA10_FUNC_OTG_FS_ID 0xa0b 142 #define STM32H7_PA10_FUNC_MDIOS_MDIO 0xa0c 143 #define STM32H7_PA10_FUNC_LCD_B4 0xa0d 144 #define STM32H7_PA10_FUNC_DCMI_D1 0xa0e 145 #define STM32H7_PA10_FUNC_LCD_B1 0xa0f 146 #define STM32H7_PA10_FUNC_EVENTOUT 0xa10 147 #define STM32H7_PA10_FUNC_ANALOG 0xa11 148 149 #define STM32H7_PA11_FUNC_GPIO 0xb00 150 #define STM32H7_PA11_FUNC_TIM1_CH4 0xb02 151 #define STM32H7_PA11_FUNC_HRTIM_CHD1 0xb03 152 #define STM32H7_PA11_FUNC_LPUART1_CTS 0xb04 153 #define STM32H7_PA11_FUNC_SPI2_NSS_I2S2_WS 0xb06 154 #define STM32H7_PA11_FUNC_UART4_RX 0xb07 155 #define STM32H7_PA11_FUNC_USART1_CTS_NSS 0xb08 156 #define STM32H7_PA11_FUNC_CAN1_RX 0xb0a 157 #define STM32H7_PA11_FUNC_OTG_FS_DM 0xb0b 158 #define STM32H7_PA11_FUNC_LCD_R4 0xb0f 159 #define STM32H7_PA11_FUNC_EVENTOUT 0xb10 160 #define STM32H7_PA11_FUNC_ANALOG 0xb11 161 162 #define STM32H7_PA12_FUNC_GPIO 0xc00 163 #define STM32H7_PA12_FUNC_TIM1_ETR 0xc02 164 #define STM32H7_PA12_FUNC_HRTIM_CHD2 0xc03 165 #define STM32H7_PA12_FUNC_LPUART1_RTS 0xc04 166 #define STM32H7_PA12_FUNC_SPI2_SCK_I2S2_CK 0xc06 167 #define STM32H7_PA12_FUNC_UART4_TX 0xc07 168 #define STM32H7_PA12_FUNC_USART1_RTS 0xc08 169 #define STM32H7_PA12_FUNC_SAI2_FS_B 0xc09 170 #define STM32H7_PA12_FUNC_CAN1_TX 0xc0a 171 #define STM32H7_PA12_FUNC_OTG_FS_DP 0xc0b 172 #define STM32H7_PA12_FUNC_LCD_R5 0xc0f 173 #define STM32H7_PA12_FUNC_EVENTOUT 0xc10 174 #define STM32H7_PA12_FUNC_ANALOG 0xc11 175 176 #define STM32H7_PA13_FUNC_GPIO 0xd00 177 #define STM32H7_PA13_FUNC_JTMS_SWDIO 0xd01 178 #define STM32H7_PA13_FUNC_EVENTOUT 0xd10 179 #define STM32H7_PA13_FUNC_ANALOG 0xd11 180 181 #define STM32H7_PA14_FUNC_GPIO 0xe00 182 #define STM32H7_PA14_FUNC_JTCK_SWCLK 0xe01 183 #define STM32H7_PA14_FUNC_EVENTOUT 0xe10 184 #define STM32H7_PA14_FUNC_ANALOG 0xe11 185 186 #define STM32H7_PA15_FUNC_GPIO 0xf00 187 #define STM32H7_PA15_FUNC_JTDI 0xf01 188 #define STM32H7_PA15_FUNC_TIM2_CH1_TIM2_ETR 0xf02 189 #define STM32H7_PA15_FUNC_HRTIM_FLT1 0xf03 190 #define STM32H7_PA15_FUNC_HDMI_CEC 0xf05 191 #define STM32H7_PA15_FUNC_SPI1_NSS_I2S1_WS 0xf06 192 #define STM32H7_PA15_FUNC_SPI3_NSS_I2S3_WS 0xf07 193 #define STM32H7_PA15_FUNC_SPI6_NSS 0xf08 194 #define STM32H7_PA15_FUNC_UART4_RTS 0xf09 195 #define STM32H7_PA15_FUNC_UART7_TX 0xf0c 196 #define STM32H7_PA15_FUNC_DSI_TE 0xf0e 197 #define STM32H7_PA15_FUNC_EVENTOUT 0xf10 198 #define STM32H7_PA15_FUNC_ANALOG 0xf11 199 200 #define STM32H7_PB0_FUNC_GPIO 0x1000 201 #define STM32H7_PB0_FUNC_TIM1_CH2N 0x1002 202 #define STM32H7_PB0_FUNC_TIM3_CH3 0x1003 203 #define STM32H7_PB0_FUNC_TIM8_CH2N 0x1004 204 #define STM32H7_PB0_FUNC_DFSDM_CKOUT 0x1007 205 #define STM32H7_PB0_FUNC_UART4_CTS 0x1009 206 #define STM32H7_PB0_FUNC_LCD_R3 0x100a 207 #define STM32H7_PB0_FUNC_OTG_HS_ULPI_D1 0x100b 208 #define STM32H7_PB0_FUNC_ETH_MII_RXD2 0x100c 209 #define STM32H7_PB0_FUNC_LCD_G1 0x100f 210 #define STM32H7_PB0_FUNC_EVENTOUT 0x1010 211 #define STM32H7_PB0_FUNC_ANALOG 0x1011 212 213 #define STM32H7_PB1_FUNC_GPIO 0x1100 214 #define STM32H7_PB1_FUNC_TIM1_CH3N 0x1102 215 #define STM32H7_PB1_FUNC_TIM3_CH4 0x1103 216 #define STM32H7_PB1_FUNC_TIM8_CH3N 0x1104 217 #define STM32H7_PB1_FUNC_DFSDM_DATIN1 0x1107 218 #define STM32H7_PB1_FUNC_LCD_R6 0x110a 219 #define STM32H7_PB1_FUNC_OTG_HS_ULPI_D2 0x110b 220 #define STM32H7_PB1_FUNC_ETH_MII_RXD3 0x110c 221 #define STM32H7_PB1_FUNC_LCD_G0 0x110f 222 #define STM32H7_PB1_FUNC_EVENTOUT 0x1110 223 #define STM32H7_PB1_FUNC_ANALOG 0x1111 224 225 #define STM32H7_PB2_FUNC_GPIO 0x1200 226 #define STM32H7_PB2_FUNC_SAI1_D1 0x1203 227 #define STM32H7_PB2_FUNC_DFSDM_CKIN1 0x1205 228 #define STM32H7_PB2_FUNC_SAI1_SD_A 0x1207 229 #define STM32H7_PB2_FUNC_SPI3_MOSI_I2S3_SDO 0x1208 230 #define STM32H7_PB2_FUNC_SAI4_SD_A 0x1209 231 #define STM32H7_PB2_FUNC_QUADSPI_CLK 0x120a 232 #define STM32H7_PB2_FUNC_SAI4_D1 0x120b 233 #define STM32H7_PB2_FUNC_ETH_TX_ER 0x120c 234 #define STM32H7_PB2_FUNC_EVENTOUT 0x1210 235 #define STM32H7_PB2_FUNC_ANALOG 0x1211 236 237 #define STM32H7_PB3_FUNC_GPIO 0x1300 238 #define STM32H7_PB3_FUNC_JTDO_TRACESWO 0x1301 239 #define STM32H7_PB3_FUNC_TIM2_CH2 0x1302 240 #define STM32H7_PB3_FUNC_HRTIM_FLT4 0x1303 241 #define STM32H7_PB3_FUNC_SPI1_SCK_I2S1_CK 0x1306 242 #define STM32H7_PB3_FUNC_SPI3_SCK_I2S3_CK 0x1307 243 #define STM32H7_PB3_FUNC_SPI6_SCK 0x1309 244 #define STM32H7_PB3_FUNC_SDMMC2_D2 0x130a 245 #define STM32H7_PB3_FUNC_UART7_RX 0x130c 246 #define STM32H7_PB3_FUNC_EVENTOUT 0x1310 247 #define STM32H7_PB3_FUNC_ANALOG 0x1311 248 249 #define STM32H7_PB4_FUNC_GPIO 0x1400 250 #define STM32H7_PB4_FUNC_NJTRST 0x1401 251 #define STM32H7_PB4_FUNC_TIM16_BKIN 0x1402 252 #define STM32H7_PB4_FUNC_TIM3_CH1 0x1403 253 #define STM32H7_PB4_FUNC_HRTIM_EEV6 0x1404 254 #define STM32H7_PB4_FUNC_SPI1_MISO_I2S1_SDI 0x1406 255 #define STM32H7_PB4_FUNC_SPI3_MISO_I2S3_SDI 0x1407 256 #define STM32H7_PB4_FUNC_SPI2_NSS_I2S2_WS 0x1408 257 #define STM32H7_PB4_FUNC_SPI6_MISO 0x1409 258 #define STM32H7_PB4_FUNC_SDMMC2_D3 0x140a 259 #define STM32H7_PB4_FUNC_UART7_TX 0x140c 260 #define STM32H7_PB4_FUNC_EVENTOUT 0x1410 261 #define STM32H7_PB4_FUNC_ANALOG 0x1411 262 263 #define STM32H7_PB5_FUNC_GPIO 0x1500 264 #define STM32H7_PB5_FUNC_TIM17_BKIN 0x1502 265 #define STM32H7_PB5_FUNC_TIM3_CH2 0x1503 266 #define STM32H7_PB5_FUNC_HRTIM_EEV7 0x1504 267 #define STM32H7_PB5_FUNC_I2C1_SMBA 0x1505 268 #define STM32H7_PB5_FUNC_SPI1_MOSI_I2S1_SDO 0x1506 269 #define STM32H7_PB5_FUNC_I2C4_SMBA 0x1507 270 #define STM32H7_PB5_FUNC_SPI3_MOSI_I2S3_SDO 0x1508 271 #define STM32H7_PB5_FUNC_SPI6_MOSI 0x1509 272 #define STM32H7_PB5_FUNC_CAN2_RX 0x150a 273 #define STM32H7_PB5_FUNC_OTG_HS_ULPI_D7 0x150b 274 #define STM32H7_PB5_FUNC_ETH_PPS_OUT 0x150c 275 #define STM32H7_PB5_FUNC_FMC_SDCKE1 0x150d 276 #define STM32H7_PB5_FUNC_DCMI_D10 0x150e 277 #define STM32H7_PB5_FUNC_UART5_RX 0x150f 278 #define STM32H7_PB5_FUNC_EVENTOUT 0x1510 279 #define STM32H7_PB5_FUNC_ANALOG 0x1511 280 281 #define STM32H7_PB6_FUNC_GPIO 0x1600 282 #define STM32H7_PB6_FUNC_TIM16_CH1N 0x1602 283 #define STM32H7_PB6_FUNC_TIM4_CH1 0x1603 284 #define STM32H7_PB6_FUNC_HRTIM_EEV8 0x1604 285 #define STM32H7_PB6_FUNC_I2C1_SCL 0x1605 286 #define STM32H7_PB6_FUNC_HDMI_CEC 0x1606 287 #define STM32H7_PB6_FUNC_I2C4_SCL 0x1607 288 #define STM32H7_PB6_FUNC_USART1_TX 0x1608 289 #define STM32H7_PB6_FUNC_LPUART1_TX 0x1609 290 #define STM32H7_PB6_FUNC_CAN2_TX 0x160a 291 #define STM32H7_PB6_FUNC_QUADSPI_BK1_NCS 0x160b 292 #define STM32H7_PB6_FUNC_DFSDM_DATIN5 0x160c 293 #define STM32H7_PB6_FUNC_FMC_SDNE1 0x160d 294 #define STM32H7_PB6_FUNC_DCMI_D5 0x160e 295 #define STM32H7_PB6_FUNC_UART5_TX 0x160f 296 #define STM32H7_PB6_FUNC_EVENTOUT 0x1610 297 #define STM32H7_PB6_FUNC_ANALOG 0x1611 298 299 #define STM32H7_PB7_FUNC_GPIO 0x1700 300 #define STM32H7_PB7_FUNC_TIM17_CH1N 0x1702 301 #define STM32H7_PB7_FUNC_TIM4_CH2 0x1703 302 #define STM32H7_PB7_FUNC_HRTIM_EEV9 0x1704 303 #define STM32H7_PB7_FUNC_I2C1_SDA 0x1705 304 #define STM32H7_PB7_FUNC_I2C4_SDA 0x1707 305 #define STM32H7_PB7_FUNC_USART1_RX 0x1708 306 #define STM32H7_PB7_FUNC_LPUART1_RX 0x1709 307 #define STM32H7_PB7_FUNC_CAN2_TXFD 0x170a 308 #define STM32H7_PB7_FUNC_DFSDM_CKIN5 0x170c 309 #define STM32H7_PB7_FUNC_FMC_NL 0x170d 310 #define STM32H7_PB7_FUNC_DCMI_VSYNC 0x170e 311 #define STM32H7_PB7_FUNC_EVENTOUT 0x1710 312 #define STM32H7_PB7_FUNC_ANALOG 0x1711 313 314 #define STM32H7_PB8_FUNC_GPIO 0x1800 315 #define STM32H7_PB8_FUNC_TIM16_CH1 0x1802 316 #define STM32H7_PB8_FUNC_TIM4_CH3 0x1803 317 #define STM32H7_PB8_FUNC_DFSDM_CKIN7 0x1804 318 #define STM32H7_PB8_FUNC_I2C1_SCL 0x1805 319 #define STM32H7_PB8_FUNC_I2C4_SCL 0x1807 320 #define STM32H7_PB8_FUNC_SDMMC1_CKIN 0x1808 321 #define STM32H7_PB8_FUNC_UART4_RX 0x1809 322 #define STM32H7_PB8_FUNC_CAN1_RX 0x180a 323 #define STM32H7_PB8_FUNC_SDMMC2_D4 0x180b 324 #define STM32H7_PB8_FUNC_ETH_MII_TXD3 0x180c 325 #define STM32H7_PB8_FUNC_SDMMC1_D4 0x180d 326 #define STM32H7_PB8_FUNC_DCMI_D6 0x180e 327 #define STM32H7_PB8_FUNC_LCD_B6 0x180f 328 #define STM32H7_PB8_FUNC_EVENTOUT 0x1810 329 #define STM32H7_PB8_FUNC_ANALOG 0x1811 330 331 #define STM32H7_PB9_FUNC_GPIO 0x1900 332 #define STM32H7_PB9_FUNC_TIM17_CH1 0x1902 333 #define STM32H7_PB9_FUNC_TIM4_CH4 0x1903 334 #define STM32H7_PB9_FUNC_DFSDM_DATIN7 0x1904 335 #define STM32H7_PB9_FUNC_I2C1_SDA 0x1905 336 #define STM32H7_PB9_FUNC_SPI2_NSS_I2S2_WS 0x1906 337 #define STM32H7_PB9_FUNC_I2C4_SDA 0x1907 338 #define STM32H7_PB9_FUNC_SDMMC1_CDIR 0x1908 339 #define STM32H7_PB9_FUNC_UART4_TX 0x1909 340 #define STM32H7_PB9_FUNC_CAN1_TX 0x190a 341 #define STM32H7_PB9_FUNC_SDMMC2_D5 0x190b 342 #define STM32H7_PB9_FUNC_I2C4_SMBA 0x190c 343 #define STM32H7_PB9_FUNC_SDMMC1_D5 0x190d 344 #define STM32H7_PB9_FUNC_DCMI_D7 0x190e 345 #define STM32H7_PB9_FUNC_LCD_B7 0x190f 346 #define STM32H7_PB9_FUNC_EVENTOUT 0x1910 347 #define STM32H7_PB9_FUNC_ANALOG 0x1911 348 349 #define STM32H7_PB10_FUNC_GPIO 0x1a00 350 #define STM32H7_PB10_FUNC_TIM2_CH3 0x1a02 351 #define STM32H7_PB10_FUNC_HRTIM_SCOUT 0x1a03 352 #define STM32H7_PB10_FUNC_LPTIM2_IN1 0x1a04 353 #define STM32H7_PB10_FUNC_I2C2_SCL 0x1a05 354 #define STM32H7_PB10_FUNC_SPI2_SCK_I2S2_CK 0x1a06 355 #define STM32H7_PB10_FUNC_DFSDM_DATIN7 0x1a07 356 #define STM32H7_PB10_FUNC_USART3_TX 0x1a08 357 #define STM32H7_PB10_FUNC_QUADSPI_BK1_NCS 0x1a0a 358 #define STM32H7_PB10_FUNC_OTG_HS_ULPI_D3 0x1a0b 359 #define STM32H7_PB10_FUNC_ETH_MII_RX_ER 0x1a0c 360 #define STM32H7_PB10_FUNC_LCD_G4 0x1a0f 361 #define STM32H7_PB10_FUNC_EVENTOUT 0x1a10 362 #define STM32H7_PB10_FUNC_ANALOG 0x1a11 363 364 #define STM32H7_PB11_FUNC_GPIO 0x1b00 365 #define STM32H7_PB11_FUNC_TIM2_CH4 0x1b02 366 #define STM32H7_PB11_FUNC_HRTIM_SCIN 0x1b03 367 #define STM32H7_PB11_FUNC_LPTIM2_ETR 0x1b04 368 #define STM32H7_PB11_FUNC_I2C2_SDA 0x1b05 369 #define STM32H7_PB11_FUNC_DFSDM_CKIN7 0x1b07 370 #define STM32H7_PB11_FUNC_USART3_RX 0x1b08 371 #define STM32H7_PB11_FUNC_OTG_HS_ULPI_D4 0x1b0b 372 #define STM32H7_PB11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN 0x1b0c 373 #define STM32H7_PB11_FUNC_DSI_TE 0x1b0e 374 #define STM32H7_PB11_FUNC_LCD_G5 0x1b0f 375 #define STM32H7_PB11_FUNC_EVENTOUT 0x1b10 376 #define STM32H7_PB11_FUNC_ANALOG 0x1b11 377 378 #define STM32H7_PB12_FUNC_GPIO 0x1c00 379 #define STM32H7_PB12_FUNC_TIM1_BKIN 0x1c02 380 #define STM32H7_PB12_FUNC_I2C2_SMBA 0x1c05 381 #define STM32H7_PB12_FUNC_SPI2_NSS_I2S2_WS 0x1c06 382 #define STM32H7_PB12_FUNC_DFSDM_DATIN1 0x1c07 383 #define STM32H7_PB12_FUNC_USART3_CK 0x1c08 384 #define STM32H7_PB12_FUNC_CAN2_RX 0x1c0a 385 #define STM32H7_PB12_FUNC_OTG_HS_ULPI_D5 0x1c0b 386 #define STM32H7_PB12_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0 0x1c0c 387 #define STM32H7_PB12_FUNC_OTG_HS_ID 0x1c0d 388 #define STM32H7_PB12_FUNC_TIM1_BKIN_COMP12 0x1c0e 389 #define STM32H7_PB12_FUNC_UART5_RX 0x1c0f 390 #define STM32H7_PB12_FUNC_EVENTOUT 0x1c10 391 #define STM32H7_PB12_FUNC_ANALOG 0x1c11 392 393 #define STM32H7_PB13_FUNC_GPIO 0x1d00 394 #define STM32H7_PB13_FUNC_TIM1_CH1N 0x1d02 395 #define STM32H7_PB13_FUNC_LPTIM2_OUT 0x1d04 396 #define STM32H7_PB13_FUNC_SPI2_SCK_I2S2_CK 0x1d06 397 #define STM32H7_PB13_FUNC_DFSDM_CKIN1 0x1d07 398 #define STM32H7_PB13_FUNC_USART3_CTS_NSS 0x1d08 399 #define STM32H7_PB13_FUNC_CAN2_TX 0x1d0a 400 #define STM32H7_PB13_FUNC_OTG_HS_ULPI_D6 0x1d0b 401 #define STM32H7_PB13_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1 0x1d0c 402 #define STM32H7_PB13_FUNC_UART5_TX 0x1d0f 403 #define STM32H7_PB13_FUNC_EVENTOUT 0x1d10 404 #define STM32H7_PB13_FUNC_ANALOG 0x1d11 405 406 #define STM32H7_PB14_FUNC_GPIO 0x1e00 407 #define STM32H7_PB14_FUNC_TIM1_CH2N 0x1e02 408 #define STM32H7_PB14_FUNC_TIM8_CH2N 0x1e04 409 #define STM32H7_PB14_FUNC_USART1_TX 0x1e05 410 #define STM32H7_PB14_FUNC_SPI2_MISO_I2S2_SDI 0x1e06 411 #define STM32H7_PB14_FUNC_DFSDM_DATIN2 0x1e07 412 #define STM32H7_PB14_FUNC_USART3_RTS 0x1e08 413 #define STM32H7_PB14_FUNC_UART4_RTS 0x1e09 414 #define STM32H7_PB14_FUNC_SDMMC2_D0 0x1e0a 415 #define STM32H7_PB14_FUNC_OTG_HS_DM 0x1e0d 416 #define STM32H7_PB14_FUNC_EVENTOUT 0x1e10 417 #define STM32H7_PB14_FUNC_ANALOG 0x1e11 418 419 #define STM32H7_PB15_FUNC_GPIO 0x1f00 420 #define STM32H7_PB15_FUNC_RTC_REFIN 0x1f01 421 #define STM32H7_PB15_FUNC_TIM1_CH3N 0x1f02 422 #define STM32H7_PB15_FUNC_TIM8_CH3N 0x1f04 423 #define STM32H7_PB15_FUNC_USART1_RX 0x1f05 424 #define STM32H7_PB15_FUNC_SPI2_MOSI_I2S2_SDO 0x1f06 425 #define STM32H7_PB15_FUNC_DFSDM_CKIN2 0x1f07 426 #define STM32H7_PB15_FUNC_UART4_CTS 0x1f09 427 #define STM32H7_PB15_FUNC_SDMMC2_D1 0x1f0a 428 #define STM32H7_PB15_FUNC_OTG_HS_DP 0x1f0d 429 #define STM32H7_PB15_FUNC_EVENTOUT 0x1f10 430 #define STM32H7_PB15_FUNC_ANALOG 0x1f11 431 432 #define STM32H7_PC0_FUNC_GPIO 0x2000 433 #define STM32H7_PC0_FUNC_DFSDM_CKIN0 0x2004 434 #define STM32H7_PC0_FUNC_DFSDM_DATIN4 0x2007 435 #define STM32H7_PC0_FUNC_SAI2_FS_B 0x2009 436 #define STM32H7_PC0_FUNC_OTG_HS_ULPI_STP 0x200b 437 #define STM32H7_PC0_FUNC_FMC_SDNWE 0x200d 438 #define STM32H7_PC0_FUNC_LCD_R5 0x200f 439 #define STM32H7_PC0_FUNC_EVENTOUT 0x2010 440 #define STM32H7_PC0_FUNC_ANALOG 0x2011 441 442 #define STM32H7_PC1_FUNC_GPIO 0x2100 443 #define STM32H7_PC1_FUNC_TRACED0 0x2101 444 #define STM32H7_PC1_FUNC_SAI1_D1 0x2103 445 #define STM32H7_PC1_FUNC_DFSDM_DATIN0 0x2104 446 #define STM32H7_PC1_FUNC_DFSDM_CKIN4 0x2105 447 #define STM32H7_PC1_FUNC_SPI2_MOSI_I2S2_SDO 0x2106 448 #define STM32H7_PC1_FUNC_SAI1_SD_A 0x2107 449 #define STM32H7_PC1_FUNC_SAI4_SD_A 0x2109 450 #define STM32H7_PC1_FUNC_SDMMC2_CK 0x210a 451 #define STM32H7_PC1_FUNC_SAI4_D1 0x210b 452 #define STM32H7_PC1_FUNC_ETH_MDC 0x210c 453 #define STM32H7_PC1_FUNC_MDIOS_MDC 0x210d 454 #define STM32H7_PC1_FUNC_EVENTOUT 0x2110 455 #define STM32H7_PC1_FUNC_ANALOG 0x2111 456 457 #define STM32H7_PC2_FUNC_GPIO 0x2200 458 #define STM32H7_PC2_FUNC_DFSDM_CKIN1 0x2204 459 #define STM32H7_PC2_FUNC_SPI2_MISO_I2S2_SDI 0x2206 460 #define STM32H7_PC2_FUNC_DFSDM_CKOUT 0x2207 461 #define STM32H7_PC2_FUNC_OTG_HS_ULPI_DIR 0x220b 462 #define STM32H7_PC2_FUNC_ETH_MII_TXD2 0x220c 463 #define STM32H7_PC2_FUNC_FMC_SDNE0 0x220d 464 #define STM32H7_PC2_FUNC_EVENTOUT 0x2210 465 #define STM32H7_PC2_FUNC_ANALOG 0x2211 466 467 #define STM32H7_PC3_FUNC_GPIO 0x2300 468 #define STM32H7_PC3_FUNC_DFSDM_DATIN1 0x2304 469 #define STM32H7_PC3_FUNC_SPI2_MOSI_I2S2_SDO 0x2306 470 #define STM32H7_PC3_FUNC_OTG_HS_ULPI_NXT 0x230b 471 #define STM32H7_PC3_FUNC_ETH_MII_TX_CLK 0x230c 472 #define STM32H7_PC3_FUNC_FMC_SDCKE0 0x230d 473 #define STM32H7_PC3_FUNC_EVENTOUT 0x2310 474 #define STM32H7_PC3_FUNC_ANALOG 0x2311 475 476 #define STM32H7_PC4_FUNC_GPIO 0x2400 477 #define STM32H7_PC4_FUNC_DFSDM_CKIN2 0x2404 478 #define STM32H7_PC4_FUNC_I2S1_MCK 0x2406 479 #define STM32H7_PC4_FUNC_SPDIFRX_IN2 0x240a 480 #define STM32H7_PC4_FUNC_ETH_MII_RXD0_ETH_RMII_RXD0 0x240c 481 #define STM32H7_PC4_FUNC_FMC_SDNE0 0x240d 482 #define STM32H7_PC4_FUNC_EVENTOUT 0x2410 483 #define STM32H7_PC4_FUNC_ANALOG 0x2411 484 485 #define STM32H7_PC5_FUNC_GPIO 0x2500 486 #define STM32H7_PC5_FUNC_SAI1_D3 0x2503 487 #define STM32H7_PC5_FUNC_DFSDM_DATIN2 0x2504 488 #define STM32H7_PC5_FUNC_SPDIFRX_IN3 0x250a 489 #define STM32H7_PC5_FUNC_SAI4_D3 0x250b 490 #define STM32H7_PC5_FUNC_ETH_MII_RXD1_ETH_RMII_RXD1 0x250c 491 #define STM32H7_PC5_FUNC_FMC_SDCKE0 0x250d 492 #define STM32H7_PC5_FUNC_COMP_1_OUT 0x250e 493 #define STM32H7_PC5_FUNC_EVENTOUT 0x2510 494 #define STM32H7_PC5_FUNC_ANALOG 0x2511 495 496 #define STM32H7_PC6_FUNC_GPIO 0x2600 497 #define STM32H7_PC6_FUNC_HRTIM_CHA1 0x2602 498 #define STM32H7_PC6_FUNC_TIM3_CH1 0x2603 499 #define STM32H7_PC6_FUNC_TIM8_CH1 0x2604 500 #define STM32H7_PC6_FUNC_DFSDM_CKIN3 0x2605 501 #define STM32H7_PC6_FUNC_I2S2_MCK 0x2606 502 #define STM32H7_PC6_FUNC_USART6_TX 0x2608 503 #define STM32H7_PC6_FUNC_SDMMC1_D0DIR 0x2609 504 #define STM32H7_PC6_FUNC_FMC_NWAIT 0x260a 505 #define STM32H7_PC6_FUNC_SDMMC2_D6 0x260b 506 #define STM32H7_PC6_FUNC_SDMMC1_D6 0x260d 507 #define STM32H7_PC6_FUNC_DCMI_D0 0x260e 508 #define STM32H7_PC6_FUNC_LCD_HSYNC 0x260f 509 #define STM32H7_PC6_FUNC_EVENTOUT 0x2610 510 #define STM32H7_PC6_FUNC_ANALOG 0x2611 511 512 #define STM32H7_PC7_FUNC_GPIO 0x2700 513 #define STM32H7_PC7_FUNC_TRGIO 0x2701 514 #define STM32H7_PC7_FUNC_HRTIM_CHA2 0x2702 515 #define STM32H7_PC7_FUNC_TIM3_CH2 0x2703 516 #define STM32H7_PC7_FUNC_TIM8_CH2 0x2704 517 #define STM32H7_PC7_FUNC_DFSDM_DATIN3 0x2705 518 #define STM32H7_PC7_FUNC_I2S3_MCK 0x2707 519 #define STM32H7_PC7_FUNC_USART6_RX 0x2708 520 #define STM32H7_PC7_FUNC_SDMMC1_D123DIR 0x2709 521 #define STM32H7_PC7_FUNC_FMC_NE1 0x270a 522 #define STM32H7_PC7_FUNC_SDMMC2_D7 0x270b 523 #define STM32H7_PC7_FUNC_SWPMI_TX 0x270c 524 #define STM32H7_PC7_FUNC_SDMMC1_D7 0x270d 525 #define STM32H7_PC7_FUNC_DCMI_D1 0x270e 526 #define STM32H7_PC7_FUNC_LCD_G6 0x270f 527 #define STM32H7_PC7_FUNC_EVENTOUT 0x2710 528 #define STM32H7_PC7_FUNC_ANALOG 0x2711 529 530 #define STM32H7_PC8_FUNC_GPIO 0x2800 531 #define STM32H7_PC8_FUNC_TRACED1 0x2801 532 #define STM32H7_PC8_FUNC_HRTIM_CHB1 0x2802 533 #define STM32H7_PC8_FUNC_TIM3_CH3 0x2803 534 #define STM32H7_PC8_FUNC_TIM8_CH3 0x2804 535 #define STM32H7_PC8_FUNC_USART6_CK 0x2808 536 #define STM32H7_PC8_FUNC_UART5_RTS 0x2809 537 #define STM32H7_PC8_FUNC_FMC_NE2_FMC_NCE 0x280a 538 #define STM32H7_PC8_FUNC_SWPMI_RX 0x280c 539 #define STM32H7_PC8_FUNC_SDMMC1_D0 0x280d 540 #define STM32H7_PC8_FUNC_DCMI_D2 0x280e 541 #define STM32H7_PC8_FUNC_EVENTOUT 0x2810 542 #define STM32H7_PC8_FUNC_ANALOG 0x2811 543 544 #define STM32H7_PC9_FUNC_GPIO 0x2900 545 #define STM32H7_PC9_FUNC_MCO2 0x2901 546 #define STM32H7_PC9_FUNC_TIM3_CH4 0x2903 547 #define STM32H7_PC9_FUNC_TIM8_CH4 0x2904 548 #define STM32H7_PC9_FUNC_I2C3_SDA 0x2905 549 #define STM32H7_PC9_FUNC_I2S_CKIN 0x2906 550 #define STM32H7_PC9_FUNC_UART5_CTS 0x2909 551 #define STM32H7_PC9_FUNC_QUADSPI_BK1_IO0 0x290a 552 #define STM32H7_PC9_FUNC_LCD_G3 0x290b 553 #define STM32H7_PC9_FUNC_SWPMI_SUSPEND 0x290c 554 #define STM32H7_PC9_FUNC_SDMMC1_D1 0x290d 555 #define STM32H7_PC9_FUNC_DCMI_D3 0x290e 556 #define STM32H7_PC9_FUNC_LCD_B2 0x290f 557 #define STM32H7_PC9_FUNC_EVENTOUT 0x2910 558 #define STM32H7_PC9_FUNC_ANALOG 0x2911 559 560 #define STM32H7_PC10_FUNC_GPIO 0x2a00 561 #define STM32H7_PC10_FUNC_HRTIM_EEV1 0x2a03 562 #define STM32H7_PC10_FUNC_DFSDM_CKIN5 0x2a04 563 #define STM32H7_PC10_FUNC_SPI3_SCK_I2S3_CK 0x2a07 564 #define STM32H7_PC10_FUNC_USART3_TX 0x2a08 565 #define STM32H7_PC10_FUNC_UART4_TX 0x2a09 566 #define STM32H7_PC10_FUNC_QUADSPI_BK1_IO1 0x2a0a 567 #define STM32H7_PC10_FUNC_SDMMC1_D2 0x2a0d 568 #define STM32H7_PC10_FUNC_DCMI_D8 0x2a0e 569 #define STM32H7_PC10_FUNC_LCD_R2 0x2a0f 570 #define STM32H7_PC10_FUNC_EVENTOUT 0x2a10 571 #define STM32H7_PC10_FUNC_ANALOG 0x2a11 572 573 #define STM32H7_PC11_FUNC_GPIO 0x2b00 574 #define STM32H7_PC11_FUNC_HRTIM_FLT2 0x2b03 575 #define STM32H7_PC11_FUNC_DFSDM_DATIN5 0x2b04 576 #define STM32H7_PC11_FUNC_SPI3_MISO_I2S3_SDI 0x2b07 577 #define STM32H7_PC11_FUNC_USART3_RX 0x2b08 578 #define STM32H7_PC11_FUNC_UART4_RX 0x2b09 579 #define STM32H7_PC11_FUNC_QUADSPI_BK2_NCS 0x2b0a 580 #define STM32H7_PC11_FUNC_SDMMC1_D3 0x2b0d 581 #define STM32H7_PC11_FUNC_DCMI_D4 0x2b0e 582 #define STM32H7_PC11_FUNC_EVENTOUT 0x2b10 583 #define STM32H7_PC11_FUNC_ANALOG 0x2b11 584 585 #define STM32H7_PC12_FUNC_GPIO 0x2c00 586 #define STM32H7_PC12_FUNC_TRACED3 0x2c01 587 #define STM32H7_PC12_FUNC_HRTIM_EEV2 0x2c03 588 #define STM32H7_PC12_FUNC_SPI3_MOSI_I2S3_SDO 0x2c07 589 #define STM32H7_PC12_FUNC_USART3_CK 0x2c08 590 #define STM32H7_PC12_FUNC_UART5_TX 0x2c09 591 #define STM32H7_PC12_FUNC_SDMMC1_CK 0x2c0d 592 #define STM32H7_PC12_FUNC_DCMI_D9 0x2c0e 593 #define STM32H7_PC12_FUNC_EVENTOUT 0x2c10 594 #define STM32H7_PC12_FUNC_ANALOG 0x2c11 595 596 #define STM32H7_PC13_FUNC_GPIO 0x2d00 597 #define STM32H7_PC13_FUNC_EVENTOUT 0x2d10 598 #define STM32H7_PC13_FUNC_ANALOG 0x2d11 599 600 #define STM32H7_PC14_FUNC_GPIO 0x2e00 601 #define STM32H7_PC14_FUNC_EVENTOUT 0x2e10 602 #define STM32H7_PC14_FUNC_ANALOG 0x2e11 603 604 #define STM32H7_PC15_FUNC_GPIO 0x2f00 605 #define STM32H7_PC15_FUNC_EVENTOUT 0x2f10 606 #define STM32H7_PC15_FUNC_ANALOG 0x2f11 607 608 #define STM32H7_PD0_FUNC_GPIO 0x3000 609 #define STM32H7_PD0_FUNC_DFSDM_CKIN6 0x3004 610 #define STM32H7_PD0_FUNC_SAI3_SCK_A 0x3007 611 #define STM32H7_PD0_FUNC_UART4_RX 0x3009 612 #define STM32H7_PD0_FUNC_CAN1_RX 0x300a 613 #define STM32H7_PD0_FUNC_FMC_D2_FMC_DA2 0x300d 614 #define STM32H7_PD0_FUNC_EVENTOUT 0x3010 615 #define STM32H7_PD0_FUNC_ANALOG 0x3011 616 617 #define STM32H7_PD1_FUNC_GPIO 0x3100 618 #define STM32H7_PD1_FUNC_DFSDM_DATIN6 0x3104 619 #define STM32H7_PD1_FUNC_SAI3_SD_A 0x3107 620 #define STM32H7_PD1_FUNC_UART4_TX 0x3109 621 #define STM32H7_PD1_FUNC_CAN1_TX 0x310a 622 #define STM32H7_PD1_FUNC_FMC_D3_FMC_DA3 0x310d 623 #define STM32H7_PD1_FUNC_EVENTOUT 0x3110 624 #define STM32H7_PD1_FUNC_ANALOG 0x3111 625 626 #define STM32H7_PD2_FUNC_GPIO 0x3200 627 #define STM32H7_PD2_FUNC_TRACED2 0x3201 628 #define STM32H7_PD2_FUNC_TIM3_ETR 0x3203 629 #define STM32H7_PD2_FUNC_UART5_RX 0x3209 630 #define STM32H7_PD2_FUNC_SDMMC1_CMD 0x320d 631 #define STM32H7_PD2_FUNC_DCMI_D11 0x320e 632 #define STM32H7_PD2_FUNC_EVENTOUT 0x3210 633 #define STM32H7_PD2_FUNC_ANALOG 0x3211 634 635 #define STM32H7_PD3_FUNC_GPIO 0x3300 636 #define STM32H7_PD3_FUNC_DFSDM_CKOUT 0x3304 637 #define STM32H7_PD3_FUNC_SPI2_SCK_I2S2_CK 0x3306 638 #define STM32H7_PD3_FUNC_USART2_CTS_NSS 0x3308 639 #define STM32H7_PD3_FUNC_FMC_CLK 0x330d 640 #define STM32H7_PD3_FUNC_DCMI_D5 0x330e 641 #define STM32H7_PD3_FUNC_LCD_G7 0x330f 642 #define STM32H7_PD3_FUNC_EVENTOUT 0x3310 643 #define STM32H7_PD3_FUNC_ANALOG 0x3311 644 645 #define STM32H7_PD4_FUNC_GPIO 0x3400 646 #define STM32H7_PD4_FUNC_HRTIM_FLT3 0x3403 647 #define STM32H7_PD4_FUNC_SAI3_FS_A 0x3407 648 #define STM32H7_PD4_FUNC_USART2_RTS 0x3408 649 #define STM32H7_PD4_FUNC_CAN1_RXFD 0x340a 650 #define STM32H7_PD4_FUNC_FMC_NOE 0x340d 651 #define STM32H7_PD4_FUNC_EVENTOUT 0x3410 652 #define STM32H7_PD4_FUNC_ANALOG 0x3411 653 654 #define STM32H7_PD5_FUNC_GPIO 0x3500 655 #define STM32H7_PD5_FUNC_HRTIM_EEV3 0x3503 656 #define STM32H7_PD5_FUNC_USART2_TX 0x3508 657 #define STM32H7_PD5_FUNC_CAN1_TXFD 0x350a 658 #define STM32H7_PD5_FUNC_FMC_NWE 0x350d 659 #define STM32H7_PD5_FUNC_EVENTOUT 0x3510 660 #define STM32H7_PD5_FUNC_ANALOG 0x3511 661 662 #define STM32H7_PD6_FUNC_GPIO 0x3600 663 #define STM32H7_PD6_FUNC_SAI1_D1 0x3603 664 #define STM32H7_PD6_FUNC_DFSDM_CKIN4 0x3604 665 #define STM32H7_PD6_FUNC_DFSDM_DATIN1 0x3605 666 #define STM32H7_PD6_FUNC_SPI3_MOSI_I2S3_SDO 0x3606 667 #define STM32H7_PD6_FUNC_SAI1_SD_A 0x3607 668 #define STM32H7_PD6_FUNC_USART2_RX 0x3608 669 #define STM32H7_PD6_FUNC_SAI4_SD_A 0x3609 670 #define STM32H7_PD6_FUNC_CAN2_RXFD 0x360a 671 #define STM32H7_PD6_FUNC_SAI4_D1 0x360b 672 #define STM32H7_PD6_FUNC_SDMMC2_CK 0x360c 673 #define STM32H7_PD6_FUNC_FMC_NWAIT 0x360d 674 #define STM32H7_PD6_FUNC_DCMI_D10 0x360e 675 #define STM32H7_PD6_FUNC_LCD_B2 0x360f 676 #define STM32H7_PD6_FUNC_EVENTOUT 0x3610 677 #define STM32H7_PD6_FUNC_ANALOG 0x3611 678 679 #define STM32H7_PD7_FUNC_GPIO 0x3700 680 #define STM32H7_PD7_FUNC_DFSDM_DATIN4 0x3704 681 #define STM32H7_PD7_FUNC_SPI1_MOSI_I2S1_SDO 0x3706 682 #define STM32H7_PD7_FUNC_DFSDM_CKIN1 0x3707 683 #define STM32H7_PD7_FUNC_USART2_CK 0x3708 684 #define STM32H7_PD7_FUNC_SPDIFRX_IN0 0x370a 685 #define STM32H7_PD7_FUNC_SDMMC2_CMD 0x370c 686 #define STM32H7_PD7_FUNC_FMC_NE1 0x370d 687 #define STM32H7_PD7_FUNC_EVENTOUT 0x3710 688 #define STM32H7_PD7_FUNC_ANALOG 0x3711 689 690 #define STM32H7_PD8_FUNC_GPIO 0x3800 691 #define STM32H7_PD8_FUNC_DFSDM_CKIN3 0x3804 692 #define STM32H7_PD8_FUNC_SAI3_SCK_B 0x3807 693 #define STM32H7_PD8_FUNC_USART3_TX 0x3808 694 #define STM32H7_PD8_FUNC_SPDIFRX_IN1 0x380a 695 #define STM32H7_PD8_FUNC_FMC_D13_FMC_DA13 0x380d 696 #define STM32H7_PD8_FUNC_EVENTOUT 0x3810 697 #define STM32H7_PD8_FUNC_ANALOG 0x3811 698 699 #define STM32H7_PD9_FUNC_GPIO 0x3900 700 #define STM32H7_PD9_FUNC_DFSDM_DATIN3 0x3904 701 #define STM32H7_PD9_FUNC_SAI3_SD_B 0x3907 702 #define STM32H7_PD9_FUNC_USART3_RX 0x3908 703 #define STM32H7_PD9_FUNC_CAN2_RXFD 0x390a 704 #define STM32H7_PD9_FUNC_FMC_D14_FMC_DA14 0x390d 705 #define STM32H7_PD9_FUNC_EVENTOUT 0x3910 706 #define STM32H7_PD9_FUNC_ANALOG 0x3911 707 708 #define STM32H7_PD10_FUNC_GPIO 0x3a00 709 #define STM32H7_PD10_FUNC_DFSDM_CKOUT 0x3a04 710 #define STM32H7_PD10_FUNC_SAI3_FS_B 0x3a07 711 #define STM32H7_PD10_FUNC_USART3_CK 0x3a08 712 #define STM32H7_PD10_FUNC_CAN2_TXFD 0x3a0a 713 #define STM32H7_PD10_FUNC_FMC_D15_FMC_DA15 0x3a0d 714 #define STM32H7_PD10_FUNC_LCD_B3 0x3a0f 715 #define STM32H7_PD10_FUNC_EVENTOUT 0x3a10 716 #define STM32H7_PD10_FUNC_ANALOG 0x3a11 717 718 #define STM32H7_PD11_FUNC_GPIO 0x3b00 719 #define STM32H7_PD11_FUNC_LPTIM2_IN2 0x3b04 720 #define STM32H7_PD11_FUNC_I2C4_SMBA 0x3b05 721 #define STM32H7_PD11_FUNC_USART3_CTS_NSS 0x3b08 722 #define STM32H7_PD11_FUNC_QUADSPI_BK1_IO0 0x3b0a 723 #define STM32H7_PD11_FUNC_SAI2_SD_A 0x3b0b 724 #define STM32H7_PD11_FUNC_FMC_A16 0x3b0d 725 #define STM32H7_PD11_FUNC_EVENTOUT 0x3b10 726 #define STM32H7_PD11_FUNC_ANALOG 0x3b11 727 728 #define STM32H7_PD12_FUNC_GPIO 0x3c00 729 #define STM32H7_PD12_FUNC_LPTIM1_IN1 0x3c02 730 #define STM32H7_PD12_FUNC_TIM4_CH1 0x3c03 731 #define STM32H7_PD12_FUNC_LPTIM2_IN1 0x3c04 732 #define STM32H7_PD12_FUNC_I2C4_SCL 0x3c05 733 #define STM32H7_PD12_FUNC_USART3_RTS 0x3c08 734 #define STM32H7_PD12_FUNC_QUADSPI_BK1_IO1 0x3c0a 735 #define STM32H7_PD12_FUNC_SAI2_FS_A 0x3c0b 736 #define STM32H7_PD12_FUNC_FMC_A17 0x3c0d 737 #define STM32H7_PD12_FUNC_EVENTOUT 0x3c10 738 #define STM32H7_PD12_FUNC_ANALOG 0x3c11 739 740 #define STM32H7_PD13_FUNC_GPIO 0x3d00 741 #define STM32H7_PD13_FUNC_LPTIM1_OUT 0x3d02 742 #define STM32H7_PD13_FUNC_TIM4_CH2 0x3d03 743 #define STM32H7_PD13_FUNC_I2C4_SDA 0x3d05 744 #define STM32H7_PD13_FUNC_QUADSPI_BK1_IO3 0x3d0a 745 #define STM32H7_PD13_FUNC_SAI2_SCK_A 0x3d0b 746 #define STM32H7_PD13_FUNC_FMC_A18 0x3d0d 747 #define STM32H7_PD13_FUNC_EVENTOUT 0x3d10 748 #define STM32H7_PD13_FUNC_ANALOG 0x3d11 749 750 #define STM32H7_PD14_FUNC_GPIO 0x3e00 751 #define STM32H7_PD14_FUNC_TIM4_CH3 0x3e03 752 #define STM32H7_PD14_FUNC_SAI3_MCLK_B 0x3e07 753 #define STM32H7_PD14_FUNC_UART8_CTS 0x3e09 754 #define STM32H7_PD14_FUNC_FMC_D0_FMC_DA0 0x3e0d 755 #define STM32H7_PD14_FUNC_EVENTOUT 0x3e10 756 #define STM32H7_PD14_FUNC_ANALOG 0x3e11 757 758 #define STM32H7_PD15_FUNC_GPIO 0x3f00 759 #define STM32H7_PD15_FUNC_TIM4_CH4 0x3f03 760 #define STM32H7_PD15_FUNC_SAI3_MCLK_A 0x3f07 761 #define STM32H7_PD15_FUNC_UART8_RTS 0x3f09 762 #define STM32H7_PD15_FUNC_FMC_D1_FMC_DA1 0x3f0d 763 #define STM32H7_PD15_FUNC_EVENTOUT 0x3f10 764 #define STM32H7_PD15_FUNC_ANALOG 0x3f11 765 766 #define STM32H7_PE0_FUNC_GPIO 0x4000 767 #define STM32H7_PE0_FUNC_LPTIM1_ETR 0x4002 768 #define STM32H7_PE0_FUNC_TIM4_ETR 0x4003 769 #define STM32H7_PE0_FUNC_HRTIM_SCIN 0x4004 770 #define STM32H7_PE0_FUNC_LPTIM2_ETR 0x4005 771 #define STM32H7_PE0_FUNC_UART8_RX 0x4009 772 #define STM32H7_PE0_FUNC_CAN1_RXFD 0x400a 773 #define STM32H7_PE0_FUNC_SAI2_MCK_A 0x400b 774 #define STM32H7_PE0_FUNC_FMC_NBL0 0x400d 775 #define STM32H7_PE0_FUNC_DCMI_D2 0x400e 776 #define STM32H7_PE0_FUNC_EVENTOUT 0x4010 777 #define STM32H7_PE0_FUNC_ANALOG 0x4011 778 779 #define STM32H7_PE1_FUNC_GPIO 0x4100 780 #define STM32H7_PE1_FUNC_LPTIM1_IN2 0x4102 781 #define STM32H7_PE1_FUNC_HRTIM_SCOUT 0x4104 782 #define STM32H7_PE1_FUNC_UART8_TX 0x4109 783 #define STM32H7_PE1_FUNC_CAN1_TXFD 0x410a 784 #define STM32H7_PE1_FUNC_FMC_NBL1 0x410d 785 #define STM32H7_PE1_FUNC_DCMI_D3 0x410e 786 #define STM32H7_PE1_FUNC_EVENTOUT 0x4110 787 #define STM32H7_PE1_FUNC_ANALOG 0x4111 788 789 #define STM32H7_PE2_FUNC_GPIO 0x4200 790 #define STM32H7_PE2_FUNC_TRACECLK 0x4201 791 #define STM32H7_PE2_FUNC_SAI1_CK1 0x4203 792 #define STM32H7_PE2_FUNC_SPI4_SCK 0x4206 793 #define STM32H7_PE2_FUNC_SAI1_MCLK_A 0x4207 794 #define STM32H7_PE2_FUNC_SAI4_MCLK_A 0x4209 795 #define STM32H7_PE2_FUNC_QUADSPI_BK1_IO2 0x420a 796 #define STM32H7_PE2_FUNC_SAI4_CK1 0x420b 797 #define STM32H7_PE2_FUNC_ETH_MII_TXD3 0x420c 798 #define STM32H7_PE2_FUNC_FMC_A23 0x420d 799 #define STM32H7_PE2_FUNC_EVENTOUT 0x4210 800 #define STM32H7_PE2_FUNC_ANALOG 0x4211 801 802 #define STM32H7_PE3_FUNC_GPIO 0x4300 803 #define STM32H7_PE3_FUNC_TRACED0 0x4301 804 #define STM32H7_PE3_FUNC_TIM15_BKIN 0x4305 805 #define STM32H7_PE3_FUNC_SAI1_SD_B 0x4307 806 #define STM32H7_PE3_FUNC_SAI4_SD_B 0x4309 807 #define STM32H7_PE3_FUNC_FMC_A19 0x430d 808 #define STM32H7_PE3_FUNC_EVENTOUT 0x4310 809 #define STM32H7_PE3_FUNC_ANALOG 0x4311 810 811 #define STM32H7_PE4_FUNC_GPIO 0x4400 812 #define STM32H7_PE4_FUNC_TRACED1 0x4401 813 #define STM32H7_PE4_FUNC_SAI1_D2 0x4403 814 #define STM32H7_PE4_FUNC_DFSDM_DATIN3 0x4404 815 #define STM32H7_PE4_FUNC_TIM15_CH1N 0x4405 816 #define STM32H7_PE4_FUNC_SPI4_NSS 0x4406 817 #define STM32H7_PE4_FUNC_SAI1_FS_A 0x4407 818 #define STM32H7_PE4_FUNC_SAI4_FS_A 0x4409 819 #define STM32H7_PE4_FUNC_SAI4_D2 0x440b 820 #define STM32H7_PE4_FUNC_FMC_A20 0x440d 821 #define STM32H7_PE4_FUNC_DCMI_D4 0x440e 822 #define STM32H7_PE4_FUNC_LCD_B0 0x440f 823 #define STM32H7_PE4_FUNC_EVENTOUT 0x4410 824 #define STM32H7_PE4_FUNC_ANALOG 0x4411 825 826 #define STM32H7_PE5_FUNC_GPIO 0x4500 827 #define STM32H7_PE5_FUNC_TRACED2 0x4501 828 #define STM32H7_PE5_FUNC_SAI1_CK2 0x4503 829 #define STM32H7_PE5_FUNC_DFSDM_CKIN3 0x4504 830 #define STM32H7_PE5_FUNC_TIM15_CH1 0x4505 831 #define STM32H7_PE5_FUNC_SPI4_MISO 0x4506 832 #define STM32H7_PE5_FUNC_SAI1_SCK_A 0x4507 833 #define STM32H7_PE5_FUNC_SAI4_SCK_A 0x4509 834 #define STM32H7_PE5_FUNC_SAI4_CK2 0x450b 835 #define STM32H7_PE5_FUNC_FMC_A21 0x450d 836 #define STM32H7_PE5_FUNC_DCMI_D6 0x450e 837 #define STM32H7_PE5_FUNC_LCD_G0 0x450f 838 #define STM32H7_PE5_FUNC_EVENTOUT 0x4510 839 #define STM32H7_PE5_FUNC_ANALOG 0x4511 840 841 #define STM32H7_PE6_FUNC_GPIO 0x4600 842 #define STM32H7_PE6_FUNC_TRACED3 0x4601 843 #define STM32H7_PE6_FUNC_TIM1_BKIN2 0x4602 844 #define STM32H7_PE6_FUNC_SAI1_D1 0x4603 845 #define STM32H7_PE6_FUNC_TIM15_CH2 0x4605 846 #define STM32H7_PE6_FUNC_SPI4_MOSI 0x4606 847 #define STM32H7_PE6_FUNC_SAI1_SD_A 0x4607 848 #define STM32H7_PE6_FUNC_SAI4_SD_A 0x4609 849 #define STM32H7_PE6_FUNC_SAI4_D1 0x460a 850 #define STM32H7_PE6_FUNC_SAI2_MCK_B 0x460b 851 #define STM32H7_PE6_FUNC_TIM1_BKIN2_COMP12 0x460c 852 #define STM32H7_PE6_FUNC_FMC_A22 0x460d 853 #define STM32H7_PE6_FUNC_DCMI_D7 0x460e 854 #define STM32H7_PE6_FUNC_LCD_G1 0x460f 855 #define STM32H7_PE6_FUNC_EVENTOUT 0x4610 856 #define STM32H7_PE6_FUNC_ANALOG 0x4611 857 858 #define STM32H7_PE7_FUNC_GPIO 0x4700 859 #define STM32H7_PE7_FUNC_TIM1_ETR 0x4702 860 #define STM32H7_PE7_FUNC_DFSDM_DATIN2 0x4704 861 #define STM32H7_PE7_FUNC_UART7_RX 0x4708 862 #define STM32H7_PE7_FUNC_QUADSPI_BK2_IO0 0x470b 863 #define STM32H7_PE7_FUNC_FMC_D4_FMC_DA4 0x470d 864 #define STM32H7_PE7_FUNC_EVENTOUT 0x4710 865 #define STM32H7_PE7_FUNC_ANALOG 0x4711 866 867 #define STM32H7_PE8_FUNC_GPIO 0x4800 868 #define STM32H7_PE8_FUNC_TIM1_CH1N 0x4802 869 #define STM32H7_PE8_FUNC_DFSDM_CKIN2 0x4804 870 #define STM32H7_PE8_FUNC_UART7_TX 0x4808 871 #define STM32H7_PE8_FUNC_QUADSPI_BK2_IO1 0x480b 872 #define STM32H7_PE8_FUNC_FMC_D5_FMC_DA5 0x480d 873 #define STM32H7_PE8_FUNC_COMP_2_OUT 0x480e 874 #define STM32H7_PE8_FUNC_EVENTOUT 0x4810 875 #define STM32H7_PE8_FUNC_ANALOG 0x4811 876 877 #define STM32H7_PE9_FUNC_GPIO 0x4900 878 #define STM32H7_PE9_FUNC_TIM1_CH1 0x4902 879 #define STM32H7_PE9_FUNC_DFSDM_CKOUT 0x4904 880 #define STM32H7_PE9_FUNC_UART7_RTS 0x4908 881 #define STM32H7_PE9_FUNC_QUADSPI_BK2_IO2 0x490b 882 #define STM32H7_PE9_FUNC_FMC_D6_FMC_DA6 0x490d 883 #define STM32H7_PE9_FUNC_EVENTOUT 0x4910 884 #define STM32H7_PE9_FUNC_ANALOG 0x4911 885 886 #define STM32H7_PE10_FUNC_GPIO 0x4a00 887 #define STM32H7_PE10_FUNC_TIM1_CH2N 0x4a02 888 #define STM32H7_PE10_FUNC_DFSDM_DATIN4 0x4a04 889 #define STM32H7_PE10_FUNC_UART7_CTS 0x4a08 890 #define STM32H7_PE10_FUNC_QUADSPI_BK2_IO3 0x4a0b 891 #define STM32H7_PE10_FUNC_FMC_D7_FMC_DA7 0x4a0d 892 #define STM32H7_PE10_FUNC_EVENTOUT 0x4a10 893 #define STM32H7_PE10_FUNC_ANALOG 0x4a11 894 895 #define STM32H7_PE11_FUNC_GPIO 0x4b00 896 #define STM32H7_PE11_FUNC_TIM1_CH2 0x4b02 897 #define STM32H7_PE11_FUNC_DFSDM_CKIN4 0x4b04 898 #define STM32H7_PE11_FUNC_SPI4_NSS 0x4b06 899 #define STM32H7_PE11_FUNC_SAI2_SD_B 0x4b0b 900 #define STM32H7_PE11_FUNC_FMC_D8_FMC_DA8 0x4b0d 901 #define STM32H7_PE11_FUNC_LCD_G3 0x4b0f 902 #define STM32H7_PE11_FUNC_EVENTOUT 0x4b10 903 #define STM32H7_PE11_FUNC_ANALOG 0x4b11 904 905 #define STM32H7_PE12_FUNC_GPIO 0x4c00 906 #define STM32H7_PE12_FUNC_TIM1_CH3N 0x4c02 907 #define STM32H7_PE12_FUNC_DFSDM_DATIN5 0x4c04 908 #define STM32H7_PE12_FUNC_SPI4_SCK 0x4c06 909 #define STM32H7_PE12_FUNC_SAI2_SCK_B 0x4c0b 910 #define STM32H7_PE12_FUNC_FMC_D9_FMC_DA9 0x4c0d 911 #define STM32H7_PE12_FUNC_COMP_1_OUT 0x4c0e 912 #define STM32H7_PE12_FUNC_LCD_B4 0x4c0f 913 #define STM32H7_PE12_FUNC_EVENTOUT 0x4c10 914 #define STM32H7_PE12_FUNC_ANALOG 0x4c11 915 916 #define STM32H7_PE13_FUNC_GPIO 0x4d00 917 #define STM32H7_PE13_FUNC_TIM1_CH3 0x4d02 918 #define STM32H7_PE13_FUNC_DFSDM_CKIN5 0x4d04 919 #define STM32H7_PE13_FUNC_SPI4_MISO 0x4d06 920 #define STM32H7_PE13_FUNC_SAI2_FS_B 0x4d0b 921 #define STM32H7_PE13_FUNC_FMC_D10_FMC_DA10 0x4d0d 922 #define STM32H7_PE13_FUNC_COMP_2_OUT 0x4d0e 923 #define STM32H7_PE13_FUNC_LCD_DE 0x4d0f 924 #define STM32H7_PE13_FUNC_EVENTOUT 0x4d10 925 #define STM32H7_PE13_FUNC_ANALOG 0x4d11 926 927 #define STM32H7_PE14_FUNC_GPIO 0x4e00 928 #define STM32H7_PE14_FUNC_TIM1_CH4 0x4e02 929 #define STM32H7_PE14_FUNC_SPI4_MOSI 0x4e06 930 #define STM32H7_PE14_FUNC_SAI2_MCK_B 0x4e0b 931 #define STM32H7_PE14_FUNC_FMC_D11_FMC_DA11 0x4e0d 932 #define STM32H7_PE14_FUNC_LCD_CLK 0x4e0f 933 #define STM32H7_PE14_FUNC_EVENTOUT 0x4e10 934 #define STM32H7_PE14_FUNC_ANALOG 0x4e11 935 936 #define STM32H7_PE15_FUNC_GPIO 0x4f00 937 #define STM32H7_PE15_FUNC_TIM1_BKIN 0x4f02 938 #define STM32H7_PE15_FUNC_HDMI__TIM1_BKIN 0x4f06 939 #define STM32H7_PE15_FUNC_FMC_D12_FMC_DA12 0x4f0d 940 #define STM32H7_PE15_FUNC_TIM1_BKIN_COMP12 0x4f0e 941 #define STM32H7_PE15_FUNC_LCD_R7 0x4f0f 942 #define STM32H7_PE15_FUNC_EVENTOUT 0x4f10 943 #define STM32H7_PE15_FUNC_ANALOG 0x4f11 944 945 #define STM32H7_PF0_FUNC_GPIO 0x5000 946 #define STM32H7_PF0_FUNC_I2C2_SDA 0x5005 947 #define STM32H7_PF0_FUNC_FMC_A0 0x500d 948 #define STM32H7_PF0_FUNC_EVENTOUT 0x5010 949 #define STM32H7_PF0_FUNC_ANALOG 0x5011 950 951 #define STM32H7_PF1_FUNC_GPIO 0x5100 952 #define STM32H7_PF1_FUNC_I2C2_SCL 0x5105 953 #define STM32H7_PF1_FUNC_FMC_A1 0x510d 954 #define STM32H7_PF1_FUNC_EVENTOUT 0x5110 955 #define STM32H7_PF1_FUNC_ANALOG 0x5111 956 957 #define STM32H7_PF2_FUNC_GPIO 0x5200 958 #define STM32H7_PF2_FUNC_I2C2_SMBA 0x5205 959 #define STM32H7_PF2_FUNC_FMC_A2 0x520d 960 #define STM32H7_PF2_FUNC_EVENTOUT 0x5210 961 #define STM32H7_PF2_FUNC_ANALOG 0x5211 962 963 #define STM32H7_PF3_FUNC_GPIO 0x5300 964 #define STM32H7_PF3_FUNC_FMC_A3 0x530d 965 #define STM32H7_PF3_FUNC_EVENTOUT 0x5310 966 #define STM32H7_PF3_FUNC_ANALOG 0x5311 967 968 #define STM32H7_PF4_FUNC_GPIO 0x5400 969 #define STM32H7_PF4_FUNC_FMC_A4 0x540d 970 #define STM32H7_PF4_FUNC_EVENTOUT 0x5410 971 #define STM32H7_PF4_FUNC_ANALOG 0x5411 972 973 #define STM32H7_PF5_FUNC_GPIO 0x5500 974 #define STM32H7_PF5_FUNC_FMC_A5 0x550d 975 #define STM32H7_PF5_FUNC_EVENTOUT 0x5510 976 #define STM32H7_PF5_FUNC_ANALOG 0x5511 977 978 #define STM32H7_PF6_FUNC_GPIO 0x5600 979 #define STM32H7_PF6_FUNC_TIM16_CH1 0x5602 980 #define STM32H7_PF6_FUNC_SPI5_NSS 0x5606 981 #define STM32H7_PF6_FUNC_SAI1_SD_B 0x5607 982 #define STM32H7_PF6_FUNC_UART7_RX 0x5608 983 #define STM32H7_PF6_FUNC_SAI4_SD_B 0x5609 984 #define STM32H7_PF6_FUNC_QUADSPI_BK1_IO3 0x560a 985 #define STM32H7_PF6_FUNC_EVENTOUT 0x5610 986 #define STM32H7_PF6_FUNC_ANALOG 0x5611 987 988 #define STM32H7_PF7_FUNC_GPIO 0x5700 989 #define STM32H7_PF7_FUNC_TIM17_CH1 0x5702 990 #define STM32H7_PF7_FUNC_SPI5_SCK 0x5706 991 #define STM32H7_PF7_FUNC_SAI1_MCLK_B 0x5707 992 #define STM32H7_PF7_FUNC_UART7_TX 0x5708 993 #define STM32H7_PF7_FUNC_SAI4_MCLK_B 0x5709 994 #define STM32H7_PF7_FUNC_QUADSPI_BK1_IO2 0x570a 995 #define STM32H7_PF7_FUNC_EVENTOUT 0x5710 996 #define STM32H7_PF7_FUNC_ANALOG 0x5711 997 998 #define STM32H7_PF8_FUNC_GPIO 0x5800 999 #define STM32H7_PF8_FUNC_TIM16_CH1N 0x5802 1000 #define STM32H7_PF8_FUNC_SPI5_MISO 0x5806 1001 #define STM32H7_PF8_FUNC_SAI1_SCK_B 0x5807 1002 #define STM32H7_PF8_FUNC_UART7_RTS 0x5808 1003 #define STM32H7_PF8_FUNC_SAI4_SCK_B 0x5809 1004 #define STM32H7_PF8_FUNC_TIM13_CH1 0x580a 1005 #define STM32H7_PF8_FUNC_QUADSPI_BK1_IO0 0x580b 1006 #define STM32H7_PF8_FUNC_EVENTOUT 0x5810 1007 #define STM32H7_PF8_FUNC_ANALOG 0x5811 1008 1009 #define STM32H7_PF9_FUNC_GPIO 0x5900 1010 #define STM32H7_PF9_FUNC_TIM17_CH1N 0x5902 1011 #define STM32H7_PF9_FUNC_SPI5_MOSI 0x5906 1012 #define STM32H7_PF9_FUNC_SAI1_FS_B 0x5907 1013 #define STM32H7_PF9_FUNC_UART7_CTS 0x5908 1014 #define STM32H7_PF9_FUNC_SAI4_FS_B 0x5909 1015 #define STM32H7_PF9_FUNC_TIM14_CH1 0x590a 1016 #define STM32H7_PF9_FUNC_QUADSPI_BK1_IO1 0x590b 1017 #define STM32H7_PF9_FUNC_EVENTOUT 0x5910 1018 #define STM32H7_PF9_FUNC_ANALOG 0x5911 1019 1020 #define STM32H7_PF10_FUNC_GPIO 0x5a00 1021 #define STM32H7_PF10_FUNC_TIM16_BKIN 0x5a02 1022 #define STM32H7_PF10_FUNC_SAI1_D3 0x5a03 1023 #define STM32H7_PF10_FUNC_QUADSPI_CLK 0x5a0a 1024 #define STM32H7_PF10_FUNC_SAI4_D3 0x5a0b 1025 #define STM32H7_PF10_FUNC_DCMI_D11 0x5a0e 1026 #define STM32H7_PF10_FUNC_LCD_DE 0x5a0f 1027 #define STM32H7_PF10_FUNC_EVENTOUT 0x5a10 1028 #define STM32H7_PF10_FUNC_ANALOG 0x5a11 1029 1030 #define STM32H7_PF11_FUNC_GPIO 0x5b00 1031 #define STM32H7_PF11_FUNC_SPI5_MOSI 0x5b06 1032 #define STM32H7_PF11_FUNC_SAI2_SD_B 0x5b0b 1033 #define STM32H7_PF11_FUNC_FMC_SDNRAS 0x5b0d 1034 #define STM32H7_PF11_FUNC_DCMI_D12 0x5b0e 1035 #define STM32H7_PF11_FUNC_EVENTOUT 0x5b10 1036 #define STM32H7_PF11_FUNC_ANALOG 0x5b11 1037 1038 #define STM32H7_PF12_FUNC_GPIO 0x5c00 1039 #define STM32H7_PF12_FUNC_FMC_A6 0x5c0d 1040 #define STM32H7_PF12_FUNC_EVENTOUT 0x5c10 1041 #define STM32H7_PF12_FUNC_ANALOG 0x5c11 1042 1043 #define STM32H7_PF13_FUNC_GPIO 0x5d00 1044 #define STM32H7_PF13_FUNC_DFSDM_DATIN6 0x5d04 1045 #define STM32H7_PF13_FUNC_I2C4_SMBA 0x5d05 1046 #define STM32H7_PF13_FUNC_FMC_A7 0x5d0d 1047 #define STM32H7_PF13_FUNC_EVENTOUT 0x5d10 1048 #define STM32H7_PF13_FUNC_ANALOG 0x5d11 1049 1050 #define STM32H7_PF14_FUNC_GPIO 0x5e00 1051 #define STM32H7_PF14_FUNC_DFSDM_CKIN6 0x5e04 1052 #define STM32H7_PF14_FUNC_I2C4_SCL 0x5e05 1053 #define STM32H7_PF14_FUNC_FMC_A8 0x5e0d 1054 #define STM32H7_PF14_FUNC_EVENTOUT 0x5e10 1055 #define STM32H7_PF14_FUNC_ANALOG 0x5e11 1056 1057 #define STM32H7_PF15_FUNC_GPIO 0x5f00 1058 #define STM32H7_PF15_FUNC_I2C4_SDA 0x5f05 1059 #define STM32H7_PF15_FUNC_FMC_A9 0x5f0d 1060 #define STM32H7_PF15_FUNC_EVENTOUT 0x5f10 1061 #define STM32H7_PF15_FUNC_ANALOG 0x5f11 1062 1063 #define STM32H7_PG0_FUNC_GPIO 0x6000 1064 #define STM32H7_PG0_FUNC_FMC_A10 0x600d 1065 #define STM32H7_PG0_FUNC_EVENTOUT 0x6010 1066 #define STM32H7_PG0_FUNC_ANALOG 0x6011 1067 1068 #define STM32H7_PG1_FUNC_GPIO 0x6100 1069 #define STM32H7_PG1_FUNC_FMC_A11 0x610d 1070 #define STM32H7_PG1_FUNC_EVENTOUT 0x6110 1071 #define STM32H7_PG1_FUNC_ANALOG 0x6111 1072 1073 #define STM32H7_PG2_FUNC_GPIO 0x6200 1074 #define STM32H7_PG2_FUNC_TIM8_BKIN 0x6204 1075 #define STM32H7_PG2_FUNC_TIM8_BKIN_COMP12 0x620c 1076 #define STM32H7_PG2_FUNC_FMC_A12 0x620d 1077 #define STM32H7_PG2_FUNC_EVENTOUT 0x6210 1078 #define STM32H7_PG2_FUNC_ANALOG 0x6211 1079 1080 #define STM32H7_PG3_FUNC_GPIO 0x6300 1081 #define STM32H7_PG3_FUNC_TIM8_BKIN2 0x6304 1082 #define STM32H7_PG3_FUNC_TIM8_BKIN2_COMP12 0x630c 1083 #define STM32H7_PG3_FUNC_FMC_A13 0x630d 1084 #define STM32H7_PG3_FUNC_EVENTOUT 0x6310 1085 #define STM32H7_PG3_FUNC_ANALOG 0x6311 1086 1087 #define STM32H7_PG4_FUNC_GPIO 0x6400 1088 #define STM32H7_PG4_FUNC_TIM1_BKIN2 0x6402 1089 #define STM32H7_PG4_FUNC_TIM1_BKIN2_COMP12 0x640c 1090 #define STM32H7_PG4_FUNC_FMC_A14_FMC_BA0 0x640d 1091 #define STM32H7_PG4_FUNC_EVENTOUT 0x6410 1092 #define STM32H7_PG4_FUNC_ANALOG 0x6411 1093 1094 #define STM32H7_PG5_FUNC_GPIO 0x6500 1095 #define STM32H7_PG5_FUNC_TIM1_ETR 0x6502 1096 #define STM32H7_PG5_FUNC_FMC_A15_FMC_BA1 0x650d 1097 #define STM32H7_PG5_FUNC_EVENTOUT 0x6510 1098 #define STM32H7_PG5_FUNC_ANALOG 0x6511 1099 1100 #define STM32H7_PG6_FUNC_GPIO 0x6600 1101 #define STM32H7_PG6_FUNC_TIM17_BKIN 0x6602 1102 #define STM32H7_PG6_FUNC_HRTIM_CHE1 0x6603 1103 #define STM32H7_PG6_FUNC_QUADSPI_BK1_NCS 0x660b 1104 #define STM32H7_PG6_FUNC_FMC_NE3 0x660d 1105 #define STM32H7_PG6_FUNC_DCMI_D12 0x660e 1106 #define STM32H7_PG6_FUNC_LCD_R7 0x660f 1107 #define STM32H7_PG6_FUNC_EVENTOUT 0x6610 1108 #define STM32H7_PG6_FUNC_ANALOG 0x6611 1109 1110 #define STM32H7_PG7_FUNC_GPIO 0x6700 1111 #define STM32H7_PG7_FUNC_HRTIM_CHE2 0x6703 1112 #define STM32H7_PG7_FUNC_SAI1_MCLK_A 0x6707 1113 #define STM32H7_PG7_FUNC_USART6_CK 0x6708 1114 #define STM32H7_PG7_FUNC_FMC_INT 0x670d 1115 #define STM32H7_PG7_FUNC_DCMI_D13 0x670e 1116 #define STM32H7_PG7_FUNC_LCD_CLK 0x670f 1117 #define STM32H7_PG7_FUNC_EVENTOUT 0x6710 1118 #define STM32H7_PG7_FUNC_ANALOG 0x6711 1119 1120 #define STM32H7_PG8_FUNC_GPIO 0x6800 1121 #define STM32H7_PG8_FUNC_TIM8_ETR 0x6804 1122 #define STM32H7_PG8_FUNC_SPI6_NSS 0x6806 1123 #define STM32H7_PG8_FUNC_USART6_RTS 0x6808 1124 #define STM32H7_PG8_FUNC_SPDIFRX_IN2 0x6809 1125 #define STM32H7_PG8_FUNC_ETH_PPS_OUT 0x680c 1126 #define STM32H7_PG8_FUNC_FMC_SDCLK 0x680d 1127 #define STM32H7_PG8_FUNC_LCD_G7 0x680f 1128 #define STM32H7_PG8_FUNC_EVENTOUT 0x6810 1129 #define STM32H7_PG8_FUNC_ANALOG 0x6811 1130 1131 #define STM32H7_PG9_FUNC_GPIO 0x6900 1132 #define STM32H7_PG9_FUNC_SPI1_MISO_I2S1_SDI 0x6906 1133 #define STM32H7_PG9_FUNC_USART6_RX 0x6908 1134 #define STM32H7_PG9_FUNC_SPDIFRX_IN3 0x6909 1135 #define STM32H7_PG9_FUNC_QUADSPI_BK2_IO2 0x690a 1136 #define STM32H7_PG9_FUNC_SAI2_FS_B 0x690b 1137 #define STM32H7_PG9_FUNC_FMC_NE2_FMC_NCE 0x690d 1138 #define STM32H7_PG9_FUNC_DCMI_VSYNC 0x690e 1139 #define STM32H7_PG9_FUNC_EVENTOUT 0x6910 1140 #define STM32H7_PG9_FUNC_ANALOG 0x6911 1141 1142 #define STM32H7_PG10_FUNC_GPIO 0x6a00 1143 #define STM32H7_PG10_FUNC_HRTIM_FLT5 0x6a03 1144 #define STM32H7_PG10_FUNC_SPI1_NSS_I2S1_WS 0x6a06 1145 #define STM32H7_PG10_FUNC_LCD_G3 0x6a0a 1146 #define STM32H7_PG10_FUNC_SAI2_SD_B 0x6a0b 1147 #define STM32H7_PG10_FUNC_FMC_NE3 0x6a0d 1148 #define STM32H7_PG10_FUNC_DCMI_D2 0x6a0e 1149 #define STM32H7_PG10_FUNC_LCD_B2 0x6a0f 1150 #define STM32H7_PG10_FUNC_EVENTOUT 0x6a10 1151 #define STM32H7_PG10_FUNC_ANALOG 0x6a11 1152 1153 #define STM32H7_PG11_FUNC_GPIO 0x6b00 1154 #define STM32H7_PG11_FUNC_HRTIM_EEV4 0x6b03 1155 #define STM32H7_PG11_FUNC_SPI1_SCK_I2S1_CK 0x6b06 1156 #define STM32H7_PG11_FUNC_SPDIFRX_IN0 0x6b09 1157 #define STM32H7_PG11_FUNC_SDMMC2_D2 0x6b0b 1158 #define STM32H7_PG11_FUNC_ETH_MII_TX_EN_ETH_RMII_TX_EN 0x6b0c 1159 #define STM32H7_PG11_FUNC_DCMI_D3 0x6b0e 1160 #define STM32H7_PG11_FUNC_LCD_B3 0x6b0f 1161 #define STM32H7_PG11_FUNC_EVENTOUT 0x6b10 1162 #define STM32H7_PG11_FUNC_ANALOG 0x6b11 1163 1164 #define STM32H7_PG12_FUNC_GPIO 0x6c00 1165 #define STM32H7_PG12_FUNC_LPTIM1_IN1 0x6c02 1166 #define STM32H7_PG12_FUNC_HRTIM_EEV5 0x6c03 1167 #define STM32H7_PG12_FUNC_SPI6_MISO 0x6c06 1168 #define STM32H7_PG12_FUNC_USART6_RTS 0x6c08 1169 #define STM32H7_PG12_FUNC_SPDIFRX_IN1 0x6c09 1170 #define STM32H7_PG12_FUNC_LCD_B4 0x6c0a 1171 #define STM32H7_PG12_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1 0x6c0c 1172 #define STM32H7_PG12_FUNC_FMC_NE4 0x6c0d 1173 #define STM32H7_PG12_FUNC_LCD_B1 0x6c0f 1174 #define STM32H7_PG12_FUNC_EVENTOUT 0x6c10 1175 #define STM32H7_PG12_FUNC_ANALOG 0x6c11 1176 1177 #define STM32H7_PG13_FUNC_GPIO 0x6d00 1178 #define STM32H7_PG13_FUNC_TRACED0 0x6d01 1179 #define STM32H7_PG13_FUNC_LPTIM1_OUT 0x6d02 1180 #define STM32H7_PG13_FUNC_HRTIM_EEV10 0x6d03 1181 #define STM32H7_PG13_FUNC_SPI6_SCK 0x6d06 1182 #define STM32H7_PG13_FUNC_USART6_CTS_NSS 0x6d08 1183 #define STM32H7_PG13_FUNC_ETH_MII_TXD0_ETH_RMII_TXD0 0x6d0c 1184 #define STM32H7_PG13_FUNC_FMC_A24 0x6d0d 1185 #define STM32H7_PG13_FUNC_LCD_R0 0x6d0f 1186 #define STM32H7_PG13_FUNC_EVENTOUT 0x6d10 1187 #define STM32H7_PG13_FUNC_ANALOG 0x6d11 1188 1189 #define STM32H7_PG14_FUNC_GPIO 0x6e00 1190 #define STM32H7_PG14_FUNC_TRACED1 0x6e01 1191 #define STM32H7_PG14_FUNC_LPTIM1_ETR 0x6e02 1192 #define STM32H7_PG14_FUNC_SPI6_MOSI 0x6e06 1193 #define STM32H7_PG14_FUNC_USART6_TX 0x6e08 1194 #define STM32H7_PG14_FUNC_QUADSPI_BK2_IO3 0x6e0a 1195 #define STM32H7_PG14_FUNC_ETH_MII_TXD1_ETH_RMII_TXD1 0x6e0c 1196 #define STM32H7_PG14_FUNC_FMC_A25 0x6e0d 1197 #define STM32H7_PG14_FUNC_LCD_B0 0x6e0f 1198 #define STM32H7_PG14_FUNC_EVENTOUT 0x6e10 1199 #define STM32H7_PG14_FUNC_ANALOG 0x6e11 1200 1201 #define STM32H7_PG15_FUNC_GPIO 0x6f00 1202 #define STM32H7_PG15_FUNC_USART6_CTS_NSS 0x6f08 1203 #define STM32H7_PG15_FUNC_FMC_SDNCAS 0x6f0d 1204 #define STM32H7_PG15_FUNC_DCMI_D13 0x6f0e 1205 #define STM32H7_PG15_FUNC_EVENTOUT 0x6f10 1206 #define STM32H7_PG15_FUNC_ANALOG 0x6f11 1207 1208 #define STM32H7_PH0_FUNC_GPIO 0x7000 1209 #define STM32H7_PH0_FUNC_EVENTOUT 0x7010 1210 #define STM32H7_PH0_FUNC_ANALOG 0x7011 1211 1212 #define STM32H7_PH1_FUNC_GPIO 0x7100 1213 #define STM32H7_PH1_FUNC_EVENTOUT 0x7110 1214 #define STM32H7_PH1_FUNC_ANALOG 0x7111 1215 1216 #define STM32H7_PH2_FUNC_GPIO 0x7200 1217 #define STM32H7_PH2_FUNC_LPTIM1_IN2 0x7202 1218 #define STM32H7_PH2_FUNC_QUADSPI_BK2_IO0 0x720a 1219 #define STM32H7_PH2_FUNC_SAI2_SCK_B 0x720b 1220 #define STM32H7_PH2_FUNC_ETH_MII_CRS 0x720c 1221 #define STM32H7_PH2_FUNC_FMC_SDCKE0 0x720d 1222 #define STM32H7_PH2_FUNC_LCD_R0 0x720f 1223 #define STM32H7_PH2_FUNC_EVENTOUT 0x7210 1224 #define STM32H7_PH2_FUNC_ANALOG 0x7211 1225 1226 #define STM32H7_PH3_FUNC_GPIO 0x7300 1227 #define STM32H7_PH3_FUNC_QUADSPI_BK2_IO1 0x730a 1228 #define STM32H7_PH3_FUNC_SAI2_MCK_B 0x730b 1229 #define STM32H7_PH3_FUNC_ETH_MII_COL 0x730c 1230 #define STM32H7_PH3_FUNC_FMC_SDNE0 0x730d 1231 #define STM32H7_PH3_FUNC_LCD_R1 0x730f 1232 #define STM32H7_PH3_FUNC_EVENTOUT 0x7310 1233 #define STM32H7_PH3_FUNC_ANALOG 0x7311 1234 1235 #define STM32H7_PH4_FUNC_GPIO 0x7400 1236 #define STM32H7_PH4_FUNC_I2C2_SCL 0x7405 1237 #define STM32H7_PH4_FUNC_LCD_G5 0x740a 1238 #define STM32H7_PH4_FUNC_OTG_HS_ULPI_NXT 0x740b 1239 #define STM32H7_PH4_FUNC_LCD_G4 0x740f 1240 #define STM32H7_PH4_FUNC_EVENTOUT 0x7410 1241 #define STM32H7_PH4_FUNC_ANALOG 0x7411 1242 1243 #define STM32H7_PH5_FUNC_GPIO 0x7500 1244 #define STM32H7_PH5_FUNC_I2C2_SDA 0x7505 1245 #define STM32H7_PH5_FUNC_SPI5_NSS 0x7506 1246 #define STM32H7_PH5_FUNC_FMC_SDNWE 0x750d 1247 #define STM32H7_PH5_FUNC_EVENTOUT 0x7510 1248 #define STM32H7_PH5_FUNC_ANALOG 0x7511 1249 1250 #define STM32H7_PH6_FUNC_GPIO 0x7600 1251 #define STM32H7_PH6_FUNC_I2C2_SMBA 0x7605 1252 #define STM32H7_PH6_FUNC_SPI5_SCK 0x7606 1253 #define STM32H7_PH6_FUNC_ETH_MII_RXD2 0x760c 1254 #define STM32H7_PH6_FUNC_FMC_SDNE1 0x760d 1255 #define STM32H7_PH6_FUNC_DCMI_D8 0x760e 1256 #define STM32H7_PH6_FUNC_EVENTOUT 0x7610 1257 #define STM32H7_PH6_FUNC_ANALOG 0x7611 1258 1259 #define STM32H7_PH7_FUNC_GPIO 0x7700 1260 #define STM32H7_PH7_FUNC_I2C3_SCL 0x7705 1261 #define STM32H7_PH7_FUNC_SPI5_MISO 0x7706 1262 #define STM32H7_PH7_FUNC_ETH_MII_RXD3 0x770c 1263 #define STM32H7_PH7_FUNC_FMC_SDCKE1 0x770d 1264 #define STM32H7_PH7_FUNC_DCMI_D9 0x770e 1265 #define STM32H7_PH7_FUNC_EVENTOUT 0x7710 1266 #define STM32H7_PH7_FUNC_ANALOG 0x7711 1267 1268 #define STM32H7_PH8_FUNC_GPIO 0x7800 1269 #define STM32H7_PH8_FUNC_TIM5_ETR 0x7803 1270 #define STM32H7_PH8_FUNC_I2C3_SDA 0x7805 1271 #define STM32H7_PH8_FUNC_FMC_D16 0x780d 1272 #define STM32H7_PH8_FUNC_DCMI_HSYNC 0x780e 1273 #define STM32H7_PH8_FUNC_LCD_R2 0x780f 1274 #define STM32H7_PH8_FUNC_EVENTOUT 0x7810 1275 #define STM32H7_PH8_FUNC_ANALOG 0x7811 1276 1277 #define STM32H7_PH9_FUNC_GPIO 0x7900 1278 #define STM32H7_PH9_FUNC_I2C3_SMBA 0x7905 1279 #define STM32H7_PH9_FUNC_FMC_D17 0x790d 1280 #define STM32H7_PH9_FUNC_DCMI_D0 0x790e 1281 #define STM32H7_PH9_FUNC_LCD_R3 0x790f 1282 #define STM32H7_PH9_FUNC_EVENTOUT 0x7910 1283 #define STM32H7_PH9_FUNC_ANALOG 0x7911 1284 1285 #define STM32H7_PH10_FUNC_GPIO 0x7a00 1286 #define STM32H7_PH10_FUNC_TIM5_CH1 0x7a03 1287 #define STM32H7_PH10_FUNC_I2C4_SMBA 0x7a05 1288 #define STM32H7_PH10_FUNC_FMC_D18 0x7a0d 1289 #define STM32H7_PH10_FUNC_DCMI_D1 0x7a0e 1290 #define STM32H7_PH10_FUNC_LCD_R4 0x7a0f 1291 #define STM32H7_PH10_FUNC_EVENTOUT 0x7a10 1292 #define STM32H7_PH10_FUNC_ANALOG 0x7a11 1293 1294 #define STM32H7_PH11_FUNC_GPIO 0x7b00 1295 #define STM32H7_PH11_FUNC_TIM5_CH2 0x7b03 1296 #define STM32H7_PH11_FUNC_I2C4_SCL 0x7b05 1297 #define STM32H7_PH11_FUNC_FMC_D19 0x7b0d 1298 #define STM32H7_PH11_FUNC_DCMI_D2 0x7b0e 1299 #define STM32H7_PH11_FUNC_LCD_R5 0x7b0f 1300 #define STM32H7_PH11_FUNC_EVENTOUT 0x7b10 1301 #define STM32H7_PH11_FUNC_ANALOG 0x7b11 1302 1303 #define STM32H7_PH12_FUNC_GPIO 0x7c00 1304 #define STM32H7_PH12_FUNC_TIM5_CH3 0x7c03 1305 #define STM32H7_PH12_FUNC_I2C4_SDA 0x7c05 1306 #define STM32H7_PH12_FUNC_FMC_D20 0x7c0d 1307 #define STM32H7_PH12_FUNC_DCMI_D3 0x7c0e 1308 #define STM32H7_PH12_FUNC_LCD_R6 0x7c0f 1309 #define STM32H7_PH12_FUNC_EVENTOUT 0x7c10 1310 #define STM32H7_PH12_FUNC_ANALOG 0x7c11 1311 1312 #define STM32H7_PH13_FUNC_GPIO 0x7d00 1313 #define STM32H7_PH13_FUNC_TIM8_CH1N 0x7d04 1314 #define STM32H7_PH13_FUNC_UART4_TX 0x7d09 1315 #define STM32H7_PH13_FUNC_CAN1_TX 0x7d0a 1316 #define STM32H7_PH13_FUNC_FMC_D21 0x7d0d 1317 #define STM32H7_PH13_FUNC_LCD_G2 0x7d0f 1318 #define STM32H7_PH13_FUNC_EVENTOUT 0x7d10 1319 #define STM32H7_PH13_FUNC_ANALOG 0x7d11 1320 1321 #define STM32H7_PH14_FUNC_GPIO 0x7e00 1322 #define STM32H7_PH14_FUNC_TIM8_CH2N 0x7e04 1323 #define STM32H7_PH14_FUNC_UART4_RX 0x7e09 1324 #define STM32H7_PH14_FUNC_CAN1_RX 0x7e0a 1325 #define STM32H7_PH14_FUNC_FMC_D22 0x7e0d 1326 #define STM32H7_PH14_FUNC_DCMI_D4 0x7e0e 1327 #define STM32H7_PH14_FUNC_LCD_G3 0x7e0f 1328 #define STM32H7_PH14_FUNC_EVENTOUT 0x7e10 1329 #define STM32H7_PH14_FUNC_ANALOG 0x7e11 1330 1331 #define STM32H7_PH15_FUNC_GPIO 0x7f00 1332 #define STM32H7_PH15_FUNC_TIM8_CH3N 0x7f04 1333 #define STM32H7_PH15_FUNC_CAN1_TXFD 0x7f0a 1334 #define STM32H7_PH15_FUNC_FMC_D23 0x7f0d 1335 #define STM32H7_PH15_FUNC_DCMI_D11 0x7f0e 1336 #define STM32H7_PH15_FUNC_LCD_G4 0x7f0f 1337 #define STM32H7_PH15_FUNC_EVENTOUT 0x7f10 1338 #define STM32H7_PH15_FUNC_ANALOG 0x7f11 1339 1340 #define STM32H7_PI0_FUNC_GPIO 0x8000 1341 #define STM32H7_PI0_FUNC_TIM5_CH4 0x8003 1342 #define STM32H7_PI0_FUNC_SPI2_NSS_I2S2_WS 0x8006 1343 #define STM32H7_PI0_FUNC_CAN1_RXFD 0x800a 1344 #define STM32H7_PI0_FUNC_FMC_D24 0x800d 1345 #define STM32H7_PI0_FUNC_DCMI_D13 0x800e 1346 #define STM32H7_PI0_FUNC_LCD_G5 0x800f 1347 #define STM32H7_PI0_FUNC_EVENTOUT 0x8010 1348 #define STM32H7_PI0_FUNC_ANALOG 0x8011 1349 1350 #define STM32H7_PI1_FUNC_GPIO 0x8100 1351 #define STM32H7_PI1_FUNC_TIM8_BKIN2 0x8104 1352 #define STM32H7_PI1_FUNC_SPI2_SCK_I2S2_CK 0x8106 1353 #define STM32H7_PI1_FUNC_TIM8_BKIN2_COMP12 0x810c 1354 #define STM32H7_PI1_FUNC_FMC_D25 0x810d 1355 #define STM32H7_PI1_FUNC_DCMI_D8 0x810e 1356 #define STM32H7_PI1_FUNC_LCD_G6 0x810f 1357 #define STM32H7_PI1_FUNC_EVENTOUT 0x8110 1358 #define STM32H7_PI1_FUNC_ANALOG 0x8111 1359 1360 #define STM32H7_PI2_FUNC_GPIO 0x8200 1361 #define STM32H7_PI2_FUNC_TIM8_CH4 0x8204 1362 #define STM32H7_PI2_FUNC_SPI2_MISO_I2S2_SDI 0x8206 1363 #define STM32H7_PI2_FUNC_FMC_D26 0x820d 1364 #define STM32H7_PI2_FUNC_DCMI_D9 0x820e 1365 #define STM32H7_PI2_FUNC_LCD_G7 0x820f 1366 #define STM32H7_PI2_FUNC_EVENTOUT 0x8210 1367 #define STM32H7_PI2_FUNC_ANALOG 0x8211 1368 1369 #define STM32H7_PI3_FUNC_GPIO 0x8300 1370 #define STM32H7_PI3_FUNC_TIM8_ETR 0x8304 1371 #define STM32H7_PI3_FUNC_SPI2_MOSI_I2S2_SDO 0x8306 1372 #define STM32H7_PI3_FUNC_FMC_D27 0x830d 1373 #define STM32H7_PI3_FUNC_DCMI_D10 0x830e 1374 #define STM32H7_PI3_FUNC_EVENTOUT 0x8310 1375 #define STM32H7_PI3_FUNC_ANALOG 0x8311 1376 1377 #define STM32H7_PI4_FUNC_GPIO 0x8400 1378 #define STM32H7_PI4_FUNC_TIM8_BKIN 0x8404 1379 #define STM32H7_PI4_FUNC_SAI2_MCK_A 0x840b 1380 #define STM32H7_PI4_FUNC_TIM8_BKIN_COMP12 0x840c 1381 #define STM32H7_PI4_FUNC_FMC_NBL2 0x840d 1382 #define STM32H7_PI4_FUNC_DCMI_D5 0x840e 1383 #define STM32H7_PI4_FUNC_LCD_B4 0x840f 1384 #define STM32H7_PI4_FUNC_EVENTOUT 0x8410 1385 #define STM32H7_PI4_FUNC_ANALOG 0x8411 1386 1387 #define STM32H7_PI5_FUNC_GPIO 0x8500 1388 #define STM32H7_PI5_FUNC_TIM8_CH1 0x8504 1389 #define STM32H7_PI5_FUNC_SAI2_SCK_A 0x850b 1390 #define STM32H7_PI5_FUNC_FMC_NBL3 0x850d 1391 #define STM32H7_PI5_FUNC_DCMI_VSYNC 0x850e 1392 #define STM32H7_PI5_FUNC_LCD_B5 0x850f 1393 #define STM32H7_PI5_FUNC_EVENTOUT 0x8510 1394 #define STM32H7_PI5_FUNC_ANALOG 0x8511 1395 1396 #define STM32H7_PI6_FUNC_GPIO 0x8600 1397 #define STM32H7_PI6_FUNC_TIM8_CH2 0x8604 1398 #define STM32H7_PI6_FUNC_SAI2_SD_A 0x860b 1399 #define STM32H7_PI6_FUNC_FMC_D28 0x860d 1400 #define STM32H7_PI6_FUNC_DCMI_D6 0x860e 1401 #define STM32H7_PI6_FUNC_LCD_B6 0x860f 1402 #define STM32H7_PI6_FUNC_EVENTOUT 0x8610 1403 #define STM32H7_PI6_FUNC_ANALOG 0x8611 1404 1405 #define STM32H7_PI7_FUNC_GPIO 0x8700 1406 #define STM32H7_PI7_FUNC_TIM8_CH3 0x8704 1407 #define STM32H7_PI7_FUNC_SAI2_FS_A 0x870b 1408 #define STM32H7_PI7_FUNC_FMC_D29 0x870d 1409 #define STM32H7_PI7_FUNC_DCMI_D7 0x870e 1410 #define STM32H7_PI7_FUNC_LCD_B7 0x870f 1411 #define STM32H7_PI7_FUNC_EVENTOUT 0x8710 1412 #define STM32H7_PI7_FUNC_ANALOG 0x8711 1413 1414 #define STM32H7_PI8_FUNC_GPIO 0x8800 1415 #define STM32H7_PI8_FUNC_EVENTOUT 0x8810 1416 #define STM32H7_PI8_FUNC_ANALOG 0x8811 1417 1418 #define STM32H7_PI9_FUNC_GPIO 0x8900 1419 #define STM32H7_PI9_FUNC_UART4_RX 0x8909 1420 #define STM32H7_PI9_FUNC_CAN1_RX 0x890a 1421 #define STM32H7_PI9_FUNC_FMC_D30 0x890d 1422 #define STM32H7_PI9_FUNC_LCD_VSYNC 0x890f 1423 #define STM32H7_PI9_FUNC_EVENTOUT 0x8910 1424 #define STM32H7_PI9_FUNC_ANALOG 0x8911 1425 1426 #define STM32H7_PI10_FUNC_GPIO 0x8a00 1427 #define STM32H7_PI10_FUNC_CAN1_RXFD 0x8a0a 1428 #define STM32H7_PI10_FUNC_ETH_MII_RX_ER 0x8a0c 1429 #define STM32H7_PI10_FUNC_FMC_D31 0x8a0d 1430 #define STM32H7_PI10_FUNC_LCD_HSYNC 0x8a0f 1431 #define STM32H7_PI10_FUNC_EVENTOUT 0x8a10 1432 #define STM32H7_PI10_FUNC_ANALOG 0x8a11 1433 1434 #define STM32H7_PI11_FUNC_GPIO 0x8b00 1435 #define STM32H7_PI11_FUNC_LCD_G6 0x8b0a 1436 #define STM32H7_PI11_FUNC_OTG_HS_ULPI_DIR 0x8b0b 1437 #define STM32H7_PI11_FUNC_EVENTOUT 0x8b10 1438 #define STM32H7_PI11_FUNC_ANALOG 0x8b11 1439 1440 #define STM32H7_PI12_FUNC_GPIO 0x8c00 1441 #define STM32H7_PI12_FUNC_ETH_TX_ER 0x8c0c 1442 #define STM32H7_PI12_FUNC_LCD_HSYNC 0x8c0f 1443 #define STM32H7_PI12_FUNC_EVENTOUT 0x8c10 1444 #define STM32H7_PI12_FUNC_ANALOG 0x8c11 1445 1446 #define STM32H7_PI13_FUNC_GPIO 0x8d00 1447 #define STM32H7_PI13_FUNC_LCD_VSYNC 0x8d0f 1448 #define STM32H7_PI13_FUNC_EVENTOUT 0x8d10 1449 #define STM32H7_PI13_FUNC_ANALOG 0x8d11 1450 1451 #define STM32H7_PI14_FUNC_GPIO 0x8e00 1452 #define STM32H7_PI14_FUNC_LCD_CLK 0x8e0f 1453 #define STM32H7_PI14_FUNC_EVENTOUT 0x8e10 1454 #define STM32H7_PI14_FUNC_ANALOG 0x8e11 1455 1456 #define STM32H7_PI15_FUNC_GPIO 0x8f00 1457 #define STM32H7_PI15_FUNC_LCD_G2 0x8f0a 1458 #define STM32H7_PI15_FUNC_LCD_R0 0x8f0f 1459 #define STM32H7_PI15_FUNC_EVENTOUT 0x8f10 1460 #define STM32H7_PI15_FUNC_ANALOG 0x8f11 1461 1462 #define STM32H7_PJ0_FUNC_GPIO 0x9000 1463 #define STM32H7_PJ0_FUNC_LCD_R7 0x900a 1464 #define STM32H7_PJ0_FUNC_LCD_R1 0x900f 1465 #define STM32H7_PJ0_FUNC_EVENTOUT 0x9010 1466 #define STM32H7_PJ0_FUNC_ANALOG 0x9011 1467 1468 #define STM32H7_PJ1_FUNC_GPIO 0x9100 1469 #define STM32H7_PJ1_FUNC_LCD_R2 0x910f 1470 #define STM32H7_PJ1_FUNC_EVENTOUT 0x9110 1471 #define STM32H7_PJ1_FUNC_ANALOG 0x9111 1472 1473 #define STM32H7_PJ2_FUNC_GPIO 0x9200 1474 #define STM32H7_PJ2_FUNC_DSI_TE 0x920e 1475 #define STM32H7_PJ2_FUNC_LCD_R3 0x920f 1476 #define STM32H7_PJ2_FUNC_EVENTOUT 0x9210 1477 #define STM32H7_PJ2_FUNC_ANALOG 0x9211 1478 1479 #define STM32H7_PJ3_FUNC_GPIO 0x9300 1480 #define STM32H7_PJ3_FUNC_LCD_R4 0x930f 1481 #define STM32H7_PJ3_FUNC_EVENTOUT 0x9310 1482 #define STM32H7_PJ3_FUNC_ANALOG 0x9311 1483 1484 #define STM32H7_PJ4_FUNC_GPIO 0x9400 1485 #define STM32H7_PJ4_FUNC_LCD_R5 0x940f 1486 #define STM32H7_PJ4_FUNC_EVENTOUT 0x9410 1487 #define STM32H7_PJ4_FUNC_ANALOG 0x9411 1488 1489 #define STM32H7_PJ5_FUNC_GPIO 0x9500 1490 #define STM32H7_PJ5_FUNC_LCD_R6 0x950f 1491 #define STM32H7_PJ5_FUNC_EVENTOUT 0x9510 1492 #define STM32H7_PJ5_FUNC_ANALOG 0x9511 1493 1494 #define STM32H7_PJ6_FUNC_GPIO 0x9600 1495 #define STM32H7_PJ6_FUNC_TIM8_CH2 0x9604 1496 #define STM32H7_PJ6_FUNC_LCD_R7 0x960f 1497 #define STM32H7_PJ6_FUNC_EVENTOUT 0x9610 1498 #define STM32H7_PJ6_FUNC_ANALOG 0x9611 1499 1500 #define STM32H7_PJ7_FUNC_GPIO 0x9700 1501 #define STM32H7_PJ7_FUNC_TRGIN 0x9701 1502 #define STM32H7_PJ7_FUNC_TIM8_CH2N 0x9704 1503 #define STM32H7_PJ7_FUNC_LCD_G0 0x970f 1504 #define STM32H7_PJ7_FUNC_EVENTOUT 0x9710 1505 #define STM32H7_PJ7_FUNC_ANALOG 0x9711 1506 1507 #define STM32H7_PJ8_FUNC_GPIO 0x9800 1508 #define STM32H7_PJ8_FUNC_TIM1_CH3N 0x9802 1509 #define STM32H7_PJ8_FUNC_TIM8_CH1 0x9804 1510 #define STM32H7_PJ8_FUNC_UART8_TX 0x9809 1511 #define STM32H7_PJ8_FUNC_LCD_G1 0x980f 1512 #define STM32H7_PJ8_FUNC_EVENTOUT 0x9810 1513 #define STM32H7_PJ8_FUNC_ANALOG 0x9811 1514 1515 #define STM32H7_PJ9_FUNC_GPIO 0x9900 1516 #define STM32H7_PJ9_FUNC_TIM1_CH3 0x9902 1517 #define STM32H7_PJ9_FUNC_TIM8_CH1N 0x9904 1518 #define STM32H7_PJ9_FUNC_UART8_RX 0x9909 1519 #define STM32H7_PJ9_FUNC_LCD_G2 0x990f 1520 #define STM32H7_PJ9_FUNC_EVENTOUT 0x9910 1521 #define STM32H7_PJ9_FUNC_ANALOG 0x9911 1522 1523 #define STM32H7_PJ10_FUNC_GPIO 0x9a00 1524 #define STM32H7_PJ10_FUNC_TIM1_CH2N 0x9a02 1525 #define STM32H7_PJ10_FUNC_TIM8_CH2 0x9a04 1526 #define STM32H7_PJ10_FUNC_SPI5_MOSI 0x9a06 1527 #define STM32H7_PJ10_FUNC_LCD_G3 0x9a0f 1528 #define STM32H7_PJ10_FUNC_EVENTOUT 0x9a10 1529 #define STM32H7_PJ10_FUNC_ANALOG 0x9a11 1530 1531 #define STM32H7_PJ11_FUNC_GPIO 0x9b00 1532 #define STM32H7_PJ11_FUNC_TIM1_CH2 0x9b02 1533 #define STM32H7_PJ11_FUNC_TIM8_CH2N 0x9b04 1534 #define STM32H7_PJ11_FUNC_SPI5_MISO 0x9b06 1535 #define STM32H7_PJ11_FUNC_LCD_G4 0x9b0f 1536 #define STM32H7_PJ11_FUNC_EVENTOUT 0x9b10 1537 #define STM32H7_PJ11_FUNC_ANALOG 0x9b11 1538 1539 #define STM32H7_PJ12_FUNC_GPIO 0x9c00 1540 #define STM32H7_PJ12_FUNC_TRGOUT 0x9c01 1541 #define STM32H7_PJ12_FUNC_LCD_G3 0x9c0a 1542 #define STM32H7_PJ12_FUNC_LCD_B0 0x9c0f 1543 #define STM32H7_PJ12_FUNC_EVENTOUT 0x9c10 1544 #define STM32H7_PJ12_FUNC_ANALOG 0x9c11 1545 1546 #define STM32H7_PJ13_FUNC_GPIO 0x9d00 1547 #define STM32H7_PJ13_FUNC_LCD_B4 0x9d0a 1548 #define STM32H7_PJ13_FUNC_LCD_B1 0x9d0f 1549 #define STM32H7_PJ13_FUNC_EVENTOUT 0x9d10 1550 #define STM32H7_PJ13_FUNC_ANALOG 0x9d11 1551 1552 #define STM32H7_PJ14_FUNC_GPIO 0x9e00 1553 #define STM32H7_PJ14_FUNC_LCD_B2 0x9e0f 1554 #define STM32H7_PJ14_FUNC_EVENTOUT 0x9e10 1555 #define STM32H7_PJ14_FUNC_ANALOG 0x9e11 1556 1557 #define STM32H7_PJ15_FUNC_GPIO 0x9f00 1558 #define STM32H7_PJ15_FUNC_LCD_B3 0x9f0f 1559 #define STM32H7_PJ15_FUNC_EVENTOUT 0x9f10 1560 #define STM32H7_PJ15_FUNC_ANALOG 0x9f11 1561 1562 #define STM32H7_PK0_FUNC_GPIO 0xa000 1563 #define STM32H7_PK0_FUNC_TIM1_CH1N 0xa002 1564 #define STM32H7_PK0_FUNC_TIM8_CH3 0xa004 1565 #define STM32H7_PK0_FUNC_SPI5_SCK 0xa006 1566 #define STM32H7_PK0_FUNC_LCD_G5 0xa00f 1567 #define STM32H7_PK0_FUNC_EVENTOUT 0xa010 1568 #define STM32H7_PK0_FUNC_ANALOG 0xa011 1569 1570 #define STM32H7_PK1_FUNC_GPIO 0xa100 1571 #define STM32H7_PK1_FUNC_TIM1_CH1 0xa102 1572 #define STM32H7_PK1_FUNC_TIM8_CH3N 0xa104 1573 #define STM32H7_PK1_FUNC_SPI5_NSS 0xa106 1574 #define STM32H7_PK1_FUNC_LCD_G6 0xa10f 1575 #define STM32H7_PK1_FUNC_EVENTOUT 0xa110 1576 #define STM32H7_PK1_FUNC_ANALOG 0xa111 1577 1578 #define STM32H7_PK2_FUNC_GPIO 0xa200 1579 #define STM32H7_PK2_FUNC_TIM1_BKIN 0xa202 1580 #define STM32H7_PK2_FUNC_TIM8_BKIN 0xa204 1581 #define STM32H7_PK2_FUNC_TIM8_BKIN_COMP12 0xa20b 1582 #define STM32H7_PK2_FUNC_TIM1_BKIN_COMP12 0xa20c 1583 #define STM32H7_PK2_FUNC_LCD_G7 0xa20f 1584 #define STM32H7_PK2_FUNC_EVENTOUT 0xa210 1585 #define STM32H7_PK2_FUNC_ANALOG 0xa211 1586 1587 #define STM32H7_PK3_FUNC_GPIO 0xa300 1588 #define STM32H7_PK3_FUNC_LCD_B4 0xa30f 1589 #define STM32H7_PK3_FUNC_EVENTOUT 0xa310 1590 #define STM32H7_PK3_FUNC_ANALOG 0xa311 1591 1592 #define STM32H7_PK4_FUNC_GPIO 0xa400 1593 #define STM32H7_PK4_FUNC_LCD_B5 0xa40f 1594 #define STM32H7_PK4_FUNC_EVENTOUT 0xa410 1595 #define STM32H7_PK4_FUNC_ANALOG 0xa411 1596 1597 #define STM32H7_PK5_FUNC_GPIO 0xa500 1598 #define STM32H7_PK5_FUNC_LCD_B6 0xa50f 1599 #define STM32H7_PK5_FUNC_EVENTOUT 0xa510 1600 #define STM32H7_PK5_FUNC_ANALOG 0xa511 1601 1602 #define STM32H7_PK6_FUNC_GPIO 0xa600 1603 #define STM32H7_PK6_FUNC_LCD_B7 0xa60f 1604 #define STM32H7_PK6_FUNC_EVENTOUT 0xa610 1605 #define STM32H7_PK6_FUNC_ANALOG 0xa611 1606 1607 #define STM32H7_PK7_FUNC_GPIO 0xa700 1608 #define STM32H7_PK7_FUNC_LCD_DE 0xa70f 1609 #define STM32H7_PK7_FUNC_EVENTOUT 0xa710 1610 #define STM32H7_PK7_FUNC_ANALOG 0xa711 1611 1612 #endif /* _DT_BINDINGS_STM32H7_PINFUNC_H */ 1613