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1 #ifndef WCD9XXX_CODEC_DIGITAL_H
2 
3 #define WCD9XXX_CODEC_DIGITAL_H
4 
5 #define WCD9XXX_A_CHIP_CTL			(0x00)
6 #define WCD9XXX_A_CHIP_CTL__POR			(0x00000000)
7 #define WCD9XXX_A_CHIP_STATUS			(0x01)
8 #define WCD9XXX_A_CHIP_STATUS__POR		(0x00000000)
9 #define WCD9XXX_A_CHIP_ID_BYTE_0		(0x04)
10 #define WCD9XXX_A_CHIP_ID_BYTE_0__POR		(0x00000000)
11 #define WCD9XXX_A_CHIP_ID_BYTE_1		(0x05)
12 #define WCD9XXX_A_CHIP_ID_BYTE_1__POR		(0x00000000)
13 #define WCD9XXX_A_CHIP_ID_BYTE_2		(0x06)
14 #define WCD9XXX_A_CHIP_ID_BYTE_2__POR		(0x00000000)
15 #define WCD9XXX_A_CHIP_ID_BYTE_3		(0x07)
16 #define WCD9XXX_A_CHIP_ID_BYTE_3__POR		(0x00000001)
17 #define WCD9XXX_A_CHIP_VERSION			(0x08)
18 #define WCD9XXX_A_CHIP_VERSION__POR		(0x00000020)
19 #define WCD9XXX_A_SB_VERSION			(0x09)
20 #define WCD9XXX_A_SB_VERSION__POR		(0x00000010)
21 #define WCD9XXX_A_SLAVE_ID_1			(0x0C)
22 #define WCD9XXX_A_SLAVE_ID_1__POR		(0x00000077)
23 #define WCD9XXX_A_SLAVE_ID_2			(0x0D)
24 #define WCD9XXX_A_SLAVE_ID_2__POR		(0x00000066)
25 #define WCD9XXX_A_SLAVE_ID_3			(0x0E)
26 #define WCD9XXX_A_SLAVE_ID_3__POR		(0x00000055)
27 #define WCD9XXX_A_CDC_CTL			(0x80)
28 #define WCD9XXX_A_CDC_CTL__POR			(0x00000000)
29 #define WCD9XXX_A_LEAKAGE_CTL			(0x88)
30 #define WCD9XXX_A_LEAKAGE_CTL__POR		(0x00000004)
31 #define WCD9XXX_A_INTR_MODE			(0x90)
32 #define WCD9XXX_A_INTR_MASK0			(0x94)
33 #define WCD9XXX_A_INTR_STATUS0			(0x98)
34 #define WCD9XXX_A_INTR_CLEAR0			(0x9C)
35 #define WCD9XXX_A_INTR_LEVEL0			(0xA0)
36 #define WCD9XXX_A_INTR_LEVEL1			(0xA1)
37 #define WCD9XXX_A_INTR_LEVEL2			(0xA2)
38 #define WCD9XXX_A_RX_HPH_CNP_EN			(0x1AB)
39 #define WCD9XXX_A_RX_HPH_CNP_EN__POR		(0x80)
40 #define WCD9XXX_A_RX_HPH_CNP_EN			(0x1AB)
41 #define WCD9XXX_A_RX_HPH_CNP_EN__POR		(0x80)
42 #define WCD9XXX_A_BIAS_CENTRAL_BG_CTL		(0x101)
43 #define WCD9XXX_A_BIAS_CENTRAL_BG_CTL__POR	(0x50)
44 #define WCD9XXX_A_CLK_BUFF_EN1			(0x108)
45 #define WCD9XXX_A_CLK_BUFF_EN1__POR		(0x04)
46 #define WCD9XXX_A_CLK_BUFF_EN2			(0x109)
47 #define WCD9XXX_A_CLK_BUFF_EN2__POR		(0x02)
48 #define WCD9XXX_A_RX_COM_BIAS			(0x1A2)
49 #define WCD9XXX_A_RX_COM_BIAS__POR		(0x00)
50 #define WCD9XXX_A_RC_OSC_FREQ			(0x1FA)
51 #define WCD9XXX_A_RC_OSC_FREQ__POR		(0x46)
52 #define WCD9XXX_A_BIAS_OSC_BG_CTL		(0x105)
53 #define WCD9XXX_A_BIAS_OSC_BG_CTL__POR		(0x16)
54 #define WCD9XXX_A_RC_OSC_TEST			(0x1FB)
55 #define WCD9XXX_A_RC_OSC_TEST__POR		(0x0A)
56 #define WCD9XXX_A_CDC_CLK_MCLK_CTL		(0x311)
57 #define WCD9XXX_A_CDC_CLK_MCLK_CTL__POR		(0x00)
58 
59 #define WCD9XXX_A_CDC_MBHC_EN_CTL		(0x3C0)
60 #define WCD9XXX_A_CDC_MBHC_EN_CTL__POR		(0x00)
61 #define WCD9XXX_A_CDC_MBHC_FIR_B1_CFG		(0x3C1)
62 #define WCD9XXX_A_CDC_MBHC_FIR_B1_CFG__POR	(0x00)
63 #define WCD9XXX_A_CDC_MBHC_FIR_B2_CFG		(0x3C2)
64 #define WCD9XXX_A_CDC_MBHC_FIR_B2_CFG__POR	(0x06)
65 #define WCD9XXX_A_CDC_MBHC_TIMER_B1_CTL		(0x3C3)
66 #define WCD9XXX_A_CDC_MBHC_TIMER_B1_CTL__POR	(0x03)
67 #define WCD9XXX_A_CDC_MBHC_TIMER_B2_CTL		(0x3C4)
68 #define WCD9XXX_A_CDC_MBHC_TIMER_B2_CTL__POR	(0x09)
69 #define WCD9XXX_A_CDC_MBHC_TIMER_B3_CTL		(0x3C5)
70 #define WCD9XXX_A_CDC_MBHC_TIMER_B3_CTL__POR	(0x1E)
71 #define WCD9XXX_A_CDC_MBHC_TIMER_B4_CTL		(0x3C6)
72 #define WCD9XXX_A_CDC_MBHC_TIMER_B4_CTL__POR	(0x45)
73 #define WCD9XXX_A_CDC_MBHC_TIMER_B5_CTL		(0x3C7)
74 #define WCD9XXX_A_CDC_MBHC_TIMER_B5_CTL__POR	(0x04)
75 #define WCD9XXX_A_CDC_MBHC_TIMER_B6_CTL		(0x3C8)
76 #define WCD9XXX_A_CDC_MBHC_TIMER_B6_CTL__POR	(0x78)
77 #define WCD9XXX_A_CDC_MBHC_B1_STATUS		(0x3C9)
78 #define WCD9XXX_A_CDC_MBHC_B1_STATUS__POR	(0x00)
79 #define WCD9XXX_A_CDC_MBHC_B2_STATUS		(0x3CA)
80 #define WCD9XXX_A_CDC_MBHC_B2_STATUS__POR	(0x00)
81 #define WCD9XXX_A_CDC_MBHC_B3_STATUS		(0x3CB)
82 #define WCD9XXX_A_CDC_MBHC_B3_STATUS__POR	(0x00)
83 #define WCD9XXX_A_CDC_MBHC_B4_STATUS		(0x3CC)
84 #define WCD9XXX_A_CDC_MBHC_B4_STATUS__POR	(0x00)
85 #define WCD9XXX_A_CDC_MBHC_B5_STATUS		(0x3CD)
86 #define WCD9XXX_A_CDC_MBHC_B5_STATUS__POR	(0x00)
87 #define WCD9XXX_A_CDC_MBHC_B1_CTL		(0x3CE)
88 #define WCD9XXX_A_CDC_MBHC_B1_CTL__POR		(0xC0)
89 #define WCD9XXX_A_CDC_MBHC_B2_CTL		(0x3CF)
90 #define WCD9XXX_A_CDC_MBHC_B2_CTL__POR		(0x5D)
91 #define WCD9XXX_A_CDC_MBHC_VOLT_B1_CTL		(0x3D0)
92 #define WCD9XXX_A_CDC_MBHC_VOLT_B1_CTL__POR	(0x00)
93 #define WCD9XXX_A_CDC_MBHC_VOLT_B2_CTL		(0x3D1)
94 #define WCD9XXX_A_CDC_MBHC_VOLT_B2_CTL__POR	(0x00)
95 #define WCD9XXX_A_CDC_MBHC_VOLT_B3_CTL		(0x3D2)
96 #define WCD9XXX_A_CDC_MBHC_VOLT_B3_CTL__POR	(0x00)
97 #define WCD9XXX_A_CDC_MBHC_VOLT_B4_CTL		(0x3D3)
98 #define WCD9XXX_A_CDC_MBHC_VOLT_B4_CTL__POR	(0x00)
99 #define WCD9XXX_A_CDC_MBHC_VOLT_B5_CTL		(0x3D4)
100 #define WCD9XXX_A_CDC_MBHC_VOLT_B5_CTL__POR	(0x00)
101 #define WCD9XXX_A_CDC_MBHC_VOLT_B6_CTL		(0x3D5)
102 #define WCD9XXX_A_CDC_MBHC_VOLT_B6_CTL__POR	(0x00)
103 #define WCD9XXX_A_CDC_MBHC_VOLT_B7_CTL		(0x3D6)
104 #define WCD9XXX_A_CDC_MBHC_VOLT_B7_CTL__POR	(0xFF)
105 #define WCD9XXX_A_CDC_MBHC_VOLT_B8_CTL		(0x3D7)
106 #define WCD9XXX_A_CDC_MBHC_VOLT_B8_CTL__POR	(0x07)
107 #define WCD9XXX_A_CDC_MBHC_VOLT_B9_CTL		(0x3D8)
108 #define WCD9XXX_A_CDC_MBHC_VOLT_B9_CTL__POR	(0xFF)
109 #define WCD9XXX_A_CDC_MBHC_VOLT_B10_CTL		(0x3D9)
110 #define WCD9XXX_A_CDC_MBHC_VOLT_B10_CTL__POR	(0x7F)
111 #define WCD9XXX_A_CDC_MBHC_VOLT_B11_CTL		(0x3DA)
112 #define WCD9XXX_A_CDC_MBHC_VOLT_B11_CTL__POR	(0x00)
113 #define WCD9XXX_A_CDC_MBHC_VOLT_B12_CTL		(0x3DB)
114 #define WCD9XXX_A_CDC_MBHC_VOLT_B12_CTL__POR	(0x80)
115 #define WCD9XXX_A_CDC_MBHC_CLK_CTL		(0x3DC)
116 #define WCD9XXX_A_CDC_MBHC_CLK_CTL__POR		(0x00)
117 #define WCD9XXX_A_CDC_MBHC_INT_CTL		(0x3DD)
118 #define WCD9XXX_A_CDC_MBHC_INT_CTL__POR		(0x00)
119 #define WCD9XXX_A_CDC_MBHC_DEBUG_CTL		(0x3DE)
120 #define WCD9XXX_A_CDC_MBHC_DEBUG_CTL__POR	(0x00)
121 #define WCD9XXX_A_CDC_MBHC_SPARE		(0x3DF)
122 #define WCD9XXX_A_CDC_MBHC_SPARE__POR		(0x00)
123 #define WCD9XXX_A_MBHC_SCALING_MUX_1		(0x14E)
124 #define WCD9XXX_A_MBHC_SCALING_MUX_1__POR	(0x00)
125 #define WCD9XXX_A_RX_HPH_OCP_CTL		(0x1AA)
126 #define WCD9XXX_A_RX_HPH_OCP_CTL__POR		(0x68)
127 #define WCD9XXX_A_MICB_1_CTL			(0x12B)
128 #define WCD9XXX_A_MICB_1_CTL__POR		(0x16)
129 #define WCD9XXX_A_MICB_1_INT_RBIAS		(0x12C)
130 #define WCD9XXX_A_MICB_1_INT_RBIAS__POR		(0x24)
131 #define WCD9XXX_A_MICB_1_MBHC			(0x12D)
132 #define WCD9XXX_A_MICB_1_MBHC__POR		(0x01)
133 #define WCD9XXX_A_MICB_CFILT_2_CTL		(0x12E)
134 #define WCD9XXX_A_MICB_CFILT_2_CTL__POR		(0x40)
135 #define WCD9XXX_A_MICB_CFILT_2_VAL		(0x12F)
136 #define WCD9XXX_A_MICB_CFILT_2_VAL__POR		(0x80)
137 #define WCD9XXX_A_MICB_CFILT_2_PRECHRG		(0x130)
138 #define WCD9XXX_A_MICB_CFILT_2_PRECHRG__POR	(0x38)
139 #define WCD9XXX_A_MICB_2_CTL			(0x131)
140 #define WCD9XXX_A_MICB_2_CTL__POR		(0x16)
141 #define WCD9XXX_A_MICB_2_INT_RBIAS		(0x132)
142 #define WCD9XXX_A_MICB_2_INT_RBIAS__POR		(0x24)
143 #define WCD9XXX_A_MICB_2_MBHC			(0x133)
144 #define WCD9XXX_A_MICB_2_MBHC__POR		(0x02)
145 #define WCD9XXX_A_MICB_CFILT_3_CTL		(0x134)
146 #define WCD9XXX_A_MICB_CFILT_3_CTL__POR		(0x40)
147 #define WCD9XXX_A_MICB_CFILT_3_VAL		(0x135)
148 #define WCD9XXX_A_MICB_CFILT_3_VAL__POR		(0x80)
149 #define WCD9XXX_A_MICB_CFILT_3_PRECHRG		(0x136)
150 #define WCD9XXX_A_MICB_CFILT_3_PRECHRG__POR	(0x38)
151 #define WCD9XXX_A_MICB_3_CTL			(0x137)
152 #define WCD9XXX_A_MICB_3_CTL__POR		(0x16)
153 #define WCD9XXX_A_MICB_3_INT_RBIAS		(0x138)
154 #define WCD9XXX_A_MICB_3_INT_RBIAS__POR		(0x24)
155 #define WCD9XXX_A_MICB_3_MBHC			(0x139)
156 #define WCD9XXX_A_MICB_3_MBHC__POR		(0x00)
157 #define WCD9XXX_A_MICB_4_CTL			(0x13D)
158 #define WCD9XXX_A_MICB_4_CTL__POR		(0x16)
159 #define WCD9XXX_A_MICB_4_INT_RBIAS		(0x13E)
160 #define WCD9XXX_A_MICB_4_INT_RBIAS__POR		(0x24)
161 #define WCD9XXX_A_MICB_4_MBHC			(0x13F)
162 #define WCD9XXX_A_MICB_4_MBHC__POR		(0x01)
163 #define WCD9XXX_A_MICB_CFILT_1_VAL		(0x129)
164 #define WCD9XXX_A_MICB_CFILT_1_VAL__POR		(0x80)
165 #define WCD9XXX_A_RX_HPH_L_STATUS		(0x1B3)
166 #define WCD9XXX_A_RX_HPH_L_STATUS__POR		(0x00)
167 #define WCD9XXX_A_MBHC_HPH			(0x1FE)
168 #define WCD9XXX_A_MBHC_HPH__POR			(0x44)
169 #define WCD9XXX_A_RX_HPH_CNP_WG_TIME		(0x1AD)
170 #define WCD9XXX_A_RX_HPH_CNP_WG_TIME__POR	(0x2A)
171 #define WCD9XXX_A_RX_HPH_R_DAC_CTL		(0x1B7)
172 #define WCD9XXX_A_RX_HPH_R_DAC_CTL__POR		(0x00)
173 #define WCD9XXX_A_RX_HPH_L_DAC_CTL		(0x1B1)
174 #define WCD9XXX_A_RX_HPH_L_DAC_CTL__POR		(0x00)
175 #define WCD9XXX_A_TX_7_MBHC_EN			(0x171)
176 #define WCD9XXX_A_TX_7_MBHC_EN__POR		(0x0C)
177 #define WCD9XXX_A_PIN_CTL_OE0			(0x010)
178 #define WCD9XXX_A_PIN_CTL_OE0__POR		(0x00)
179 #define WCD9XXX_A_PIN_CTL_OE1			(0x011)
180 #define WCD9XXX_A_PIN_CTL_OE1__POR		(0x00)
181 #define WCD9XXX_A_MICB_CFILT_1_CTL		(0x128)
182 #define WCD9XXX_A_LDO_H_MODE_1			(0x110)
183 #define WCD9XXX_A_LDO_H_MODE_1__POR		(0x65)
184 #define WCD9XXX_A_MICB_CFILT_1_CTL__POR		(0x40)
185 #define WCD9XXX_A_TX_7_MBHC_TEST_CTL		(0x174)
186 #define WCD9XXX_A_TX_7_MBHC_TEST_CTL__POR	(0x38)
187 #define WCD9XXX_A_MBHC_SCALING_MUX_2		(0x14F)
188 #define WCD9XXX_A_MBHC_SCALING_MUX_2__POR	(0x80)
189 #define WCD9XXX_A_TX_COM_BIAS			(0x14C)
190 #define WCD9XXX_A_TX_COM_BIAS__POR		(0xF0)
191 
192 #define WCD9XXX_A_MBHC_INSERT_DETECT		(0x14A) /* TAIKO and later */
193 #define WCD9XXX_A_MBHC_INSERT_DETECT__POR	(0x00)
194 #define WCD9XXX_A_MBHC_INSERT_DET_STATUS	(0x14B) /* TAIKO and later */
195 #define WCD9XXX_A_MBHC_INSERT_DET_STATUS__POR	(0x00)
196 #define WCD9XXX_A_MAD_ANA_CTRL			(0x150)
197 #define WCD9XXX_A_MAD_ANA_CTRL__POR		(0xF1)
198 
199 
200 #define WCD9XXX_A_CDC_CLK_OTHR_CTL			(0x30C)
201 #define WCD9XXX_A_CDC_CLK_OTHR_CTL__POR				(0x00)
202 
203 /* Class H related common registers */
204 #define WCD9XXX_A_BUCK_MODE_1			(0x181)
205 #define WCD9XXX_A_BUCK_MODE_1__POR				(0x21)
206 #define WCD9XXX_A_BUCK_MODE_2			(0x182)
207 #define WCD9XXX_A_BUCK_MODE_2__POR				(0xFF)
208 #define WCD9XXX_A_BUCK_MODE_3			(0x183)
209 #define WCD9XXX_A_BUCK_MODE_3__POR				(0xCC)
210 #define WCD9XXX_A_BUCK_MODE_4			(0x184)
211 #define WCD9XXX_A_BUCK_MODE_4__POR				(0x3A)
212 #define WCD9XXX_A_BUCK_MODE_5			(0x185)
213 #define WCD9XXX_A_BUCK_MODE_5__POR				(0x00)
214 #define WCD9XXX_A_BUCK_CTRL_VCL_1			(0x186)
215 #define WCD9XXX_A_BUCK_CTRL_VCL_1__POR				(0x48)
216 #define WCD9XXX_A_BUCK_CTRL_VCL_2			(0x187)
217 #define WCD9XXX_A_BUCK_CTRL_VCL_2__POR				(0xA3)
218 #define WCD9XXX_A_BUCK_CTRL_VCL_3			(0x188)
219 #define WCD9XXX_A_BUCK_CTRL_VCL_3__POR				(0x82)
220 #define WCD9XXX_A_BUCK_CTRL_CCL_1			(0x189)
221 #define WCD9XXX_A_BUCK_CTRL_CCL_1__POR				(0xAB)
222 #define WCD9XXX_A_BUCK_CTRL_CCL_2			(0x18A)
223 #define WCD9XXX_A_BUCK_CTRL_CCL_2__POR				(0xDC)
224 #define WCD9XXX_A_BUCK_CTRL_CCL_3			(0x18B)
225 #define WCD9XXX_A_BUCK_CTRL_CCL_3__POR				(0x6A)
226 #define WCD9XXX_A_BUCK_CTRL_CCL_4			(0x18C)
227 #define WCD9XXX_A_BUCK_CTRL_CCL_4__POR				(0x58)
228 #define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_1			(0x18D)
229 #define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_1__POR				(0x50)
230 #define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_2			(0x18E)
231 #define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_2__POR				(0x64)
232 #define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_3			(0x18F)
233 #define WCD9XXX_A_BUCK_CTRL_PWM_DRVR_3__POR				(0x77)
234 #define WCD9XXX_A_BUCK_TMUX_A_D			(0x190)
235 #define WCD9XXX_A_BUCK_TMUX_A_D__POR				(0x00)
236 #define WCD9XXX_A_NCP_EN			(0x192)
237 #define WCD9XXX_A_NCP_EN__POR				(0xFE)
238 #define WCD9XXX_A_NCP_STATIC			(0x194)
239 #define WCD9XXX_A_NCP_STATIC__POR				(0x28)
240 #define WCD9XXX_A_NCP_BUCKREF			(0x191)
241 #define WCD9XXX_A_NCP_BUCKREF__POR				(0x00)
242 #define WCD9XXX_A_CDC_CLSH_B1_CTL			(0x320)
243 #define WCD9XXX_A_CDC_CLSH_B1_CTL__POR				(0xE4)
244 #define WCD9XXX_A_CDC_CLSH_B2_CTL			(0x321)
245 #define WCD9XXX_A_CDC_CLSH_B2_CTL__POR				(0x00)
246 #define WCD9XXX_A_CDC_CLSH_B3_CTL			(0x322)
247 #define WCD9XXX_A_CDC_CLSH_B3_CTL__POR				(0x00)
248 #define WCD9XXX_A_CDC_CLSH_BUCK_NCP_VARS			(0x323)
249 #define WCD9XXX_A_CDC_CLSH_BUCK_NCP_VARS__POR			(0x00)
250 #define WCD9XXX_A_CDC_CLSH_IDLE_HPH_THSD			(0x324)
251 #define WCD9XXX_A_CDC_CLSH_IDLE_HPH_THSD__POR			(0x12)
252 #define WCD9XXX_A_CDC_CLSH_IDLE_EAR_THSD			(0x325)
253 #define WCD9XXX_A_CDC_CLSH_IDLE_EAR_THSD__POR			(0x0C)
254 #define WCD9XXX_A_CDC_CLSH_FCLKONLY_HPH_THSD			(0x326)
255 #define WCD9XXX_A_CDC_CLSH_FCLKONLY_HPH_THSD__POR		(0x18)
256 #define WCD9XXX_A_CDC_CLSH_FCLKONLY_EAR_THSD			(0x327)
257 #define WCD9XXX_A_CDC_CLSH_FCLKONLY_EAR_THSD__POR		(0x23)
258 #define WCD9XXX_A_CDC_CLSH_K_ADDR			(0x328)
259 #define WCD9XXX_A_CDC_CLSH_K_ADDR__POR				(0x00)
260 #define WCD9XXX_A_CDC_CLSH_K_DATA			(0x329)
261 #define WCD9XXX_A_CDC_CLSH_K_DATA__POR				(0xA4)
262 #define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_L			(0x32A)
263 #define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_L__POR				(0xD7)
264 #define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_U			(0x32B)
265 #define WCD9XXX_A_CDC_CLSH_I_PA_FACT_HPH_U__POR				(0x05)
266 #define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_L			(0x32C)
267 #define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_L__POR				(0x60)
268 #define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_U			(0x32D)
269 #define WCD9XXX_A_CDC_CLSH_I_PA_FACT_EAR_U__POR				(0x09)
270 #define WCD9XXX_A_CDC_CLSH_V_PA_HD_EAR			(0x32E)
271 #define WCD9XXX_A_CDC_CLSH_V_PA_HD_EAR__POR				(0x00)
272 #define WCD9XXX_A_CDC_CLSH_V_PA_HD_HPH			(0x32F)
273 #define WCD9XXX_A_CDC_CLSH_V_PA_HD_HPH__POR				(0x00)
274 #define WCD9XXX_A_CDC_CLSH_V_PA_MIN_EAR			(0x330)
275 #define WCD9XXX_A_CDC_CLSH_V_PA_MIN_EAR__POR				(0x00)
276 #define WCD9XXX_A_CDC_CLSH_V_PA_MIN_HPH			(0x331)
277 #define WCD9XXX_A_CDC_CLSH_V_PA_MIN_HPH__POR				(0x00)
278 
279 #define WCD9XXX_A_CDC_RX1_B6_CTL			(0x2B5)
280 #define WCD9XXX_A_CDC_RX1_B6_CTL__POR				(0x80)
281 #define WCD9XXX_A_CDC_RX2_B6_CTL			(0x2BD)
282 #define WCD9XXX_A_CDC_RX2_B6_CTL__POR				(0x80)
283 #define WCD9XXX_A_RX_HPH_L_GAIN				(0x1AE)
284 #define WCD9XXX_A_RX_HPH_L_GAIN__POR				(0x00)
285 #define WCD9XXX_A_RX_HPH_R_GAIN				(0x1B4)
286 #define WCD9XXX_A_RX_HPH_R_GAIN__POR				(0x00)
287 #define WCD9XXX_A_RX_HPH_CHOP_CTL			(0x1A5)
288 #define WCD9XXX_A_RX_HPH_CHOP_CTL__POR				(0xB4)
289 #define WCD9XXX_A_RX_HPH_BIAS_PA			(0x1A6)
290 #define WCD9XXX_A_RX_HPH_BIAS_PA__POR				(0x7A)
291 #define WCD9XXX_A_RX_HPH_L_TEST				(0x1AF)
292 #define WCD9XXX_A_RX_HPH_L_TEST__POR				(0x00)
293 #define WCD9XXX_A_RX_HPH_R_TEST				(0x1B5)
294 #define WCD9XXX_A_RX_HPH_R_TEST__POR				(0x00)
295 #define WCD9XXX_A_CDC_CLK_RX_B1_CTL			(0x30F)
296 #define WCD9XXX_A_CDC_CLK_RX_B1_CTL__POR			(0x00)
297 #define WCD9XXX_A_NCP_CLK				(0x193)
298 #define WCD9XXX_A_NCP_CLK__POR					(0x94)
299 #define WCD9XXX_A_RX_HPH_BIAS_WG_OCP			(0x1A9)
300 #define WCD9XXX_A_RX_HPH_BIAS_WG_OCP__POR			(0x2A)
301 #define WCD9XXX_A_RX_HPH_CNP_WG_CTL			(0x1AC)
302 #define WCD9XXX_A_RX_HPH_CNP_WG_CTL__POR			(0xDE)
303 #define WCD9XXX_A_RX_HPH_L_PA_CTL			(0x1B0)
304 #define WCD9XXX_A_RX_HPH_L_PA_CTL__POR				(0x42)
305 #define WCD9XXX_A_RX_HPH_R_PA_CTL			(0x1B6)
306 #define WCD9XXX_A_RX_HPH_R_PA_CTL__POR				(0x42)
307 #define WCD9XXX_A_CDC_CONN_RX2_B1_CTL			(0x383)
308 #define WCD9XXX_A_CDC_CONN_RX2_B1_CTL__POR			(0x00)
309 #define WCD9XXX_A_CDC_PA_RAMP_B1_CTL			(0x361)
310 #define WCD9XXX_A_CDC_PA_RAMP_B1_CTL__POR			(0x00)
311 #define WCD9XXX_A_CDC_PA_RAMP_B2_CTL			(0x362)
312 #define WCD9XXX_A_CDC_PA_RAMP_B2_CTL__POR			(0x00)
313 #define WCD9XXX_A_CDC_PA_RAMP_B3_CTL			(0x363)
314 #define WCD9XXX_A_CDC_PA_RAMP_B3_CTL__POR			(0x00)
315 #define WCD9XXX_A_CDC_PA_RAMP_B4_CTL			(0x364)
316 #define WCD9XXX_A_CDC_PA_RAMP_B4_CTL__POR			(0x00)
317 
318 #define WCD9330_A_LEAKAGE_CTL				(0x03C)
319 #define WCD9330_A_LEAKAGE_CTL__POR				(0x04)
320 #define WCD9330_A_CDC_CTL				(0x034)
321 #define WCD9330_A_CDC_CTL__POR					(0x00)
322 #endif
323