/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | LiveRegMatrix.cpp | 81 LiveInterval &VRegInterval, unsigned PhysReg, in foreachUnit() 104 void LiveRegMatrix::assign(LiveInterval &VirtReg, unsigned PhysReg) { in assign() 122 unsigned PhysReg = VRM->getPhys(VirtReg.reg); in unassign() local 147 unsigned PhysReg) { in checkRegMaskInterference() 165 unsigned PhysReg) { in checkRegUnitInterference() 186 LiveRegMatrix::checkInterference(LiveInterval &VirtReg, unsigned PhysReg) { in checkInterference() 210 unsigned PhysReg) { in checkInterference()
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D | RegAllocFast.cpp | 87 MCPhysReg PhysReg = 0; ///< Currently held here. member 140 void markRegUsedInInstr(MCPhysReg PhysReg) { in markRegUsedInInstr() 377 unsigned PhysReg = MO.getReg(); in usePhysReg() local 441 MCPhysReg PhysReg, RegState NewState) { in definePhysReg() 528 void RegAllocFast::assignVirtToPhysReg(LiveReg &LR, MCPhysReg PhysReg) { in assignVirtToPhysReg() 537 RegAllocFast::assignVirtToPhysReg(unsigned VirtReg, MCPhysReg PhysReg) { in assignVirtToPhysReg() 569 for (MCPhysReg PhysReg : AO) { in allocVirtReg() local 581 for (MCPhysReg PhysReg : AO) { in allocVirtReg() local 700 MCPhysReg PhysReg) { in setPhysReg() 774 MCPhysReg PhysReg = LRI->PhysReg; in handleThroughOperands() local [all …]
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D | RegAllocGreedy.cpp | 324 void addEviction(unsigned PhysReg, unsigned Evictor, unsigned Evictee) { in addEviction() 358 unsigned PhysReg; member 528 unsigned PhysReg; member 763 unsigned PhysReg; in tryAssign() local 807 unsigned PhysReg; in canReassign() local 868 bool RAGreedy::canEvictInterference(LiveInterval &VirtReg, unsigned PhysReg, in canEvictInterference() 958 unsigned PhysReg, SlotIndex Start, in canEvictInterferenceInRange() 1020 for (auto PhysReg : Order.getOrder()) { in getCheapestEvicteeWeight() local 1036 void RAGreedy::evictInterference(LiveInterval &VirtReg, unsigned PhysReg, in evictInterference() 1132 while (unsigned PhysReg = Order.next(OrderLimit)) { in tryEvict() local [all …]
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D | RegisterClassInfo.cpp | 111 unsigned PhysReg = RawOrder[i]; in compute() local 133 unsigned PhysReg = CSRAlias[i]; in compute() local
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D | ReachingDefAnalysis.cpp | 173 int ReachingDefAnalysis::getReachingDef(MachineInstr *MI, int PhysReg) { in getReachingDef() 192 int ReachingDefAnalysis::getClearance(MachineInstr *MI, MCPhysReg PhysReg) { in getClearance()
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D | RegAllocBasic.cpp | 205 bool RABasic::spillInterferences(LiveInterval &VirtReg, unsigned PhysReg, in spillInterferences() 264 while (unsigned PhysReg = Order.next()) { in selectOrSplit() local
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D | AllocationOrder.h | 91 bool isHint(unsigned PhysReg) const { return is_contained(Hints, PhysReg); } in isHint()
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D | InterferenceCache.h | 48 unsigned PhysReg = 0; variable 213 void setPhysReg(InterferenceCache &Cache, unsigned PhysReg) { in setPhysReg()
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D | RegisterCoalescer.h | 63 CoalescerPair(unsigned VirtReg, unsigned PhysReg, in CoalescerPair()
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D | LiveRangeCalc.h | 224 void extendToUses(LiveRange &LR, unsigned PhysReg) { in extendToUses()
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/external/llvm/lib/CodeGen/ |
D | LiveRegMatrix.cpp | 75 unsigned PhysReg, Callable Func) { in foreachUnit() 97 void LiveRegMatrix::assign(LiveInterval &VirtReg, unsigned PhysReg) { in assign() 115 unsigned PhysReg = VRM->getPhys(VirtReg.reg); in unassign() local 140 unsigned PhysReg) { in checkRegMaskInterference() 158 unsigned PhysReg) { in checkRegUnitInterference() 179 LiveRegMatrix::checkInterference(LiveInterval &VirtReg, unsigned PhysReg) { in checkInterference()
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D | RegAllocFast.cpp | 72 unsigned PhysReg; // Currently held here. member 123 void markRegUsedInInstr(unsigned PhysReg) { in markRegUsedInInstr() 349 unsigned PhysReg = MO.getReg(); in usePhysReg() local 416 void RAFast::definePhysReg(MachineInstr &MI, unsigned PhysReg, in definePhysReg() 507 void RAFast::assignVirtToPhysReg(LiveReg &LR, unsigned PhysReg) { in assignVirtToPhysReg() 516 RAFast::assignVirtToPhysReg(unsigned VirtReg, unsigned PhysReg) { in assignVirtToPhysReg() 556 unsigned PhysReg = *I; in allocVirtReg() local 685 bool RAFast::setPhysReg(MachineInstr *MI, unsigned OpNum, unsigned PhysReg) { in setPhysReg() 759 unsigned PhysReg = LRI->PhysReg; in handleThroughOperands() local 782 unsigned PhysReg = LRI->PhysReg; in handleThroughOperands() local [all …]
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D | RegAllocGreedy.cpp | 263 unsigned PhysReg; member 411 unsigned PhysReg; member 622 unsigned PhysReg; in tryAssign() local 664 unsigned PhysReg; in canReassign() local 725 bool RAGreedy::canEvictInterference(LiveInterval &VirtReg, unsigned PhysReg, in canEvictInterference() 807 void RAGreedy::evictInterference(LiveInterval &VirtReg, unsigned PhysReg, in evictInterference() 894 while (unsigned PhysReg = Order.next(OrderLimit)) { in tryEvict() local 1390 while (unsigned PhysReg = Order.next()) { in calculateRegionSplitCost() local 1647 void RAGreedy::calcGapWeights(unsigned PhysReg, in calcGapWeights() 1810 while (unsigned PhysReg = Order.next()) { in tryLocalSplit() local [all …]
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D | RegisterClassInfo.cpp | 99 unsigned PhysReg = RawOrder[i]; in compute() local 121 unsigned PhysReg = CSRAlias[i]; in compute() local
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D | RegAllocBasic.cpp | 166 bool RABasic::spillInterferences(LiveInterval &VirtReg, unsigned PhysReg, in spillInterferences() 227 while (unsigned PhysReg = Order.next()) { in selectOrSplit() local
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D | AllocationOrder.h | 82 bool isHint(unsigned PhysReg) const { in isHint()
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D | InterferenceCache.h | 42 unsigned PhysReg; variable 202 void setPhysReg(InterferenceCache &Cache, unsigned PhysReg) { in setPhysReg()
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D | RegisterCoalescer.h | 66 CoalescerPair(unsigned VirtReg, unsigned PhysReg, in CoalescerPair()
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D | LiveRangeCalc.h | 183 void extendToUses(LiveRange &LR, unsigned PhysReg) { in extendToUses()
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D | LiveRangeCalc.cpp | 239 void LiveRangeCalc::extend(LiveRange &LR, SlotIndex Use, unsigned PhysReg) { in extend() 275 SlotIndex Use, unsigned PhysReg) { in findReachingDefs()
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D | VirtRegMap.cpp | 299 unsigned PhysReg = VRM->getPhys(VirtReg); in addMBBLiveIns() local 399 unsigned PhysReg = VRM->getPhys(VirtReg); in rewrite() local
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/external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-exegesis/lib/ |
D | RegisterAliasing.cpp | 17 for (const size_t PhysReg : SourceBits.set_bits()) { in getAliasedBits() local 36 for (llvm::MCPhysReg PhysReg : RegClass) in RegisterAliasingTracker() local 43 const llvm::MCRegisterInfo &RegInfo, const llvm::MCPhysReg PhysReg) in RegisterAliasingTracker() 52 for (const size_t PhysReg : SourceBits.set_bits()) { in FillOriginAndAliasedBits() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MipsCallLowering.cpp | 60 virtual void markPhysRegUsed(unsigned PhysReg) { in markPhysRegUsed() 79 void markPhysRegUsed(unsigned PhysReg) override { in markPhysRegUsed() 89 unsigned PhysReg) { in assignValueToReg() 147 unsigned PhysReg) { in assignValueToReg()
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
D | RegisterClassInfo.h | 113 unsigned getLastCalleeSavedAlias(unsigned PhysReg) const { in getLastCalleeSavedAlias()
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/external/llvm/include/llvm/CodeGen/ |
D | RegisterClassInfo.h | 109 unsigned getLastCalleeSavedAlias(unsigned PhysReg) const { in getLastCalleeSavedAlias()
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