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Searched refs:BL31_BASE (Results 1 – 25 of 34) sorted by relevance

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/device/linaro/bootloader/arm-trusted-firmware/include/plat/arm/common/
Darm_def.h234 BL31_BASE, \
341 #define BL2_BASE (BL31_BASE - PLAT_ARM_MAX_BL2_SIZE)
342 #define BL2_LIMIT BL31_BASE
352 #define BL31_BASE ARM_AP_TZC_DRAM1_BASE macro
359 #define BL31_BASE (ARM_TRUSTED_SRAM_BASE + \ macro
366 #define BL31_BASE (ARM_BL_RAM_BASE + \ macro
395 # define BL32_LIMIT BL31_BASE
432 #define BL2U_LIMIT BL31_BASE
/device/linaro/bootloader/arm-trusted-firmware/plat/qemu/include/
Dplatform_def.h119 #define BL2_BASE (BL31_BASE - 0x1D000)
120 #define BL2_LIMIT BL31_BASE
128 #define BL31_BASE (BL31_LIMIT - 0x20000) macro
139 #define BL32_SRAM_LIMIT BL31_BASE
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/
Dplat_trampoline.S25 mov x0, #BL31_BASE
30 mov x0, #BL31_BASE
71 .quad __BL31_END__ - BL31_BASE
/device/linaro/bootloader/arm-trusted-firmware/plat/socionext/uniphier/
Duniphier_image_desc.c34 .image_info.image_base = BL31_BASE,
35 .image_info.image_max_size = BL31_LIMIT - BL31_BASE,
40 .ep_info.pc = BL31_BASE,
Duniphier_bl31_setup.c21 #define BL31_SIZE ((BL31_END) - (BL31_BASE))
78 uniphier_mmap_setup(BL31_BASE, BL31_SIZE, NULL); in bl31_plat_arch_setup()
/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/poplar/include/
Dpoplar_layout.h105 #define BL31_BASE (LLOADER_TEXT_BASE + BL31_OFFSET) macro
106 #define BL31_LIMIT (BL31_BASE + BL31_SIZE)
/device/linaro/bootloader/arm-trusted-firmware/plat/socionext/uniphier/include/
Dplatform_def.h43 #define BL31_BASE (UNIPHIER_SEC_DRAM_BASE) macro
44 #define BL31_LIMIT ((BL31_BASE) + 0x00080000)
/device/linaro/bootloader/arm-trusted-firmware/bl31/
Dbl31.ld.S15 RAM (rwx): ORIGIN = BL31_BASE, LENGTH = BL31_LIMIT - BL31_BASE
24 . = BL31_BASE;
/device/linaro/bootloader/arm-trusted-firmware/plat/qemu/
Dqemu_bl2_mem_params_desc.c43 .ep_info.pc = BL31_BASE,
51 .image_info.image_base = BL31_BASE,
52 .image_info.image_max_size = BL31_LIMIT - BL31_BASE,
/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey960/include/
Dplatform_def.h65 #define BL31_BASE (BL2_LIMIT) /* 1AC5_8000 */ macro
66 #define BL31_LIMIT (BL31_BASE + 0x40000) /* 1AC9_8000 */
/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey/
Dhikey_bl2_mem_params_desc.c67 .ep_info.pc = BL31_BASE,
76 .image_info.image_base = BL31_BASE,
77 .image_info.image_max_size = BL31_LIMIT - BL31_BASE,
Dhikey_bl31_setup.c148 hikey_init_mmu_el3(BL31_BASE, in bl31_plat_arch_setup()
149 BL31_LIMIT - BL31_BASE, in bl31_plat_arch_setup()
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/common/aarch64/
Darm_bl2_mem_params_desc.c67 .ep_info.pc = BL31_BASE,
76 .image_info.image_base = BL31_BASE,
77 .image_info.image_max_size = BL31_LIMIT - BL31_BASE,
/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey960/
Dhikey960_bl2_mem_params_desc.c67 .ep_info.pc = BL31_BASE,
76 .image_info.image_base = BL31_BASE,
77 .image_info.image_max_size = BL31_LIMIT - BL31_BASE,
Dhikey960_bl31_setup.c151 hikey960_init_mmu_el3(BL31_BASE, in bl31_plat_arch_setup()
152 BL31_LIMIT - BL31_BASE, in bl31_plat_arch_setup()
/device/linaro/bootloader/arm-trusted-firmware/plat/xilinx/zynqmp/include/
Dplatform_def.h37 # define BL31_BASE 0xfffea000 macro
40 # define BL31_BASE (ZYNQMP_ATF_MEM_BASE) macro
/device/linaro/bootloader/arm-trusted-firmware/plat/arm/common/
Darm_bl2_setup.c74 .total_base = BL31_BASE, in bl2_plat_sec_mem_layout()
76 ARM_AP_TZC_DRAM1_SIZE) - BL31_BASE, in bl2_plat_sec_mem_layout()
77 .free_base = BL31_BASE, in bl2_plat_sec_mem_layout()
79 ARM_AP_TZC_DRAM1_SIZE) - BL31_BASE in bl2_plat_sec_mem_layout()
Darm_bl31_setup.c252 arm_setup_page_tables(BL31_BASE, in arm_bl31_plat_arch_setup()
253 BL31_END - BL31_BASE, in arm_bl31_plat_arch_setup()
/device/linaro/bootloader/arm-trusted-firmware/plat/xilinx/zynqmp/
Dbl31_zynqmp_setup.c126 arm_setup_page_tables(BL31_BASE, in bl31_plat_arch_setup()
127 BL31_END - BL31_BASE, in bl31_plat_arch_setup()
/device/linaro/bootloader/arm-trusted-firmware/plat/mediatek/mt6795/
Dbl31.ld.S15 RAM (rwx): ORIGIN = BL31_BASE, LENGTH = BL31_TZRAM_SIZE
22 . = BL31_BASE;
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/include/shared/
Dbl31_param.h23 #define BL31_BASE (TZRAM_BASE + 0x1000) macro
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/include/
Dplatform_def.h49 #define BL31_BASE TZDRAM_BASE macro
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/include/
Dplatform_def.h82 #define BL31_BASE (TZRAM_BASE + 0x10000) macro
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3368/include/
Dplatform_def.h82 #define BL31_BASE (TZRAM_BASE + 0x10000) macro
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/common/
Dtegra_bl31_setup.c165 if ((plat_bl31_params_from_bl2.tzdram_base != BL31_BASE) && in bl31_early_platform_setup()
166 (TEGRA_TZRAM_BASE != BL31_BASE)) in bl31_early_platform_setup()

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