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Searched refs:MIDR_IMPL_MASK (Results 1 – 11 of 11) sorted by relevance

/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/
Dplat_sip_calls.c153 impl = ((uint32_t)x2 >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK; in plat_sip_handler()
Dplat_setup.c150 int impl = (read_midr() >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK; in plat_early_platform_setup()
Dplat_psci_handlers.c329 int impl = (read_midr() >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK; in tegra_soc_pwr_domain_off()
/device/linaro/bootloader/arm-trusted-firmware/include/lib/cpus/aarch64/
Dcpu_macros.S12 #define CPU_IMPL_PN_MASK (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | \
/device/linaro/bootloader/arm-trusted-firmware/include/lib/cpus/aarch32/
Dcpu_macros.S12 #define CPU_IMPL_PN_MASK (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | \
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/drivers/mce/
Dmce.c113 uint64_t impl = (read_midr() >> (uint64_t)MIDR_IMPL_SHIFT) & (uint64_t)MIDR_IMPL_MASK; in mce_get_curr_cpu_ari_base()
134 (uint64_t)MIDR_IMPL_MASK; in mce_get_curr_cpu_ops()
Dnvg.c203 (uint64_t)MIDR_IMPL_MASK; in nvg_online_core()
Dari.c329 uint64_t impl = (read_midr() >> (uint64_t)MIDR_IMPL_SHIFT) & (uint64_t)MIDR_IMPL_MASK; in ari_online_core()
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/common/
Dtegra_bl31_setup.c126 int impl = (read_midr() >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK; in bl31_early_platform_setup()
/device/linaro/bootloader/arm-trusted-firmware/include/lib/aarch32/
Darch.h15 #define MIDR_IMPL_MASK 0xff macro
/device/linaro/bootloader/arm-trusted-firmware/include/lib/aarch64/
Darch.h15 #define MIDR_IMPL_MASK U(0xff) macro