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/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/include/t186/
Dtegra_def.h22 #define MCE_ARI_APERTURE_0_OFFSET U(0x0)
23 #define MCE_ARI_APERTURE_1_OFFSET U(0x10000)
24 #define MCE_ARI_APERTURE_2_OFFSET U(0x20000)
25 #define MCE_ARI_APERTURE_3_OFFSET U(0x30000)
26 #define MCE_ARI_APERTURE_4_OFFSET U(0x40000)
27 #define MCE_ARI_APERTURE_5_OFFSET U(0x50000)
31 #define MCE_ARI_APERTURES_MAX U(6)
34 #define MCE_ARI_APERTURE_SIZE U(0x10000)
39 #define MCE_CORE_ID_MAX U(8)
40 #define MCE_CORE_ID_MASK U(0x7)
[all …]
/device/linaro/bootloader/arm-trusted-firmware/include/lib/aarch64/
Darch.h15 #define MIDR_IMPL_MASK U(0xff)
16 #define MIDR_IMPL_SHIFT U(0x18)
17 #define MIDR_VAR_SHIFT U(20)
18 #define MIDR_VAR_BITS U(4)
19 #define MIDR_VAR_MASK U(0xf)
20 #define MIDR_REV_SHIFT U(0)
21 #define MIDR_REV_BITS U(4)
22 #define MIDR_REV_MASK U(0xf)
23 #define MIDR_PN_MASK U(0xfff)
24 #define MIDR_PN_SHIFT U(0x4)
[all …]
/device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.10/Modules/cjkcodecs/
Dmappings_tw.h6 65088,12300,12301,65089,65090,12302,12303,65091,65092,65113,65114,U,U,U,U,U,U,
7 U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,65115,65116,65117,
18 9524,9516,9508,9500,9620,9472,9474,9621,9484,9488,9492,9496,9581,U,U,U,U,U,U,
19 U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,9582,9584,9583,9552,
30 12554,12555,12556,12557,12558,12559,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,
31 U,U,U,U,U,U,U,U,U,U,U,U,U,12560,12561,12562,12563,12564,12565,12566,12567,
38 24051,24062,24178,24318,24331,24339,25165,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,
39 U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,19985,19984,19981,20013,20016,20025,20043,
51 21488,21477,21485,21499,22235,22234,22806,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,
52 U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,22830,22833,22900,22902,23381,23427,23612,
[all …]
Dmappings_cn.h11 9350,9351,9312,9313,9314,9315,9316,9317,9318,9319,9320,9321,U,U,12832,12833,
12 12834,12835,12836,12837,12838,12839,12840,12841,U,U,8544,8545,8546,8547,8548,
34 919,920,921,922,923,924,925,926,927,928,929,931,932,933,934,935,936,937,U,U,U,
35 U,U,U,U,U,945,946,947,948,949,950,951,952,953,954,955,956,957,958,959,960,961,
38 1064,1065,1066,1067,1068,1069,1070,1071,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,1072,
42 250,468,249,470,472,474,476,252,234,U,U,U,U,U,U,U,U,U,U,12549,12550,12551,
632 20092,20093,20095,20096,20097,20098,20099,20100,20101,20103,20106,U,20112,
647 20484,20485,20486,20487,20488,20489,20490,U,20491,20494,20496,20497,20499,
662 20740,20741,20744,U,20745,20746,20748,20749,20750,20751,20752,20753,20755,
676 21062,21063,21064,21065,21067,21070,21071,21074,21075,21077,21079,21080,U,
[all …]
Dmappings_jisx0213_pair.h9 15074048,U,U,U,39060224,39060225,42730240,42730241,39387904,39387905,39453440,
10 39453441,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,48825061,48562921,
/device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.2/Modules/cjkcodecs/
Dmappings_tw.h6 65088,12300,12301,65089,65090,12302,12303,65091,65092,65113,65114,U,U,U,U,U,U,
7 U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,65115,65116,65117,
18 9524,9516,9508,9500,9620,9472,9474,9621,9484,9488,9492,9496,9581,U,U,U,U,U,U,
19 U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,9582,9584,9583,9552,
30 12554,12555,12556,12557,12558,12559,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,
31 U,U,U,U,U,U,U,U,U,U,U,U,U,12560,12561,12562,12563,12564,12565,12566,12567,
38 24051,24062,24178,24318,24331,24339,25165,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,
39 U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,19985,19984,19981,20013,20016,20025,20043,
51 21488,21477,21485,21499,22235,22234,22806,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,
52 U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,22830,22833,22900,22902,23381,23427,23612,
[all …]
Dmappings_cn.h11 9350,9351,9312,9313,9314,9315,9316,9317,9318,9319,9320,9321,U,U,12832,12833,
12 12834,12835,12836,12837,12838,12839,12840,12841,U,U,8544,8545,8546,8547,8548,
34 919,920,921,922,923,924,925,926,927,928,929,931,932,933,934,935,936,937,U,U,U,
35 U,U,U,U,U,945,946,947,948,949,950,951,952,953,954,955,956,957,958,959,960,961,
38 1064,1065,1066,1067,1068,1069,1070,1071,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,1072,
42 250,468,249,470,472,474,476,252,234,U,U,U,U,U,U,U,U,U,U,12549,12550,12551,
632 20092,20093,20095,20096,20097,20098,20099,20100,20101,20103,20106,U,20112,
647 20484,20485,20486,20487,20488,20489,20490,U,20491,20494,20496,20497,20499,
662 20740,20741,20744,U,20745,20746,20748,20749,20750,20751,20752,20753,20755,
676 21062,21063,21064,21065,21067,21070,21071,21074,21075,21077,21079,21080,U,
[all …]
Dmappings_jisx0213_pair.h9 15074048,U,U,U,39060224,39060225,42730240,42730241,39387904,39387905,39453440,
10 39453441,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,U,48825061,48562921,
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/include/t210/
Dtegra_def.h15 #define PSTATE_ID_CORE_POWERDN U(7)
16 #define PSTATE_ID_CLUSTER_IDLE U(16)
17 #define PSTATE_ID_CLUSTER_POWERDN U(17)
18 #define PSTATE_ID_SOC_POWERDN U(27)
32 #define PLAT_MAX_RET_STATE U(1)
33 #define PLAT_MAX_OFF_STATE (PSTATE_ID_SOC_POWERDN + U(1))
38 #define TEGRA_GICD_BASE U(0x50041000)
39 #define TEGRA_GICC_BASE U(0x50042000)
44 #define TEGRA_MSELECT_BASE U(0x50060000)
46 #define MSELECT_CONFIG U(0x0)
[all …]
/device/linaro/bootloader/arm-trusted-firmware/include/lib/el3_runtime/aarch64/
Dcontext.h14 #define CTX_GPREGS_OFFSET U(0x0)
15 #define CTX_GPREG_X0 U(0x0)
16 #define CTX_GPREG_X1 U(0x8)
17 #define CTX_GPREG_X2 U(0x10)
18 #define CTX_GPREG_X3 U(0x18)
19 #define CTX_GPREG_X4 U(0x20)
20 #define CTX_GPREG_X5 U(0x28)
21 #define CTX_GPREG_X6 U(0x30)
22 #define CTX_GPREG_X7 U(0x38)
23 #define CTX_GPREG_X8 U(0x40)
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/include/t132/
Dtegra_def.h16 #define PSTATE_ID_SOC_POWERDN U(0xD)
24 #define PLAT_MAX_RET_STATE U(1)
25 #define PLAT_MAX_OFF_STATE (PSTATE_ID_SOC_POWERDN + U(1))
30 #define TEGRA_GICD_BASE U(0x50041000)
31 #define TEGRA_GICC_BASE U(0x50042000)
36 #define TEGRA_TMRUS_BASE U(0x60005010)
37 #define TEGRA_TMRUS_SIZE U(0x1000)
42 #define TEGRA_CAR_RESET_BASE U(0x60006000)
43 #define TEGRA_GPU_RESET_REG_OFFSET U(0x28C)
44 #define GPU_RESET_BIT (U(1) << 24)
[all …]
/device/linaro/bootloader/arm-trusted-firmware/include/lib/psci/
Dpsci.h25 #define PSCI_NUM_PWR_DOMAINS (U(2) * PLATFORM_CORE_COUNT)
39 #define PSCI_MAX_PWR_LVL U(3)
44 #define PSCI_VERSION U(0x84000000)
45 #define PSCI_CPU_SUSPEND_AARCH32 U(0x84000001)
46 #define PSCI_CPU_SUSPEND_AARCH64 U(0xc4000001)
47 #define PSCI_CPU_OFF U(0x84000002)
48 #define PSCI_CPU_ON_AARCH32 U(0x84000003)
49 #define PSCI_CPU_ON_AARCH64 U(0xc4000003)
50 #define PSCI_AFFINITY_INFO_AARCH32 U(0x84000004)
51 #define PSCI_AFFINITY_INFO_AARCH64 U(0xc4000004)
[all …]
/device/linaro/bootloader/arm-trusted-firmware/include/lib/
Dsmcc.h15 #define FUNCID_TYPE_SHIFT U(31)
16 #define FUNCID_CC_SHIFT U(30)
17 #define FUNCID_OEN_SHIFT U(24)
18 #define FUNCID_NUM_SHIFT U(0)
20 #define FUNCID_TYPE_MASK U(0x1)
21 #define FUNCID_CC_MASK U(0x1)
22 #define FUNCID_OEN_MASK U(0x3f)
23 #define FUNCID_NUM_MASK U(0xffff)
25 #define FUNCID_TYPE_WIDTH U(1)
26 #define FUNCID_CC_WIDTH U(1)
[all …]
/device/linaro/bootloader/arm-trusted-firmware/include/drivers/arm/
Dgic_v2.h21 #define GIC400_NUM_SPIS U(480)
22 #define MAX_PPIS U(14)
23 #define MAX_SGIS U(16)
26 #define GRP0 U(0)
27 #define GRP1 U(1)
28 #define GIC_TARGET_CPU_MASK U(0xff)
30 #define ENABLE_GRP0 (U(1) << 0)
31 #define ENABLE_GRP1 (U(1) << 1)
34 #define GICD_ITARGETSR U(0x800)
35 #define GICD_SGIR U(0xF00)
[all …]
/device/linaro/bootloader/arm-trusted-firmware/include/lib/cpus/aarch64/
Dcortex_a53.h11 #define CORTEX_A53_MIDR U(0x410FD030)
14 #define RETENTION_ENTRY_TICKS_2 U(0x1)
15 #define RETENTION_ENTRY_TICKS_8 U(0x2)
16 #define RETENTION_ENTRY_TICKS_32 U(0x3)
17 #define RETENTION_ENTRY_TICKS_64 U(0x4)
18 #define RETENTION_ENTRY_TICKS_128 U(0x5)
19 #define RETENTION_ENTRY_TICKS_256 U(0x6)
20 #define RETENTION_ENTRY_TICKS_512 U(0x7)
27 #define CORTEX_A53_ECTLR_SMP_BIT (U(1) << 6)
29 #define CORTEX_A53_ECTLR_CPU_RET_CTRL_SHIFT U(0)
[all …]
Dcortex_a57.h12 #define CORTEX_A57_MIDR U(0x410FD070)
15 #define RETENTION_ENTRY_TICKS_2 U(0x1)
16 #define RETENTION_ENTRY_TICKS_8 U(0x2)
17 #define RETENTION_ENTRY_TICKS_32 U(0x3)
18 #define RETENTION_ENTRY_TICKS_64 U(0x4)
19 #define RETENTION_ENTRY_TICKS_128 U(0x5)
20 #define RETENTION_ENTRY_TICKS_256 U(0x6)
21 #define RETENTION_ENTRY_TICKS_512 U(0x7)
28 #define CORTEX_A57_ECTLR_SMP_BIT (U(1) << 6)
29 #define CORTEX_A57_ECTLR_DIS_TWD_ACC_PFTCH_BIT (U(1) << 38)
[all …]
/device/linaro/bootloader/arm-trusted-firmware/include/lib/xlat_tables/
Dxlat_tables_defs.h14 #define NUM_2MB_IN_GB (U(1) << 9)
15 #define NUM_4K_IN_2MB (U(1) << 9)
16 #define NUM_GB_IN_4GB (U(1) << 2)
18 #define TWO_MB_SHIFT U(21)
19 #define ONE_GB_SHIFT U(30)
20 #define FOUR_KB_SHIFT U(12)
26 #define INVALID_DESC U(0x0)
31 #define BLOCK_DESC U(0x1) /* Table levels 0-2 */
33 #define TABLE_DESC U(0x3) /* Table levels 0-2 */
38 #define PAGE_DESC U(0x3) /* Table level 3 */
[all …]
/device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.2/Modules/
Dcmathmodule.c113 #define U -9.5426319407711027e33 /* unlikely value, used as placeholder */ macro
1103 C(P12,INF) C(U,U) C(U,U) C(U,U) C(U,U) C(P12,-INF) C(N,N) in initcmath()
1104 C(P12,INF) C(U,U) C(P12,0.) C(P12,-0.) C(U,U) C(P12,-INF) C(P12,N) in initcmath()
1105 C(P12,INF) C(U,U) C(P12,0.) C(P12,-0.) C(U,U) C(P12,-INF) C(P12,N) in initcmath()
1106 C(P12,INF) C(U,U) C(U,U) C(U,U) C(U,U) C(P12,-INF) C(N,N) in initcmath()
1113 C(INF,-P12) C(U,U) C(U,U) C(U,U) C(U,U) C(INF,P12) C(N,N) in initcmath()
1114 C(INF,-P12) C(U,U) C(0.,-P12) C(0.,P12) C(U,U) C(INF,P12) C(N,N) in initcmath()
1115 C(INF,-P12) C(U,U) C(0.,-P12) C(0.,P12) C(U,U) C(INF,P12) C(N,N) in initcmath()
1116 C(INF,-P12) C(U,U) C(U,U) C(U,U) C(U,U) C(INF,P12) C(N,N) in initcmath()
1123 C(-INF,-P12) C(U,U) C(U,U) C(U,U) C(U,U) C(-INF,P12) C(N,N) in initcmath()
[all …]
/device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.10/Modules/
Dcmathmodule.c113 #define U -9.5426319407711027e33 /* unlikely value, used as placeholder */ macro
1110 C(P12,INF) C(U,U) C(U,U) C(U,U) C(U,U) C(P12,-INF) C(N,N) in initcmath()
1111 C(P12,INF) C(U,U) C(P12,0.) C(P12,-0.) C(U,U) C(P12,-INF) C(P12,N) in initcmath()
1112 C(P12,INF) C(U,U) C(P12,0.) C(P12,-0.) C(U,U) C(P12,-INF) C(P12,N) in initcmath()
1113 C(P12,INF) C(U,U) C(U,U) C(U,U) C(U,U) C(P12,-INF) C(N,N) in initcmath()
1120 C(INF,-P12) C(U,U) C(U,U) C(U,U) C(U,U) C(INF,P12) C(N,N) in initcmath()
1121 C(INF,-P12) C(U,U) C(0.,-P12) C(0.,P12) C(U,U) C(INF,P12) C(N,N) in initcmath()
1122 C(INF,-P12) C(U,U) C(0.,-P12) C(0.,P12) C(U,U) C(INF,P12) C(N,N) in initcmath()
1123 C(INF,-P12) C(U,U) C(U,U) C(U,U) C(U,U) C(INF,P12) C(N,N) in initcmath()
1130 C(-INF,-P12) C(U,U) C(U,U) C(U,U) C(U,U) C(-INF,P12) C(N,N) in initcmath()
[all …]
/device/linaro/bootloader/arm-trusted-firmware/include/bl31/
Dinterrupt_mgmt.h15 #define INTR_TYPE_S_EL1 U(0)
16 #define INTR_TYPE_EL3 U(1)
17 #define INTR_TYPE_NS U(2)
18 #define MAX_INTR_TYPES U(3)
29 #define INTR_ID_UNAVAILABLE U(0xFFFFFFFF)
37 #define INTR_RM_FLAGS_SHIFT U(0x0)
38 #define INTR_RM_FLAGS_MASK U(0x3)
40 #define INTR_SEL1_VALID_RM0 U(0x2)
42 #define INTR_SEL1_VALID_RM1 U(0x3)
44 #define INTR_NS_VALID_RM0 U(0x0)
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/drivers/include/
Dt18x_ari.h25 TEGRA_ARI_MISC = 0U,
57 TEGRA_ARI_MISC_ECHO = 0U,
63 TEGRA_ARI_MISC_CCPLEX_SHUTDOWN_POWER_OFF = 0U,
70 TEGRA_ARI_CORE_C0 = 0U,
78 TEGRA_ARI_CLUSTER_CC0 = 0U,
85 TEGRA_ARI_CCPLEX_CCP0 = 0U,
91 TEGRA_ARI_SYSTEM_SC0 = 0U,
101 TEGRA_ARI_CROSSOVER_C1_C6 = 0U,
114 TEGRA_ARI_CSTATE_STATS_CLEAR = 0U,
141 TEGRA_ARI_GSC_ALL = 0U,
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/include/drivers/
Dpmc.h14 #define PMC_CONFIG U(0x0)
15 #define PMC_PWRGATE_STATUS U(0x38)
16 #define PMC_PWRGATE_TOGGLE U(0x30)
17 #define PMC_TOGGLE_START U(0x100)
18 #define PMC_SCRATCH39 U(0x138)
19 #define PMC_SECURE_DISABLE2 U(0x2c4)
20 #define PMC_SECURE_DISABLE2_WRITE22_ON (U(1) << 28)
21 #define PMC_SECURE_SCRATCH22 U(0x338)
22 #define PMC_SECURE_DISABLE3 U(0x2d8)
23 #define PMC_SECURE_DISABLE3_WRITE34_ON (U(1) << 20)
[all …]
/device/linaro/bootloader/arm-trusted-firmware/include/common/
Dep_info.h13 #define SECURE U(0x0)
14 #define NON_SECURE U(0x1)
21 #define ENTRY_POINT_INFO_PC_OFFSET U(0x08)
23 #define ENTRY_POINT_INFO_ARGS_OFFSET U(0x10)
25 #define ENTRY_POINT_INFO_ARGS_OFFSET U(0x18)
29 #define PARAM_EP_SECURITY_MASK U(0x1)
35 #define EP_EE_MASK U(0x2)
37 #define EP_EE_LITTLE U(0x0)
38 #define EP_EE_BIG U(0x2)
42 #define EP_ST_MASK U(0x4)
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/drivers/mce/
Dari.c96 if (evt_mask != 0U) { in ari_request_wait()
108 while (retries != 0U) { in ari_request_wait()
112 if ((status & (ARI_REQ_ONGOING | ARI_REQ_PENDING)) == 0U) { in ari_request_wait()
124 if (retries == 0U) { in ari_request_wait()
127 assert(retries != 0U); in ari_request_wait()
162 uint32_t val = 0U; in ari_update_cstate_info()
168 if (cluster != 0U) { in ari_update_cstate_info()
174 if (ccplex != 0U) { in ari_update_cstate_info()
180 if (system != 0U) { in ari_update_cstate_info()
187 if (update_wake_mask != 0U) { in ari_update_cstate_info()
[all …]
/device/google/cuttlefish/guest/hals/camera/
DConverters.cpp28 static void _YUV420SToRGB565(const uint8_t* Y, const uint8_t* U, in _YUV420SToRGB565() argument
31 const uint8_t* U_pos = U; in _YUV420SToRGB565()
35 for (int x = 0; x < width; x += 2, U += dUV, V += dUV) { in _YUV420SToRGB565()
36 const uint8_t nU = *U; in _YUV420SToRGB565()
46 U_pos = U; in _YUV420SToRGB565()
49 U = U_pos; in _YUV420SToRGB565()
55 static void _YUV420SToRGB32(const uint8_t* Y, const uint8_t* U, in _YUV420SToRGB32() argument
58 const uint8_t* U_pos = U; in _YUV420SToRGB32()
62 for (int x = 0; x < width; x += 2, U += dUV, V += dUV) { in _YUV420SToRGB32()
63 const uint8_t nU = *U; in _YUV420SToRGB32()
[all …]

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