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/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey/
Dhisi_ipc.c33 int hisi_cpus_pd_in_cluster_besides_curr(unsigned int cpu, in hisi_cpus_pd_in_cluster_besides_curr() argument
44 if (cpu == i) in hisi_cpus_pd_in_cluster_besides_curr()
55 int hisi_cpus_powered_off_besides_curr(unsigned int cpu) in hisi_cpus_powered_off_besides_curr() argument
60 return (val == (0x8 << (cpu * 4))); in hisi_cpus_powered_off_besides_curr()
93 void hisi_ipc_cpu_on_off(unsigned int cpu, unsigned int cluster, in hisi_ipc_cpu_on_off() argument
100 offset = cluster * 16 + cpu * 4; in hisi_ipc_cpu_on_off()
102 offset = cluster * 16 + cpu * 4 + 1; in hisi_ipc_cpu_on_off()
112 hisi_ipc_send(cpu_ipc_num[cluster][cpu]); in hisi_ipc_cpu_on_off()
115 void hisi_ipc_cpu_on(unsigned int cpu, unsigned int cluster) in hisi_ipc_cpu_on() argument
117 hisi_ipc_cpu_on_off(cpu, cluster, HISI_IPC_PM_ON); in hisi_ipc_cpu_on()
[all …]
Dhikey_pm.c33 int cpu, cluster; in hikey_pwr_domain_on() local
37 cpu = MPIDR_AFFLVL0_VAL(mpidr); in hikey_pwr_domain_on()
40 hisi_ipc_cluster_on(cpu, cluster); in hikey_pwr_domain_on()
42 hisi_pwrc_set_core_bx_addr(cpu, cluster, hikey_sec_entrypoint); in hikey_pwr_domain_on()
43 hisi_pwrc_enable_debug(cpu, cluster); in hikey_pwr_domain_on()
44 hisi_ipc_cpu_on(cpu, cluster); in hikey_pwr_domain_on()
52 int cpu, cluster; in hikey_pwr_domain_on_finish() local
56 cpu = MPIDR_AFFLVL0_VAL(mpidr); in hikey_pwr_domain_on_finish()
67 hisi_pwrc_set_core_bx_addr(cpu, cluster, 0); in hikey_pwr_domain_on_finish()
78 int cpu, cluster; in hikey_pwr_domain_off() local
[all …]
/device/google/sunfish/
Dinit.power.rc26 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/governor…
27 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/polling_…
28 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
29 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
30 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
31 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
32 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
33 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
34 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
35 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
[all …]
/device/google/coral/
Dinit.power.rc33 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/governor…
34 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/polling_…
35 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
36 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
37 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
38 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
39 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
40 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
41 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
42 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/common/drivers/flowctrl/
Dflowctrl.c81 int cpu = mpidr & MPIDR_CPU_MASK; in tegra_fc_cpu_powerdn() local
83 VERBOSE("CPU%d powering down...\n", cpu); in tegra_fc_cpu_powerdn()
84 tegra_fc_prepare_suspend(cpu, 0); in tegra_fc_cpu_powerdn()
92 int cpu = mpidr & MPIDR_CPU_MASK; in tegra_fc_cluster_idle() local
97 tegra_fc_cc4_ctrl(cpu, 0); in tegra_fc_cluster_idle()
105 tegra_fc_prepare_suspend(cpu, val); in tegra_fc_cluster_idle()
113 int cpu = mpidr & MPIDR_CPU_MASK; in tegra_fc_cluster_powerdn() local
118 tegra_fc_cc4_ctrl(cpu, 0); in tegra_fc_cluster_powerdn()
126 tegra_fc_prepare_suspend(cpu, val); in tegra_fc_cluster_powerdn()
134 int cpu = mpidr & MPIDR_CPU_MASK; in tegra_fc_soc_powerdn() local
[all …]
/device/linaro/bootloader/arm-trusted-firmware/fdts/
Dfvp-base-gicv3-psci-common.dtsi42 cpu-map {
45 cpu = <&CPU0>;
48 cpu = <&CPU1>;
51 cpu = <&CPU2>;
54 cpu = <&CPU3>;
60 cpu = <&CPU4>;
63 cpu = <&CPU5>;
66 cpu = <&CPU6>;
69 cpu = <&CPU7>;
77 CPU_SLEEP_0: cpu-sleep-0 {
[all …]
Dfvp-base-gicv2-psci.dts44 cpu-map {
47 cpu = <&CPU0>;
50 cpu = <&CPU1>;
53 cpu = <&CPU2>;
56 cpu = <&CPU3>;
62 cpu = <&CPU4>;
65 cpu = <&CPU5>;
68 cpu = <&CPU6>;
71 cpu = <&CPU7>;
79 CPU_SLEEP_0: cpu-sleep-0 {
[all …]
Dfvp-base-gicv2-psci-aarch32.dts44 cpu-map {
47 cpu = <&CPU0>;
50 cpu = <&CPU1>;
53 cpu = <&CPU2>;
56 cpu = <&CPU3>;
62 cpu = <&CPU4>;
65 cpu = <&CPU5>;
68 cpu = <&CPU6>;
71 cpu = <&CPU7>;
79 CPU_SLEEP_0: cpu-sleep-0 {
[all …]
Dfvp-base-gicv3-psci-aarch32.dts44 cpu-map {
47 cpu = <&CPU0>;
50 cpu = <&CPU1>;
53 cpu = <&CPU2>;
56 cpu = <&CPU3>;
62 cpu = <&CPU4>;
65 cpu = <&CPU5>;
68 cpu = <&CPU6>;
71 cpu = <&CPU7>;
79 CPU_SLEEP_0: cpu-sleep-0 {
[all …]
Dfvp-foundation-gicv3-psci.dts44 cpu-map {
47 cpu = <&CPU0>;
50 cpu = <&CPU1>;
53 cpu = <&CPU2>;
56 cpu = <&CPU3>;
64 CPU_SLEEP_0: cpu-sleep-0 {
83 CPU0:cpu@0 {
84 device_type = "cpu";
88 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
92 CPU1:cpu@1 {
[all …]
Dfvp-foundation-gicv2-psci.dts44 cpu-map {
47 cpu = <&CPU0>;
50 cpu = <&CPU1>;
53 cpu = <&CPU2>;
56 cpu = <&CPU3>;
64 CPU_SLEEP_0: cpu-sleep-0 {
83 CPU0:cpu@0 {
84 device_type = "cpu";
88 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
92 CPU1:cpu@1 {
[all …]
/device/google/redbull/
Dinit.power.rc22 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/governor…
23 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/polling_…
24 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
25 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
26 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
27 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
28 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
29 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
30 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
31 …write /sys/devices/platform/soc/soc:qcom,cpu-cpu-llcc-bw/devfreq/soc:qcom,cpu-cpu-llcc-bw/bw_hwmon…
[all …]
/device/google/contexthub/firmware/os/cpu/cortexm4/
Dcortexm4.mk29 os/cpu/$(CPU)/atomicBitset.c \
30 os/cpu/$(CPU)/cpu.c \
31 os/cpu/$(CPU)/pendsv.c \
32 os/cpu/$(CPU)/atomic.c \
33 os/cpu/$(CPU)/appSupport.c \
34 os/cpu/$(CPU)/cpuMath.c \
37 SRCS_bl += os/cpu/$(CPU)/cpu.c
66 DEPS += $(wildcard os/cpu/$(CPU)/inc/cpu/*.h)
67 DEPS += $(wildcard os/cpu/$(CPU)/inc/cpu/cmsis/*.h)
/device/linaro/bootloader/arm-trusted-firmware/plat/nvidia/tegra/soc/t132/
Dplat_psci_handlers.c39 int cpu = read_mpidr() & MPIDR_CPU_MASK; in tegra_soc_validate_power_state() local
46 if ((state_id != PSTATE_ID_SOC_POWERDN) || (cpu != 0)) { in tegra_soc_validate_power_state()
64 int cpu = mpidr & MPIDR_CPU_MASK; in tegra_soc_pwr_domain_on() local
65 uint32_t mask = CPU_CORE_RESET_MASK << cpu; in tegra_soc_pwr_domain_on()
67 if (cpu_powergate_mask[cpu] == 0) { in tegra_soc_pwr_domain_on()
73 tegra_pmc_cpu_on(cpu); in tegra_soc_pwr_domain_on()
76 cpu_powergate_mask[cpu] = 1; in tegra_soc_pwr_domain_on()
80 tegra_fc_cpu_on(cpu); in tegra_soc_pwr_domain_on()
112 int cpu = read_mpidr() & MPIDR_CPU_MASK; in tegra_soc_pwr_domain_suspend() local
115 assert(cpu == 0); in tegra_soc_pwr_domain_suspend()
/device/linaro/bootloader/OpenPlatformPkg/Platforms/ARM/VExpress/DeviceTree/
Dfvp-base-gicv2-psci.dts70 cpu-map {
73 cpu = <&CPU0>;
76 cpu = <&CPU1>;
79 cpu = <&CPU2>;
82 cpu = <&CPU3>;
88 cpu = <&CPU4>;
91 cpu = <&CPU5>;
94 cpu = <&CPU6>;
97 cpu = <&CPU7>;
105 CPU_SLEEP_0: cpu-sleep-0 {
[all …]
Dfvp-base-gicv3-psci.dts68 cpu-map {
71 cpu = <&CPU0>;
74 cpu = <&CPU1>;
77 cpu = <&CPU2>;
80 cpu = <&CPU3>;
86 cpu = <&CPU4>;
89 cpu = <&CPU5>;
92 cpu = <&CPU6>;
95 cpu = <&CPU7>;
103 CPU_SLEEP_0: cpu-sleep-0 {
[all …]
Dfvp-base-gicv2legacy-psci.dts70 cpu-map {
73 cpu = <&CPU0>;
76 cpu = <&CPU1>;
79 cpu = <&CPU2>;
82 cpu = <&CPU3>;
88 cpu = <&CPU4>;
91 cpu = <&CPU5>;
94 cpu = <&CPU6>;
97 cpu = <&CPU7>;
105 CPU_SLEEP_0: cpu-sleep-0 {
[all …]
Dfvp-foundation-gicv2legacy-psci.dts70 cpu-map {
73 cpu = <&CPU0>;
76 cpu = <&CPU1>;
79 cpu = <&CPU2>;
82 cpu = <&CPU3>;
90 CPU_SLEEP_0: cpu-sleep-0 {
109 CPU0:cpu@0 {
110 device_type = "cpu";
114 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
117 CPU1:cpu@1 {
[all …]
Dfvp-foundation-gicv2-psci.dts70 cpu-map {
73 cpu = <&CPU0>;
76 cpu = <&CPU1>;
79 cpu = <&CPU2>;
82 cpu = <&CPU3>;
90 CPU_SLEEP_0: cpu-sleep-0 {
109 CPU0:cpu@0 {
110 device_type = "cpu";
114 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
117 CPU1:cpu@1 {
[all …]
Dfvp-foundation-gicv3-psci.dts68 cpu-map {
71 cpu = <&CPU0>;
74 cpu = <&CPU1>;
77 cpu = <&CPU2>;
80 cpu = <&CPU3>;
88 CPU_SLEEP_0: cpu-sleep-0 {
107 CPU0:cpu@0 {
108 device_type = "cpu";
112 cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
115 CPU1:cpu@1 {
[all …]
/device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3368/drivers/pmu/
Dpmu.c238 uint32_t cpu, in cpus_id_power_domain() argument
246 pd = PD_CPUB0 + cpu; in cpus_id_power_domain()
248 pd = PD_CPUL0 + cpu; in cpus_id_power_domain()
254 mpidr = (cluster << MPIDR_AFF1_SHIFT) | cpu; in cpus_id_power_domain()
264 uint32_t boot_cpu, boot_cluster, cpu; in nonboot_cpus_off() local
270 for (cpu = 0; cpu < PLATFORM_CLUSTER0_CORE_COUNT; cpu++) { in nonboot_cpus_off()
271 if (!boot_cluster && (cpu == boot_cpu)) in nonboot_cpus_off()
273 cpus_id_power_domain(0, cpu, pmu_pd_off, CKECK_WFEI_MSK); in nonboot_cpus_off()
276 for (cpu = 0; cpu < PLATFORM_CLUSTER1_CORE_COUNT; cpu++) { in nonboot_cpus_off()
277 if (boot_cluster && (cpu == boot_cpu)) in nonboot_cpus_off()
[all …]
/device/google/contexthub/firmware/os/cpu/x86/
Dx86.mk24 os/cpu/$(CPU)/atomicBitset.c \
25 os/cpu/$(CPU)/cpu.c \
26 os/cpu/$(CPU)/atomic.c \
29 DEPS += $(wildcard os/cpu/$(CPU)/inc/cpu/*.h)
/device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey/include/
Dhisi_ipc.h37 void hisi_ipc_cpu_on(unsigned int cpu, unsigned int cluster);
38 void hisi_ipc_cpu_off(unsigned int cpu, unsigned int cluster);
39 void hisi_ipc_cpu_suspend(unsigned int cpu, unsigned int cluster);
40 void hisi_ipc_cluster_on(unsigned int cpu, unsigned int cluster);
41 void hisi_ipc_cluster_off(unsigned int cpu, unsigned int cluster);
42 void hisi_ipc_cluster_suspend(unsigned int cpu, unsigned int cluster);
/device/linaro/bootloader/arm-trusted-firmware/lib/cpus/
Derrata_report.c63 void errata_print_msg(unsigned int status, const char *cpu, const char *id) in errata_print_msg() argument
76 assert(cpu); in errata_print_msg()
83 VERBOSE(ERRATA_FORMAT, bl_str, cpu, id, msg); in errata_print_msg()
87 INFO(ERRATA_FORMAT, bl_str, cpu, id, msg); in errata_print_msg()
91 WARN(ERRATA_FORMAT, bl_str, cpu, id, msg); in errata_print_msg()
95 WARN(ERRATA_FORMAT, bl_str, cpu, id, "unknown"); in errata_print_msg()
/device/linaro/bootloader/arm-trusted-firmware/services/spd/tlkd/
Dtlkd_pm.c41 int cpu = read_mpidr() & MPIDR_CPU_MASK; in cpu_suspend_handler() local
48 if ((cpu != 0) || (suspend_level != PLAT_MAX_PWR_LVL)) in cpu_suspend_handler()
73 int cpu = read_mpidr() & MPIDR_CPU_MASK; in cpu_resume_handler() local
81 if ((cpu != 0) || (suspend_level != PLAT_MAX_PWR_LVL)) in cpu_resume_handler()
104 int cpu = read_mpidr() & MPIDR_CPU_MASK; in system_off_handler() local
108 if (cpu != 0) in system_off_handler()

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