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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/
Dase_warnings.ll61 ; MSA_32: warning: the 'msa' ASE requires MIPS32 revision 5 or greater
62 ; MSA_64: warning: the 'msa' ASE requires MIPS64 revision 5 or greater
63 ; MSA_32_NO_WARNING-NOT: warning: the 'msa' ASE requires MIPS32 revision 5 or greater
64 ; MSA_64_NO_WARNING-NOT: warning: the 'msa' ASE requires MIPS64 revision 5 or greater
66 ; DSPR2_32: warning: the 'dspr2' ASE requires MIPS32 revision 2 or greater
67 ; DSPR2_64: warning: the 'dspr2' ASE requires MIPS64 revision 2 or greater
68 ; DSPR2_32_NO_WARNING-NOT: warning: the 'dspr2' ASE requires MIPS32 revision 2 or greater
69 ; DSPR2_64_NO_WARNING-NOT: warning: the 'dspr2' ASE requires MIPS64 revision 2 or greater
71 ; DSP_32: warning: the 'dsp' ASE requires MIPS32 revision 2 or greater
72 ; DSP_64: warning: the 'dsp' ASE requires MIPS64 revision 2 or greater
[all …]
Dmicromips-ase-function-attribute.ll3 ; RUN: FileCheck --check-prefix=ASE-MICROMIPS %s
11 ; ASE-MICROMIPS: microMIPS (0x800)
Ddsp-patterns.ll104 ; DSP-ASE doesn't have a v4i8 multiply instruction. Check that multiply node gets expanded.
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMips.td33 // Predicate for the ASE that an instruction belongs to.
169 def FeatureDSP : SubtargetFeature<"dsp", "HasDSP", "true", "Mips DSP ASE">;
171 "Mips DSP-R2 ASE", [FeatureDSP]>;
173 : SubtargetFeature<"dspr3", "HasDSPR3", "true", "Mips DSP-R3 ASE",
176 def FeatureMSA : SubtargetFeature<"msa", "HasMSA", "true", "Mips MSA ASE">;
178 def FeatureEVA : SubtargetFeature<"eva", "HasEVA", "true", "Mips EVA ASE">;
180 def FeatureCRC : SubtargetFeature<"crc", "HasCRC", "true", "Mips R6 CRC ASE">;
183 "Mips Virtualization ASE">;
186 "Mips Global Invalidate ASE">;
203 def FeatureMT : SubtargetFeature<"mt", "HasMT", "true", "Mips MT ASE">;
DMipsMTInstrInfo.td10 // This file describes the MIPS MT ASE as defined by MD00378 1.12.
12 // TODO: Add support for the microMIPS encodings for the MT ASE and add the
DMipsEVAInstrInfo.td1 //===- MipsEVAInstrInfo.td - EVA ASE instructions -*- tablegen ------------*-=//
10 // This file describes Mips EVA ASE instructions.
DMipsRegisterInfo.td235 // DSP-ASE control register fields.
253 // MSA-ASE control registers.
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/
Dmicromips-ase-directive.s3 # RUN: FileCheck --check-prefix=ASE-MICROMIPS %s
10 # ASE-MICROMIPS: microMIPS (0x800)
Dset-push-pop-directives.s19 .set nomsa # Test the Features option (ASE).
/external/llvm/lib/Target/Mips/
DMips.td31 // Predicates for the instruction group membership such as ISA's and ASE's
159 def FeatureDSP : SubtargetFeature<"dsp", "HasDSP", "true", "Mips DSP ASE">;
161 "Mips DSP-R2 ASE", [FeatureDSP]>;
163 : SubtargetFeature<"dspr3", "HasDSPR3", "true", "Mips DSP-R3 ASE",
166 def FeatureMSA : SubtargetFeature<"msa", "HasMSA", "true", "Mips MSA ASE">;
168 def FeatureEVA : SubtargetFeature<"eva", "HasEVA", "true", "Mips EVA ASE">;
DMipsEVAInstrInfo.td1 //===- MipsEVAInstrInfo.td - EVA ASE instructions -*- tablegen ------------*-=//
10 // This file describes Mips EVA ASE instructions.
DMipsRegisterInfo.td235 // DSP-ASE control register fields.
253 // MSA-ASE control registers.
/external/llvm/test/CodeGen/Mips/mips32r6/
Dcompatibility.ll5 ; DSP: MIPS32r6 is not compatible with the DSP ASE
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mt/
Dabiflag.s4 # Test that the usage of the MT ASE is recorded in .MIPS.abiflags
Dset-directive.s6 # Test that the MT ASE flag in .MIPS.abiflags is _not_ set by .set.
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/mips32r6/
Dcompatibility.ll5 ; DSP: MIPS32r6 is not compatible with the DSP ASE
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/mips64r6/
Dcompatibility.ll5 ; DSP: MIPS64r6 is not compatible with the DSP ASE
/external/llvm/test/CodeGen/Mips/mips64r6/
Dcompatibility.ll5 ; DSP: MIPS64r6 is not compatible with the DSP ASE
/external/clang/lib/Analysis/
DReachableCode.cpp540 const ArraySubscriptExpr *ASE = cast<ArraySubscriptExpr>(S); in GetUnreachableLoc() local
541 R1 = ASE->getLHS()->getSourceRange(); in GetUnreachableLoc()
542 R2 = ASE->getRHS()->getSourceRange(); in GetUnreachableLoc()
543 return ASE->getRBracketLoc(); in GetUnreachableLoc()
/external/llvm/test/MC/Mips/
Dset-push-pop-directives.s19 .set nomsa # Test the Features option (ASE).
/external/swiftshader/third_party/llvm-7.0/llvm/docs/
DReleaseNotes.rst171 * Added support for Virtualization, Global INValidate ASE,
172 and CRC ASE instructions.
/external/clang/lib/Sema/
DSemaChecking.cpp6820 const auto *ASE = cast<ArraySubscriptExpr>(E); in EvalVal() local
6821 if (ASE->isTypeDependent()) in EvalVal()
6823 return EvalAddr(ASE->getBase(), refVars, ParentDecl); in EvalVal()
9575 const ArraySubscriptExpr *ASE, in CheckArrayAccess() argument
9644 if (ASE) { in CheckArrayAccess()
9646 ASE->getRBracketLoc()); in CheckArrayAccess()
9656 if (ASE) in CheckArrayAccess()
9666 if (!ASE) { in CheckArrayAccess()
9678 while (const ArraySubscriptExpr *ASE = in CheckArrayAccess() local
9680 BaseExpr = ASE->getBase()->IgnoreParenCasts(); in CheckArrayAccess()
[all …]
DSemaOpenMP.cpp8161 if (auto *ASE = dyn_cast_or_null<ArraySubscriptExpr>(RefExpr)) { in getPrivateItem() local
8162 auto *Base = ASE->getBase()->IgnoreParenImpCasts(); in getPrivateItem()
9131 auto *ASE = dyn_cast<ArraySubscriptExpr>(RefExpr->IgnoreParens()); in ActOnOpenMPReductionClause() local
9133 if (ASE) in ActOnOpenMPReductionClause()
9134 Type = ASE->getType().getNonReferenceType(); in ActOnOpenMPReductionClause()
9158 if (!ASE && !OASE) { in ActOnOpenMPReductionClause()
9171 if (!ASE && !OASE && VD) { in ActOnOpenMPReductionClause()
9266 if (!ASE && !OASE) { in ActOnOpenMPReductionClause()
9279 if (!ASE && !OASE) { in ActOnOpenMPReductionClause()
9298 (!ASE && in ActOnOpenMPReductionClause()
[all …]
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenSubtargetInfo.inc78 { "crc", "Mips R6 CRC ASE", { Mips::FeatureCRC }, { } },
79 { "dsp", "Mips DSP ASE", { Mips::FeatureDSP }, { } },
80 { "dspr2", "Mips DSP-R2 ASE", { Mips::FeatureDSPR2 }, { Mips::FeatureDSP } },
81 { "dspr3", "Mips DSP-R3 ASE", { Mips::FeatureDSPR3 }, { Mips::FeatureDSP, Mips::FeatureDSPR2 } },
82 { "eva", "Mips EVA ASE", { Mips::FeatureEVA }, { } },
85 { "ginv", "Mips Global Invalidate ASE", { Mips::FeatureGINV }, { } },
110 { "msa", "Mips MSA ASE", { Mips::FeatureMSA }, { } },
111 { "mt", "Mips MT ASE", { Mips::FeatureMT }, { } },
124 { "virt", "Mips Virtualization ASE", { Mips::FeatureVirt }, { } },
/external/clang/lib/CodeGen/
DCGExpr.cpp2969 if (const auto *ASE = dyn_cast<ArraySubscriptExpr>(Array)) in EmitArraySubscriptExpr() local
2970 ArrayLV = EmitArraySubscriptExpr(ASE, /*Accessed*/ true); in EmitArraySubscriptExpr()
3004 if (auto *ASE = dyn_cast<OMPArraySectionExpr>(Base->IgnoreParenImpCasts())) { in emitOMPArraySectionBase() local
3005 BaseLVal = CGF.EmitOMPArraySectionExpr(ASE, IsLowerBound); in emitOMPArraySectionBase()
3036 if (auto *ASE = in EmitOMPArraySectionExpr() local
3038 BaseTy = OMPArraySectionExpr::getBaseOriginalType(ASE); in EmitOMPArraySectionExpr()
3165 if (const auto *ASE = dyn_cast<ArraySubscriptExpr>(Array)) in EmitOMPArraySectionExpr() local
3166 ArrayLV = EmitArraySubscriptExpr(ASE, /*Accessed*/ true); in EmitOMPArraySectionExpr()

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