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Searched refs:ATMEL_MPDDRC_TPR0_TWR_OFFSET (Results 1 – 17 of 17) sorted by relevance

/external/u-boot/board/gardena/smart-gateway-at91sam/
Dspl.c94 2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET | in ddr2_conf()
/external/u-boot/board/atmel/sama5d27_som1_ek/
Dsama5d27_som1_ek.c119 (3 << ATMEL_MPDDRC_TPR0_TWR_OFFSET) | in ddrc_conf()
/external/u-boot/board/atmel/sama5d3_xplained/
Dsama5d3_xplained.c154 2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET | in ddr2_conf()
/external/u-boot/board/atmel/sama5d2_xplained/
Dsama5d2_xplained.c120 4 << ATMEL_MPDDRC_TPR0_TWR_OFFSET | in ddrc_conf()
/external/u-boot/board/laird/wb45n/
Dwb45n.c160 2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET | in ddr2_conf()
/external/u-boot/board/laird/wb50n/
Dwb50n.c156 2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET | in ddr2_conf()
/external/u-boot/board/atmel/sama5d27_wlsom1_ek/
Dsama5d27_wlsom1_ek.c160 (4 << ATMEL_MPDDRC_TPR0_TWR_OFFSET) | in ddrc_conf()
/external/u-boot/board/atmel/at91sam9x5ek/
Dat91sam9x5ek.c167 2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET | in ddr2_conf()
/external/u-boot/board/atmel/sama5d4_xplained/
Dsama5d4_xplained.c170 3 << ATMEL_MPDDRC_TPR0_TWR_OFFSET | in ddr2_conf()
/external/u-boot/board/atmel/sama5d2_icp/
Dsama5d2_icp.c157 (3 << ATMEL_MPDDRC_TPR0_TWR_OFFSET) | in ddrc_conf()
/external/u-boot/board/atmel/sama5d4ek/
Dsama5d4ek.c155 3 << ATMEL_MPDDRC_TPR0_TWR_OFFSET | in ddr2_conf()
/external/u-boot/arch/arm/mach-at91/include/mach/
Datmel_mpddrc.h127 #define ATMEL_MPDDRC_TPR0_TWR_OFFSET 8 macro
/external/u-boot/board/siemens/corvus/
Dboard.c149 2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET | /* 2*7.5 = 15 ns */ in ddr2_conf()
/external/u-boot/board/atmel/at91sam9m10g45ek/
Dat91sam9m10g45ek.c108 2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET | /* 2*7.5 = 15 ns */ in ddr2_conf()
/external/u-boot/board/atmel/sama5d3xek/
Dsama5d3xek.c227 2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET | in ddr2_conf()
/external/u-boot/board/atmel/at91sam9n12ek/
Dat91sam9n12ek.c251 2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET | in ddr2_conf()
/external/u-boot/board/mini-box/picosam9g45/
Dpicosam9g45.c63 2 << ATMEL_MPDDRC_TPR0_TWR_OFFSET | /* 2*7.5 = 15 ns */ in ddr2_conf()