/external/boringssl/src/ssl/test/runner/curve25519/ |
D | ladderstep_amd64.s | 21 MOVQ SI,AX 26 ADDQ ·_2P0(SB),AX 36 SUBQ 80(DI),AX 46 MOVQ AX,40(SP) 51 MOVQ 40(SP),AX 53 MOVQ AX,SI 55 MOVQ 40(SP),AX 56 SHLQ $1,AX 58 MOVQ AX,R8 60 MOVQ 40(SP),AX [all …]
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D | mul_amd64.s | 20 IMUL3Q $19,DX,AX 21 MOVQ AX,0(SP) 23 MOVQ AX,R8 26 IMUL3Q $19,DX,AX 27 MOVQ AX,8(SP) 29 ADDQ AX,R8 31 MOVQ 0(SI),AX 33 ADDQ AX,R8 35 MOVQ 0(SI),AX 37 MOVQ AX,R10 [all …]
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D | square_amd64.s | 17 MOVQ 0(SI),AX 19 MOVQ AX,CX 21 MOVQ 0(SI),AX 22 SHLQ $1,AX 24 MOVQ AX,R9 26 MOVQ 0(SI),AX 27 SHLQ $1,AX 29 MOVQ AX,R11 31 MOVQ 0(SI),AX 32 SHLQ $1,AX [all …]
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D | freeze_amd64.s | 21 MOVQ $REDMASK51,AX 22 MOVQ AX,R10 28 ANDQ AX,SI 32 ANDQ AX,DX 36 ANDQ AX,CX 40 ANDQ AX,R8 44 ANDQ AX,R9 52 CMPQ AX,DX 54 CMPQ AX,CX 56 CMPQ AX,R8 [all …]
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/external/honggfuzz/examples/apache-httpd/corpus_http2/ |
D | c655e9a9ede9436b3027c7a5ca6e6e7f.00001cc9.honggfuzz.cov | 20 …!2�;\fdn�tȗ��a�G~����&�粀�����c�\n�Ex=�jC+�*Tg+�}�Kd�p~WK����|�b���9'�^�ꫭt�|�����AX/�j[�T� 21 …!2�;\fdn�tȗ��a�G~����&�粀�����c�\n�Ex=�jC+�*Tg+�}�Kd�p~WK����|�b���9'�^�ꫭt�|�����AX/�j[�T� 22 …!2�;\fdn�tȗ��a�G~����&�粀�����c�\n�Ex=�jC+�*Tg+�}�Kd�p~WK����|�b���9'�^�ꫭt�|�����AX/�j[�T� 23 …!2�;\fdn�tȗ��a�G~����&�粀�����c�\n�Ex=�jC+�*Tg+�}�Kd�p~WK����|�b���9'�^�ꫭt�|�����AX/�j[�T� 24 …!2�;\fdn�tȗ��a�G~����&�粀�����c�\n�Ex=�jC+�*Tg+�}�Kd�p~WK����|�b���9'�^�ꫭt�|�����AX/�j[�T� 25 …!2�;\fdn�tȗ��a�G~����&�粀�����c�\n�Ex=�jC+�*Tg+�}�Kd�p~WK����|�b���9'�^�ꫭt�|�����AX/�j[�T� 26 …!2�;\fdn�tȗ��a�G~����&�粀�����c�\n�Ex=�jC+�*Tg+�}�Kd�p~WK����|�b���9'�^�ꫭt�|�����AX/�j[�T� 27 …!2�;\fdn�tȗ��a�G~����&�粀�����c�\n�Ex=�jC+�*Tg+�}�Kd�p~WK����|�b���9'�^�ꫭt�|�����AX/�j[�T� 28 …!2�;\fdn�tȗ��a�G~����&�粀�����c�\n�Ex=�jC+�*Tg+�}�Kd�p~WK����|�b���9'�^�ꫭt�|�����AX/�j[�T� 29 …!2�;\fdn�tȗ��a�G~����&�粀�����c�\n�Ex=�jC+�*Tg+�}�Kd�p~WK����|�b���9'�^�ꫭt�|�����AX/�j[�T� [all …]
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/external/boringssl/src/ssl/test/runner/poly1305/ |
D | sum_amd64.s | 16 MOVQ r0, AX; \ 18 MOVQ AX, t0; \ 20 MOVQ r0, AX; \ 22 ADDQ AX, t1; \ 28 MOVQ r1, AX; \ 30 ADDQ AX, t1; \ 35 MOVQ r1, AX; \ 37 ADDQ AX, t2; \ 66 MOVQ key+24(FP), AX 68 MOVQ 0(AX), R11 [all …]
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/external/elfutils/tests/ |
D | run-strip-remove-keep.sh | 49 [10] .init PROGBITS 080482bc 0002bc 000018 0 AX 0 0 4 50 [11] .plt PROGBITS 080482d4 0002d4 000050 4 AX 0 0 4 51 [12] .text PROGBITS 08048330 000330 00018c 0 AX 0 0 16 52 [13] .fini PROGBITS 080484bc 0004bc 00001e 0 AX 0 0 4 84 [10] .init NOBITS 080482bc 000114 000018 0 AX 0 0 4 85 [11] .plt NOBITS 080482d4 000114 000050 4 AX 0 0 4 86 [12] .text NOBITS 08048330 000120 00018c 0 AX 0 0 16 87 [13] .fini NOBITS 080484bc 000120 00001e 0 AX 0 0 4 135 [10] .init PROGBITS 080482bc 0002bc 000018 0 AX 0 0 4 136 [11] .plt PROGBITS 080482d4 0002d4 000050 4 AX 0 0 4 [all …]
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D | run-readelf-z.sh | 30 [ 1] .text PROGBITS 0000000000400078 00000078 0000002a 0 AX 0 0 1 52 [ 1] .text PROGBITS 0000000010000078 00000078 00000074 0 AX 0 0 8 75 [ 1] .text PROGBITS 0000000000400078 00000078 0000002a 0 AX 0 0 1 97 [ 1] .text PROGBITS 0000000010000078 00000078 00000074 0 AX 0 0 8 120 [ 1] .text PROGBITS 08048054 000054 00002a 0 AX 0 0 1 142 [ 1] .text PROGBITS 01800054 000054 000074 0 AX 0 0 1 165 [ 1] .text PROGBITS 08048054 000054 00002a 0 AX 0 0 1 187 [ 1] .text PROGBITS 01800054 000054 000074 0 AX 0 0 1
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/external/llvm/test/CodeGen/X86/ |
D | promote-vec3.ll | 23 ; SSE3-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 37 ; SSE41-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 51 ; AVX_ANY-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 65 ; AVX_X86_64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 89 ; SSE3-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 104 ; SSE41-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 119 ; AVX_ANY-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 134 ; AVX_X86_64-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
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D | anyext.ll | 11 ; X32-NEXT: # kill: %EAX<def> %EAX<kill> %AX<def> 20 ; X64-NEXT: # kill: %EAX<def> %EAX<kill> %AX<def> 38 ; X32-NEXT: # kill: %AX<def> %AX<kill> %EAX<def> 47 ; X64-NEXT: # kill: %AX<def> %AX<kill> %EAX<def>
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D | extractelement-index.ll | 136 ; SSE-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 142 ; AVX-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 152 ; SSE-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 158 ; AVX-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 168 ; SSE-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 174 ; AVX-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 185 ; SSE-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 192 ; AVX1-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill> 200 ; AVX2-NEXT: # kill: %AX<def> %AX<kill> %EAX<kill>
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D | crash-O0.ll | 9 ; aliased registers (AX and AL) - RegAllocFast does not like that. 34 ; CQO defines implicitly AX and DIV64 uses it implicitly too. 36 ; AX for the vreg defined in between and the compiler crashed.
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D | pr21792.ll | 36 ; CHECK-NEXT: movd %xmm0, %r[[AX:..]] 37 ; CHECK-NEXT: movslq %e[[AX]], 38 ; CHECK-NEXT: sarq $32, %r[[AX]]
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/external/clang/test/Layout/ |
D | ms-x86-primary-bases.cpp | 167 struct AX : B0X, B1X { int a; AX() : a(0xf000000A) {} virtual void f() { printf("A"); } }; in f() argument 324 sizeof(AX)+
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D | ms-x86-aligned-tail-padding.cpp | 352 struct AX : B0X, virtual B2X, virtual B6X, virtual B3X { struct 354 AX() : a(0xf000000A) {} in AX() function 531 sizeof(AX)+
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D | ms-x86-lazy-empty-nonvirtual-base.cpp | 623 struct AX : B1X, B2X, B3X, B4X, virtual B0X { struct 625 AX() : a(0x0000000A) { printf(" A = %p\n", this); } in AX() argument 831 sizeof(AX)+
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/external/swiftshader/third_party/llvm-7.0/llvm/unittests/tools/llvm-exegesis/X86/ |
D | RegisterAliasingTest.cpp | 51 llvm::X86::AL, llvm::X86::AH, llvm::X86::AX, in TEST_F() 83 ASSERT_THAT(&Cache.getRegister(llvm::X86::AX), in TEST_F() 84 &Cache.getRegister(llvm::X86::AX)); in TEST_F()
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/external/llvm/test/MC/X86/ |
D | intel-syntax.s | 417 div AX, BX 425 idiv AX, BX 457 xchg AX, CX 458 xchg CX, AX 470 xchg AX, [ECX] 471 xchg [ECX], AX 485 test AX, [ECX] 486 test [ECX], AX 496 fnstsw AX
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86InstrArithmetic.td | 57 // AL is really implied by AX, but the registers in Defs must match the 60 let Defs = [AL,EFLAGS,AX], Uses = [AL] in 67 // AX,DX = AX*GR16 68 let Defs = [AX,DX,EFLAGS], Uses = [AX], hasSideEffects = 0 in 85 let Defs = [AL,EFLAGS,AX], Uses = [AL] in 93 // AX,DX = AX*[mem16] 95 let Defs = [AX,DX,EFLAGS], Uses = [AX] in 111 let Defs = [AL,EFLAGS,AX], Uses = [AL] in 114 // AX,DX = AX*GR16 115 let Defs = [AX,DX,EFLAGS], Uses = [AX] in [all …]
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D | X86InstrExtension.td | 15 let Defs = [AX], Uses = [AL] in // AX = signext(AL) 18 let Defs = [EAX], Uses = [AX] in // EAX = signext(AX) 22 let Defs = [AX,DX], Uses = [AX] in // DX:AX = signext(AX)
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/external/llvm/lib/Target/X86/ |
D | X86InstrArithmetic.td | 57 // AL is really implied by AX, but the registers in Defs must match the 60 let Defs = [AL,EFLAGS,AX], Uses = [AL] in 67 // AX,DX = AX*GR16 68 let Defs = [AX,DX,EFLAGS], Uses = [AX], hasSideEffects = 0 in 85 let Defs = [AL,EFLAGS,AX], Uses = [AL] in 93 // AX,DX = AX*[mem16] 95 let Defs = [AX,DX,EFLAGS], Uses = [AX] in 112 let Defs = [AL,EFLAGS,AX], Uses = [AL] in 115 // AX,DX = AX*GR16 116 let Defs = [AX,DX,EFLAGS], Uses = [AX] in [all …]
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D | X86InstrExtension.td | 15 let Defs = [AX], Uses = [AL] in 17 "{cbtw|cbw}", [], IIC_CBW>, OpSize16; // AX = signext(AL) 18 let Defs = [EAX], Uses = [AX] in 20 "{cwtl|cwde}", [], IIC_CBW>, OpSize32; // EAX = signext(AX) 22 let Defs = [AX,DX], Uses = [AX] in 24 "{cwtd|cwd}", [], IIC_CBW>, OpSize16; // DX:AX = signext(AX)
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
D | crash-O0.ll | 9 ; aliased registers (AX and AL) - RegAllocFast does not like that. 34 ; CQO defines implicitly AX and DIV64 uses it implicitly too. 36 ; AX for the vreg defined in between and the compiler crashed.
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/external/libpcap/msdos/ |
D | pkt_rx1.s | 71 ; 1st time (AX=0) it requests an address where to put the packet 73 ; 2nd time (AX=1) the packet has been copied to this location (DS:SI) 93 cmp ax, 0 ; first call? (AX=0) 94 jne @post ; AX=1: second call, do post process
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/X86/ |
D | intel-syntax.s | 479 div AX, BX 487 idiv AX, BX 519 xchg AX, CX 520 xchg CX, AX 532 xchg AX, [ECX] 533 xchg [ECX], AX 547 test AX, [ECX] 548 test [ECX], AX 556 fnstsw AX
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