| /external/u-boot/drivers/net/phy/ |
| D | natsemi.c | 22 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); in dp83630_config()
58 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); in dp838xx_config()
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| D | marvell.c | 134 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); in m88e1011s_config()
142 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); in m88e1011s_config()
511 reg |= BMCR_RESET; in m88e1145_config()
612 reg |= BMCR_RESET; in m88e1680_config()
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| D | realtek.c | 118 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); in rtl8211x_config()
172 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET); in rtl8211f_config()
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| D | et1011c.c | 36 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl | BMCR_RESET); in et1011c_config()
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| D | phy.c | 846 if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) { in phy_reset()
860 while ((reg & BMCR_RESET) && timeout--) { in phy_reset()
870 if (reg & BMCR_RESET) { in phy_reset()
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| D | broadcom.c | 137 reg |= BMCR_RESET; in bcm5482_config()
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| D | mscc.c | 1125 phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, (reg_val | BMCR_RESET)); in mscc_phy_soft_reset()
1129 while ((reg_val & BMCR_RESET) && (timeout > 0)) { in mscc_phy_soft_reset()
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| /external/u-boot/drivers/qe/ |
| D | uec_phy.c | 263 ctrl |= BMCR_RESET; in genmii_setup_forced()
334 uec_phy_write(mii_info, MII_BMCR, BMCR_RESET); in marvell_config_aneg()
511 uec_phy_write(mii_info, MII_BMCR, BMCR_RESET); in uec_marvell_init()
584 BMCR_RESET); in dm9161_init()
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| /external/u-boot/board/egnite/ethernut5/ |
| D | ethernut5.c | 174 miiphy_write(devname, 0, MII_BMCR, BMCR_RESET); in board_eth_init()
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| /external/kernel-headers/original/uapi/linux/ |
| D | mii.h | 51 #define BMCR_RESET 0x8000 /* Reset to default state */ macro
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| D | mdio.h | 84 #define MDIO_CTRL1_RESET BMCR_RESET
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| /external/u-boot/include/linux/ |
| D | mii.h | 48 #define BMCR_RESET 0x8000 /* Reset to default state */ macro
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| D | mdio.h | 79 #define MDIO_CTRL1_RESET BMCR_RESET
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| /external/u-boot/drivers/net/ |
| D | ag7xxx.c | 907 BMCR_ANENABLE | BMCR_RESET); in ag933x_phy_setup_reset_set()
910 BMCR_ANENABLE | BMCR_RESET); in ag933x_phy_setup_reset_set()
926 } while (reg & BMCR_RESET); in ag933x_phy_setup_reset_fin()
933 } while (ret & BMCR_RESET); in ag933x_phy_setup_reset_fin()
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| D | ax88180.c | 116 ax88180_mdio_write (dev, MII_BMCR, (BMCR_RESET | BMCR_ANENABLE)); in ax88180_phy_reset()
119 while (ax88180_mdio_read (dev, MII_BMCR) & BMCR_RESET) { in ax88180_phy_reset()
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| D | smc911x.c | 87 smc911x_eth_phy_write(dev, 1, MII_BMCR, BMCR_RESET); in smc911x_phy_configure()
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| D | fec_mxc.c | 256 fec_mdio_write(eth, fec->phy_id, MII_BMCR, BMCR_RESET); in miiphy_restart_aneg()
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| /external/u-boot/common/ |
| D | miiphyutil.c | 363 if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) { in miiphy_reset()
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| /external/u-boot/drivers/usb/eth/ |
| D | asix.c | 405 asix_mdio_write(dev, dev->phy_id, MII_BMCR, BMCR_RESET); in asix_basic_reset()
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| D | smsc95xx.c | 348 smsc95xx_mdio_write(udev, dev->phy_id, MII_BMCR, BMCR_RESET); in smsc95xx_phy_initialize()
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