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Searched refs:BUS_ACLK_HZ (Results 1 – 8 of 8) sorted by relevance

/external/u-boot/drivers/clk/rockchip/
Dclk_rk322x.c120 aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1; in rkclk_init()
121 assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f); in rkclk_init()
123 pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
124 assert((pclk_div + 1) * BUS_PCLK_HZ == BUS_ACLK_HZ && pclk_div <= 0x7); in rkclk_init()
126 hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1; in rkclk_init()
127 assert((hclk_div + 1) * BUS_HCLK_HZ == BUS_ACLK_HZ && hclk_div <= 0x3); in rkclk_init()
Dclk_rk3128.c181 aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1; in rkclk_init()
182 assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f); in rkclk_init()
184 pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
185 assert((pclk_div + 1) * BUS_PCLK_HZ == BUS_ACLK_HZ && pclk_div <= 0x7); in rkclk_init()
187 hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1; in rkclk_init()
188 assert((hclk_div + 1) * BUS_HCLK_HZ == BUS_ACLK_HZ && hclk_div <= 0x3); in rkclk_init()
Dclk_rk3036.c119 aclk_div = GPLL_HZ / BUS_ACLK_HZ - 1; in rkclk_init()
120 assert((aclk_div + 1) * BUS_ACLK_HZ == GPLL_HZ && aclk_div <= 0x1f); in rkclk_init()
Dclk_rk3308.c993 rk3308_bus_set_clk(priv, ACLK_BUS, BUS_ACLK_HZ); in rk3308_clk_init()
/external/u-boot/arch/arm/include/asm/arch-rockchip/
Dcru_rk3036.h18 #define BUS_ACLK_HZ 148500000 macro
Dcru_rk322x.h19 #define BUS_ACLK_HZ 148500000 macro
Dcru_rk3128.h20 #define BUS_ACLK_HZ 148500000 macro
/external/u-boot/arch/arm/include/asm/arch-rk3308/
Dcru_rk3308.h18 #define BUS_ACLK_HZ 200000000 macro