| /external/swiftshader/third_party/llvm-7.0/llvm/unittests/IR/ |
| D | InstructionsTest.cpp | 729 auto CCI = const_cast<const SwitchInst *>(SI)->case_begin(); in TEST() local
731 ASSERT_NE(CCI, SI->case_end()); in TEST()
732 EXPECT_EQ(1, CCI->getCaseValue()->getSExtValue()); in TEST()
733 EXPECT_EQ(BB1.get(), CCI->getCaseSuccessor()); in TEST()
734 EXPECT_EQ(2, (CCI + 1)->getCaseValue()->getSExtValue()); in TEST()
735 EXPECT_EQ(BB2.get(), (CCI + 1)->getCaseSuccessor()); in TEST()
736 EXPECT_EQ(3, (CCI + 2)->getCaseValue()->getSExtValue()); in TEST()
737 EXPECT_EQ(BB3.get(), (CCI + 2)->getCaseSuccessor()); in TEST()
738 EXPECT_EQ(CCI + 1, std::next(CCI)); in TEST()
739 EXPECT_EQ(CCI + 2, std::next(CCI, 2)); in TEST()
[all …]
|
| /external/u-boot/board/freescale/ls1043aqds/ |
| D | ls1043aqds_pbi.cfg | 6 #Disable CCI barrier tranaction
|
| /external/u-boot/board/freescale/ls1043ardb/ |
| D | ls1043ardb_pbi.cfg | 6 #Disable CCI barrier tranaction
|
| /external/u-boot/board/freescale/ls1046aqds/ |
| D | ls1046aqds_pbi.cfg | 6 #Disable CCI barrier tranaction
|
| /external/u-boot/board/freescale/ls1046ardb/ |
| D | ls1046ardb_pbi.cfg | 4 #Disable CCI barrier tranaction
|
| D | ls1046ardb_qspi_pbi.cfg | 6 #Disable CCI barrier tranaction
|
| /external/clang/lib/AST/ |
| D | ASTTypeTraits.cpp | 140 if (const CXXCtorInitializer *CCI = get<CXXCtorInitializer>()) in getSourceRange() local
141 return CCI->getSourceRange(); in getSourceRange()
|
| /external/clang/lib/StaticAnalyzer/Core/ |
| D | CheckerManager.cpp | 62 CachedDeclCheckersMapTy::iterator CCI = CachedDeclCheckersMap.find(DeclKind); in runCheckersOnASTDecl() local
63 if (CCI != CachedDeclCheckersMap.end()) { in runCheckersOnASTDecl()
64 checkers = &(CCI->second); in runCheckersOnASTDecl()
766 CachedStmtCheckersMapTy::iterator CCI = CachedStmtCheckersMap.find(Key); in getCachedStmtCheckersFor() local
767 if (CCI != CachedStmtCheckersMap.end()) in getCachedStmtCheckersFor()
768 return CCI->second; in getCachedStmtCheckersFor()
|
| /external/clang/test/Index/ |
| D | complete-objc-message.m | 310 // RUN: c-index-test -code-completion-at=%s:134:6 %s | FileCheck -check-prefix=CHECK-CCI %s
311 // CHECK-CCI: ObjCInstanceMethodDecl:{ResultType void}{TypedText method1} (37)
312 // CHECK-CCI: ObjCInstanceMethodDecl:{ResultType void}{TypedText method2} (35)
330 // RUN: c-index-test -code-completion-at=%s:135:5 %s | FileCheck -check-prefix=CHECK-CCI %s
|
| /external/u-boot/arch/arm/cpu/armv8/fsl-layerscape/doc/ |
| D | README.soc | 66 - Cache coherent interconnect (CCI-400)
139 - ARM core-link CCI-400 cache coherent interconnect
349 - Cache Coherent interconnect (CCI-400)
|
| /external/u-boot/board/freescale/ls1021atwr/ |
| D | README | 35 - ARM Core-Link CCI-400 Cache Coherent Interconnect
|
| /external/u-boot/board/freescale/ls1021aqds/ |
| D | README | 35 - ARM Core-Link CCI-400 Cache Coherent Interconnect
|
| /external/arm-trusted-firmware/docs/about/ |
| D | features.rst | 21 Generic Interrupt Controller (GIC), Cache Coherent Interconnect (CCI),
|
| /external/arm-trusted-firmware/docs/perf/ |
| D | psci-performance-juno.rst | 212 on power on (for example, no need to enter CCI coherency)
|
| /external/arm-trusted-firmware/docs/ |
| D | change-log.rst | 1911 right interconnect driver, CCI or CCN, for the platform.
2110 both CCI-400 & CCI-500 IPs. Arm platforms ports have been migrated to this
2111 common driver. The standalone CCI-400 driver has been deprecated.
2389 - Refactored the CCI-400 driver to not have dependency on platform code.
|
| /external/arm-trusted-firmware/docs/process/ |
| D | coding-guidelines.rst | 568 Some drivers (for example, the Arm CCI driver in ``include/drivers/arm/cci.h``)
|
| /external/arm-trusted-firmware/docs/plat/arm/fvp/ |
| D | index.rst | 103 - ``FVP_CCI`` : The CCI driver is selected. This is the default
|
| /external/arm-trusted-firmware/docs/getting_started/ |
| D | porting-guide.rst | 1148 the CCI slave interface corresponding to the cluster that includes the
1694 CCI slave interface corresponding to the cluster that includes the primary
|
| /external/u-boot/ |
| D | README | 321 - ARM Platform Bus Type(CCI):
322 CoreLink Cache Coherent Interconnect (CCI) is ARM BUS which
|
| /external/arm-trusted-firmware/docs/design/ |
| D | firmware-design.rst | 1400 turning off CCI coherency during a cluster power down.
|
| /external/cpuinfo/test/dmesg/ |
| D | meizu-pro-6.log | 1597 [ 1.690143] (8)[1:swapper/0][xxxx1] CCI, vboot = 48, VBOOT = 48
|
| D | meizu-pro-6s.log | 1646 [ 1.930896] (8)[1:swapper/0][xxxx1] CCI, vboot = 48, VBOOT = 48
|
| D | huawei-p9-lite.log | 156 [ 0.000000s][pid:1,cpu0,swapper/0]Hisilicon CCI Extra driver probed
|
| /external/cldr/tools/java/org/unicode/cldr/util/data/ |
| D | ApproximateWidth.txt | 6162 2DAA..2DAE; 8; # ETHIOPIC SYLLABLE CCI..ETHIOPIC SYLLABLE CCO
|
| /external/cldr/tools/java/org/unicode/cldr/util/data/external/ |
| D | 2013-1_UNLOCODE_CodeListPart3.csv | 4031 ,"RO","CCI","Clinceni","Clinceni","B","--3-----","RL","0507",,"4422N 02557E",
9301 ,"UA","CCI","Chop-Chierna","Chop-Chierna",,"-2------","AI","9501",,,
11836 ,"US","CCI","Calhoun City","Calhoun City","MS","--3-----","RQ","9307",,,
|