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Searched refs:CONFIG_SYS_DDR_CONTROL (Results 1 – 25 of 31) sorted by relevance

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/external/u-boot/board/sbc8548/
Dddr.c124 out_be32(&ddr->sdram_cfg, CONFIG_SYS_DDR_CONTROL | 0x20000000); in fixed_sdram()
126 out_be32(&ddr->sdram_cfg, CONFIG_SYS_DDR_CONTROL); in fixed_sdram()
/external/u-boot/include/configs/
DBSC9132QDS.h164 #define CONFIG_SYS_DDR_CONTROL CONFIG_SYS_DDR_CONTROL_800 macro
170 #define CONFIG_SYS_DDR_CONTROL CONFIG_SYS_DDR_CONTROL_1333 macro
176 #define CONFIG_SYS_DDR_CONTROL CONFIG_SYS_DDR_CONTROL_800 macro
DUCP1020.h214 #define CONFIG_SYS_DDR_CONTROL 0xE70C0000 /* Type = DDR3 & ECC */ macro
216 #define CONFIG_SYS_DDR_CONTROL 0xC70C0000 /* Type = DDR3 */ macro
Dsbc8349.h71 #define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */ macro
DMPC8540ADS.h88 #define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */ macro
DMPC8349EMDS.h95 #define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */ macro
DMPC8349EMDS_SDRAM.h95 #define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */ macro
DBSC9131RDB.h93 #define CONFIG_SYS_DDR_CONTROL 0xC70C0000 /* Type = DDR3 */ macro
DMPC8560ADS.h87 #define CONFIG_SYS_DDR_CONTROL 0xc2000000 /* unbuffered,no DYN_PWR */ macro
Dsbc8548.h118 #define CONFIG_SYS_DDR_CONTROL 0xc300c000 macro
Dp1_twr.h93 #define CONFIG_SYS_DDR_CONTROL 0xc70c0000 /* Type = DDR3 */ macro
DMPC8610HPCD.h107 #define CONFIG_SYS_DDR_CONTROL 0xe3008000 /* Type = DDR2 */
DMPC8569MDS.h108 #define CONFIG_SYS_DDR_CONTROL 0xc7000000 /* Type = DDR3 */ macro
DP1022DS.h150 #define CONFIG_SYS_DDR_CONTROL 0xc7000008 macro
DMPC8572DS.h108 #define CONFIG_SYS_DDR_CONTROL 0xc3000008 /* Type = DDR2 */ macro
/external/u-boot/board/freescale/mpc8641hpcn/
Dmpc8641hpcn.c96 ddr->sdram_cfg = (CONFIG_SYS_DDR_CONTROL | 0x20000000); in fixed_sdram()
98 ddr->sdram_cfg = CONFIG_SYS_DDR_CONTROL; in fixed_sdram()
/external/u-boot/board/freescale/bsc9132qds/
Dddr.c26 .ddr_sdram_cfg = CONFIG_SYS_DDR_CONTROL,
53 .ddr_sdram_cfg = CONFIG_SYS_DDR_CONTROL,
/external/u-boot/board/freescale/p1010rdb/
Dddr.c29 .ddr_sdram_cfg = CONFIG_SYS_DDR_CONTROL,
56 .ddr_sdram_cfg = CONFIG_SYS_DDR_CONTROL,
/external/u-boot/board/freescale/p1_twr/
Dddr.c35 .ddr_sdram_cfg = CONFIG_SYS_DDR_CONTROL, in fixed_sdram()
/external/u-boot/board/freescale/bsc9131rdb/
Dspl_minimal.c50 __raw_writel(CONFIG_SYS_DDR_CONTROL & ~SDRAM_CFG_MEM_EN, &ddr->sdram_cfg); in sdram_init()
Dddr.c27 .ddr_sdram_cfg = CONFIG_SYS_DDR_CONTROL,
/external/u-boot/board/Arcturus/ucp1020/
Dddr.c95 .ddr_sdram_cfg = CONFIG_SYS_DDR_CONTROL, in fixed_sdram()
/external/u-boot/board/freescale/mpc8572ds/
Dmpc8572ds.c92 ddr->sdram_cfg = CONFIG_SYS_DDR_CONTROL; in fixed_sdram()
/external/u-boot/board/freescale/p1_p2_rdb_pc/
Dddr.c227 .ddr_sdram_cfg = CONFIG_SYS_DDR_CONTROL, in fixed_sdram()
/external/u-boot/board/freescale/mpc8536ds/
Dmpc8536ds.c119 ddr->sdram_cfg = CONFIG_SYS_DDR_CONTROL; in fixed_sdram()

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