Home
last modified time | relevance | path

Searched refs:DDR_TIMING_CFG_1 (Results 1 – 6 of 6) sorted by relevance

/external/u-boot/include/configs/
Dls1021atsn.h31 #define DDR_TIMING_CFG_1 0xbcb38c56 macro
Dls1021aiot.h32 #define DDR_TIMING_CFG_1 0xbcb38c56 macro
Dls1021atwr.h33 #define DDR_TIMING_CFG_1 0xbcb38c56 macro
/external/u-boot/board/freescale/ls1021aiot/
Dls1021aiot.c57 out_be32(&ddr->timing_cfg_1, DDR_TIMING_CFG_1); in ddrmc_init()
/external/u-boot/board/freescale/ls1021atsn/
Dls1021atsn.c35 out_be32(&ddr->timing_cfg_1, DDR_TIMING_CFG_1); in ddrmc_init()
/external/u-boot/board/freescale/ls1021atwr/
Dls1021atwr.c149 out_be32(&ddr->timing_cfg_1, DDR_TIMING_CFG_1); in ddrmc_init()