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Searched refs:MIDR_IMPL_MASK (Results 1 – 13 of 13) sorted by relevance

/external/arm-trusted-firmware/lib/cpus/aarch64/
Dcpuamu.c25 midr_mask = (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | in midr_match()
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/
Dplat_psci_handlers.c322 impl = (read_midr() >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK; in tegra_soc_pwr_domain_on_finish()
382 uint64_t impl = (read_midr() >> MIDR_IMPL_SHIFT) & (uint64_t)MIDR_IMPL_MASK; in tegra_soc_pwr_domain_off()
Dplat_sip_calls.c130 impl = ((uint32_t)x2 >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK; in plat_sip_handler()
Dplat_setup.c181 impl = (read_midr() >> MIDR_IMPL_SHIFT) & (uint64_t)MIDR_IMPL_MASK; in plat_early_platform_setup()
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/drivers/mce/
Dmce.c115 uint64_t impl = (read_midr() >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK; in mce_get_curr_cpu_ari_base()
136 MIDR_IMPL_MASK; in mce_get_curr_cpu_ops()
Dnvg.c207 uint64_t impl = (read_midr() >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK; in nvg_online_core()
Dari.c330 uint64_t impl = (read_midr() >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK; in ari_online_core()
/external/arm-trusted-firmware/include/lib/cpus/aarch32/
Dcpu_macros.S16 #define CPU_IMPL_PN_MASK (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | \
/external/arm-trusted-firmware/include/lib/cpus/aarch64/
Dcpu_macros.S13 #define CPU_IMPL_PN_MASK (MIDR_IMPL_MASK << MIDR_IMPL_SHIFT) | \
/external/arm-trusted-firmware/plat/nvidia/tegra/common/
Dtegra_bl31_setup.c273 (((read_midr() >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK) in bl31_early_platform_setup2()
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t194/
Dplat_psci_handlers.c462 uint64_t impl = (read_midr() >> MIDR_IMPL_SHIFT) & MIDR_IMPL_MASK; in tegra_soc_pwr_domain_off()
/external/arm-trusted-firmware/include/arch/aarch32/
Darch.h15 #define MIDR_IMPL_MASK U(0xff) macro
/external/arm-trusted-firmware/include/arch/aarch64/
Darch.h15 #define MIDR_IMPL_MASK U(0xff) macro