Searched refs:MPIDR_AFF0_SHIFT (Results 1 – 25 of 26) sorted by relevance
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| /external/arm-trusted-firmware/plat/arm/common/ |
| D | arm_topology.c | 31 pe_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in arm_check_mpidr()
36 cpu_id = (unsigned int) ((mpidr >> MPIDR_AFF0_SHIFT) & in arm_check_mpidr()
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| /external/arm-trusted-firmware/plat/intel/soc/common/ |
| D | socfpga_topology.c | 37 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/layerscape/common/ |
| D | ls_topology.c | 21 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in ls_check_mpidr()
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| /external/arm-trusted-firmware/plat/arm/board/a5ds/ |
| D | a5ds_topology.c | 39 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/rpi/common/ |
| D | rpi3_topology.c | 47 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/amlogic/common/ |
| D | aml_topology.c | 44 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/qemu/common/ |
| D | topology.c | 48 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/hisilicon/hikey960/ |
| D | hikey960_topology.c | 53 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/hisilicon/hikey/ |
| D | hikey_topology.c | 53 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/mediatek/mt8183/ |
| D | plat_topology.c | 46 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/mediatek/mt8173/ |
| D | plat_topology.c | 47 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/socionext/uniphier/ |
| D | uniphier_topology.c | 35 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/socionext/synquacer/ |
| D | sq_topology.c | 23 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/renesas/rcar/ |
| D | plat_topology.c | 34 cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/nvidia/tegra/common/ |
| D | tegra_topology.c | 28 cpu_id = (mpidr >> (u_register_t)MPIDR_AFF0_SHIFT) & in plat_core_pos_by_mpidr()
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| /external/arm-trusted-firmware/plat/arm/board/n1sdp/aarch64/ |
| D | n1sdp_helper.S | 41 ubfx x0, x4, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS
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| /external/arm-trusted-firmware/plat/arm/css/sgi/aarch64/ |
| D | sgi_helper.S | 41 ubfx x0, x3, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS
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| /external/arm-trusted-firmware/plat/arm/board/corstone700/ |
| D | corstone700_helpers.S | 89 ubfx r0, r3, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS
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| /external/arm-trusted-firmware/plat/arm/css/sgm/aarch64/ |
| D | css_sgm_helpers.S | 42 ubfx x0, x3, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS
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| /external/arm-trusted-firmware/plat/arm/board/a5ds/aarch32/ |
| D | a5ds_helpers.S | 115 ubfx r0, r3, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS
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| /external/arm-trusted-firmware/plat/arm/board/fvp/aarch32/ |
| D | fvp_helpers.S | 132 ubfx r0, r3, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS
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| /external/arm-trusted-firmware/plat/allwinner/common/ |
| D | sunxi_cpu_ops.c | 117 (core << MPIDR_AFF0_SHIFT) | in sunxi_disable_secondary_cpus()
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| /external/arm-trusted-firmware/plat/arm/board/fvp/aarch64/ |
| D | fvp_helpers.S | 167 ubfx x0, x3, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS
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| /external/arm-trusted-firmware/include/arch/aarch32/ |
| D | arch.h | 33 #define MPIDR_AFF0_SHIFT U(0) macro
44 (((mpidr) >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK)
57 (MPIDR_AFFLVL_MASK << MPIDR_AFF0_SHIFT))
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| /external/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/ |
| D | plat_setup.c | 255 cpu_id = (mpidr >> (u_register_t)MPIDR_AFF0_SHIFT) & (u_register_t)MPIDR_AFFLVL_MASK; in plat_core_pos_by_mpidr()
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