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Searched refs:MipsSubtarget (Results 1 – 25 of 95) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsSubtarget.cpp63 bool MipsSubtarget::DspWarningPrinted = false;
64 bool MipsSubtarget::MSAWarningPrinted = false;
65 bool MipsSubtarget::VirtWarningPrinted = false;
66 bool MipsSubtarget::CRCWarningPrinted = false;
67 bool MipsSubtarget::GINVWarningPrinted = false;
69 void MipsSubtarget::anchor() {} in anchor()
71 MipsSubtarget::MipsSubtarget(const Triple &TT, StringRef CPU, StringRef FS, in MipsSubtarget() function in MipsSubtarget
209 bool MipsSubtarget::isPositionIndependent() const { in isPositionIndependent()
214 bool MipsSubtarget::enablePostRAScheduler() const { return true; } in enablePostRAScheduler()
216 void MipsSubtarget::getCriticalPathRCs(RegClassVector &CriticalPathRCs) const { in getCriticalPathRCs()
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DMipsFrameLowering.h21 class MipsSubtarget; variable
25 const MipsSubtarget &STI;
28 explicit MipsFrameLowering(const MipsSubtarget &sti, unsigned Alignment) in MipsFrameLowering()
31 static const MipsFrameLowering *create(const MipsSubtarget &ST);
53 const MipsFrameLowering *createMips16FrameLowering(const MipsSubtarget &ST);
54 const MipsFrameLowering *createMipsSEFrameLowering(const MipsSubtarget &ST);
DMipsTargetMachine.h33 MipsSubtarget *Subtarget;
34 MipsSubtarget DefaultSubtarget;
35 MipsSubtarget NoMips16Subtarget;
36 MipsSubtarget Mips16Subtarget;
38 mutable StringMap<std::unique_ptr<MipsSubtarget>> SubtargetMap;
49 const MipsSubtarget *getSubtargetImpl() const { in getSubtargetImpl()
55 const MipsSubtarget *getSubtargetImpl(const Function &F) const override;
DMipsRegisterInfo.cpp50 MipsABIInfo ABI = MF.getSubtarget<MipsSubtarget>().getABI(); in getPointerRegClass()
95 const MipsSubtarget &Subtarget = MF->getSubtarget<MipsSubtarget>(); in getCalleeSavedRegs()
127 const MipsSubtarget &Subtarget = MF.getSubtarget<MipsSubtarget>(); in getCallPreservedMask()
161 const MipsSubtarget &Subtarget = MF.getSubtarget<MipsSubtarget>(); in getReservedRegs()
298 const MipsSubtarget &Subtarget = MF.getSubtarget<MipsSubtarget>(); in getFrameRegister()
321 const MipsSubtarget &Subtarget = MF.getSubtarget<MipsSubtarget>(); in canRealignStack()
DMipsInstrInfo.h38 class MipsSubtarget; variable
46 const MipsSubtarget &Subtarget;
59 explicit MipsInstrInfo(const MipsSubtarget &STI, unsigned UncondBrOpc);
61 static const MipsInstrInfo *create(MipsSubtarget &STI);
183 const MipsInstrInfo *createMips16InstrInfo(const MipsSubtarget &STI);
184 const MipsInstrInfo *createMipsSEInstrInfo(const MipsSubtarget &STI);
DMipsLegalizerInfo.h21 class MipsSubtarget; variable
26 MipsLegalizerInfo(const MipsSubtarget &ST);
DMips.h26 class MipsSubtarget; variable
43 MipsSubtarget &,
DMipsInstructionSelector.cpp31 MipsInstructionSelector(const MipsTargetMachine &TM, const MipsSubtarget &STI,
41 const MipsSubtarget &STI;
62 const MipsTargetMachine &TM, const MipsSubtarget &STI, in MipsInstructionSelector()
207 MipsSubtarget &Subtarget, in createMipsInstructionSelector()
DMipsSEFrameLowering.h20 class MipsSubtarget; variable
24 explicit MipsSEFrameLowering(const MipsSubtarget &STI);
DMipsTargetMachine.cpp159 const MipsSubtarget *
204 I = llvm::make_unique<MipsSubtarget>(TargetTriple, CPU, FS, isLittle, *this, in getSubtargetImpl()
213 Subtarget = const_cast<MipsSubtarget *>(getSubtargetImpl(MF->getFunction())); in resetSubtarget()
235 const MipsSubtarget &getMipsSubtarget() const { in getMipsSubtarget()
DMips16InstrInfo.h26 class MipsSubtarget; variable
32 explicit Mips16InstrInfo(const MipsSubtarget &STI);
DMipsSubtarget.h40 class MipsSubtarget : public MipsGenSubtargetInfo {
227 MipsSubtarget(const Triple &TT, StringRef CPU, StringRef FS, bool little,
347 MipsSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS,
/external/llvm/lib/Target/Mips/
DMipsSubtarget.cpp60 void MipsSubtarget::anchor() { } in anchor()
62 MipsSubtarget::MipsSubtarget(const Triple &TT, const std::string &CPU, in MipsSubtarget() function in MipsSubtarget
129 bool MipsSubtarget::isPositionIndependent() const { in isPositionIndependent()
134 bool MipsSubtarget::enablePostRAScheduler() const { return true; } in enablePostRAScheduler()
136 void MipsSubtarget::getCriticalPathRCs(RegClassVector &CriticalPathRCs) const { in getCriticalPathRCs()
142 CodeGenOpt::Level MipsSubtarget::getOptLevelToEnablePostRAScheduler() const { in getOptLevelToEnablePostRAScheduler()
146 MipsSubtarget &
147 MipsSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS, in initializeSubtargetDependencies()
162 bool MipsSubtarget::useConstantIslands() { in useConstantIslands()
167 Reloc::Model MipsSubtarget::getRelocationModel() const { in getRelocationModel()
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DMipsFrameLowering.h21 class MipsSubtarget; variable
25 const MipsSubtarget &STI;
28 explicit MipsFrameLowering(const MipsSubtarget &sti, unsigned Alignment) in MipsFrameLowering()
31 static const MipsFrameLowering *create(const MipsSubtarget &ST);
49 const MipsFrameLowering *createMips16FrameLowering(const MipsSubtarget &ST);
50 const MipsFrameLowering *createMipsSEFrameLowering(const MipsSubtarget &ST);
DMipsTargetMachine.h34 MipsSubtarget *Subtarget;
35 MipsSubtarget DefaultSubtarget;
36 MipsSubtarget NoMips16Subtarget;
37 MipsSubtarget Mips16Subtarget;
39 mutable StringMap<std::unique_ptr<MipsSubtarget>> SubtargetMap;
50 const MipsSubtarget *getSubtargetImpl() const { in getSubtargetImpl()
56 const MipsSubtarget *getSubtargetImpl(const Function &F) const override;
DMipsRegisterInfo.cpp52 MipsABIInfo ABI = MF.getSubtarget<MipsSubtarget>().getABI(); in getPointerRegClass()
98 const MipsSubtarget &Subtarget = MF->getSubtarget<MipsSubtarget>(); in getCalleeSavedRegs()
130 const MipsSubtarget &Subtarget = MF.getSubtarget<MipsSubtarget>(); in getCallPreservedMask()
164 const MipsSubtarget &Subtarget = MF.getSubtarget<MipsSubtarget>(); in getReservedRegs()
296 const MipsSubtarget &Subtarget = MF.getSubtarget<MipsSubtarget>(); in getFrameRegister()
319 const MipsSubtarget &Subtarget = MF.getSubtarget<MipsSubtarget>(); in canRealignStack()
DMipsInstrInfo.h31 class MipsSubtarget; variable
35 const MipsSubtarget &Subtarget;
48 explicit MipsInstrInfo(const MipsSubtarget &STI, unsigned UncondBrOpc);
50 static const MipsInstrInfo *create(MipsSubtarget &STI);
154 const MipsInstrInfo *createMips16InstrInfo(const MipsSubtarget &STI);
155 const MipsInstrInfo *createMipsSEInstrInfo(const MipsSubtarget &STI);
DMipsTargetMachine.cpp135 const MipsSubtarget *
171 I = llvm::make_unique<MipsSubtarget>(TargetTriple, CPU, FS, isLittle, in getSubtargetImpl()
180 Subtarget = const_cast<MipsSubtarget *>(getSubtargetImpl(*MF->getFunction())); in resetSubtarget()
202 const MipsSubtarget &getMipsSubtarget() const { in getMipsSubtarget()
DMipsSubtarget.h36 class MipsSubtarget : public MipsGenSubtargetInfo {
178 MipsSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS,
283 MipsSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS,
DMipsHazardSchedule.cpp104 const MipsSubtarget *STI = in runOnMachineFunction()
105 &static_cast<const MipsSubtarget &>(MF.getSubtarget()); in runOnMachineFunction()
DMipsMachineFunction.cpp38 MipsSubtarget const &STI = in getGlobalBaseReg()
39 static_cast<const MipsSubtarget &>(MF.getSubtarget()); in getGlobalBaseReg()
DMips16InstrInfo.h21 class MipsSubtarget; variable
26 explicit Mips16InstrInfo(const MipsSubtarget &STI);
DMipsISelLowering.h217 class MipsSubtarget; variable
224 const MipsSubtarget &STI);
227 const MipsSubtarget &STI);
397 const MipsSubtarget &Subtarget;
602 const MipsSubtarget &STI);
605 const MipsSubtarget &STI);
DMipsCCState.h19 class MipsSubtarget; variable
28 const MipsSubtarget &Subtarget);
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenCallingConv.inc117 if (!static_cast<const MipsSubtarget&>(State.getMachineFunction().getSubtarget()).isLittle()) {
144 if (static_cast<const MipsSubtarget&>(State.getMachineFunction().getSubtarget()).useSoftFloat()) {
273 if (!static_cast<const MipsSubtarget&>(State.getMachineFunction().getSubtarget()).isLittle()) {
373 if (!static_cast<const MipsSubtarget&>(State.getMachineFunction().getSubtarget()).isFP64bit()) {
378 if (static_cast<const MipsSubtarget&>(State.getMachineFunction().getSubtarget()).isFP64bit()) {
392 if (!static_cast<const MipsSubtarget&>(State.getMachineFunction().getSubtarget()).isFP64bit()) {
404 if (static_cast<const MipsSubtarget&>(State.getMachineFunction().getSubtarget()).isFP64bit()) {
405 … if (static_cast<const MipsSubtarget&>(State.getMachineFunction().getSubtarget()).useOddSPReg()) {
418 if (static_cast<const MipsSubtarget&>(State.getMachineFunction().getSubtarget()).isFP64bit()) {
419 … if (static_cast<const MipsSubtarget&>(State.getMachineFunction().getSubtarget()).noOddSPReg()) {
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