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/external/icu/android_icu4j/src/main/tests/android/icu/dev/test/bidi/
DTestBidiTransform.java17 import android.icu.text.BidiTransform.Order;
82 String outText = bidiTransform.transform(inText, inLevel, Order.LOGICAL, in autoDirectionTest()
83 outLevel, Order.VISUAL, Mirroring.OFF, 0); in autoDirectionTest()
111 { Bidi.LTR, Order.LOGICAL, Bidi.LTR, Order.LOGICAL, in allTransformOptionsTest()
116 { Bidi.LTR, Order.LOGICAL, Bidi.LTR, Order.VISUAL, in allTransformOptionsTest()
121 { Bidi.LTR, Order.LOGICAL, Bidi.RTL, Order.LOGICAL, in allTransformOptionsTest()
126 { Bidi.LTR, Order.LOGICAL, Bidi.RTL, Order.VISUAL, in allTransformOptionsTest()
132 { Bidi.RTL, Order.LOGICAL, Bidi.RTL, Order.LOGICAL, inText, in allTransformOptionsTest()
136 { Bidi.RTL, Order.LOGICAL, Bidi.RTL, Order.VISUAL, in allTransformOptionsTest()
141 { Bidi.RTL, Order.LOGICAL, Bidi.LTR, Order.LOGICAL, in allTransformOptionsTest()
[all …]
/external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/test/bidi/
DTestBidiTransform.java16 import com.ibm.icu.text.BidiTransform.Order;
79 String outText = bidiTransform.transform(inText, inLevel, Order.LOGICAL, in autoDirectionTest()
80 outLevel, Order.VISUAL, Mirroring.OFF, 0); in autoDirectionTest()
108 { Bidi.LTR, Order.LOGICAL, Bidi.LTR, Order.LOGICAL, in allTransformOptionsTest()
113 { Bidi.LTR, Order.LOGICAL, Bidi.LTR, Order.VISUAL, in allTransformOptionsTest()
118 { Bidi.LTR, Order.LOGICAL, Bidi.RTL, Order.LOGICAL, in allTransformOptionsTest()
123 { Bidi.LTR, Order.LOGICAL, Bidi.RTL, Order.VISUAL, in allTransformOptionsTest()
129 { Bidi.RTL, Order.LOGICAL, Bidi.RTL, Order.LOGICAL, inText, in allTransformOptionsTest()
133 { Bidi.RTL, Order.LOGICAL, Bidi.RTL, Order.VISUAL, in allTransformOptionsTest()
138 { Bidi.RTL, Order.LOGICAL, Bidi.LTR, Order.LOGICAL, in allTransformOptionsTest()
[all …]
/external/libcxx/benchmarks/
Dalgorithms.bench.cpp26 enum class Order { enum
34 struct AllOrders : EnumValuesAsTuple<AllOrders, Order, 6> {
40 void fillValues(std::vector<uint32_t>& V, size_t N, Order O) { in fillValues()
41 if (O == Order::SingleElement) { in fillValues()
49 void fillValues(std::vector<std::string>& V, size_t N, Order O) { in fillValues()
51 if (O == Order::SingleElement) { in fillValues()
60 void sortValues(T& V, Order O) { in sortValues()
63 case Order::Random: { in sortValues()
69 case Order::Ascending: in sortValues()
72 case Order::Descending: in sortValues()
[all …]
/external/icu/icu4j/main/classes/core/src/com/ibm/icu/text/
DBidiTransform.java56 public enum Order { enum in BidiTransform
222 byte inParaLevel, Order inOrder, in transform()
223 byte outParaLevel, Order outOrder, in transform()
280 private ReorderingScheme findMatchingScheme(byte inLevel, Order inOrder, in findMatchingScheme()
281 byte outLevel, Order outOrder) { in findMatchingScheme()
380 boolean matches(byte inLevel, Order inOrder, byte outLevel, Order outOrder) { in matches()
393 boolean matches(byte inLevel, Order inOrder, byte outLevel, Order outOrder) { in matches()
406 boolean matches(byte inLevel, Order inOrder, byte outLevel, Order outOrder) { in matches()
420 boolean matches(byte inLevel, Order inOrder, byte outLevel, Order outOrder) { in matches()
434 boolean matches(byte inLevel, Order inOrder, byte outLevel, Order outOrder) { in matches()
[all …]
/external/icu/android_icu4j/src/main/java/android/icu/text/
DBidiTransform.java57 public enum Order { enum in BidiTransform
212 byte inParaLevel, Order inOrder, in transform()
213 byte outParaLevel, Order outOrder, in transform()
270 private ReorderingScheme findMatchingScheme(byte inLevel, Order inOrder, in findMatchingScheme()
271 byte outLevel, Order outOrder) { in findMatchingScheme()
370 boolean matches(byte inLevel, Order inOrder, byte outLevel, Order outOrder) { in matches()
383 boolean matches(byte inLevel, Order inOrder, byte outLevel, Order outOrder) { in matches()
396 boolean matches(byte inLevel, Order inOrder, byte outLevel, Order outOrder) { in matches()
410 boolean matches(byte inLevel, Order inOrder, byte outLevel, Order outOrder) { in matches()
424 boolean matches(byte inLevel, Order inOrder, byte outLevel, Order outOrder) { in matches()
[all …]
/external/libopus/silk/float/
DcorrMatrix_FLP.c43 …const opus_int Order, /* I Max lag for correlatio… in silk_corrVector_FLP() argument
50 … ptr1 = &x[ Order - 1 ]; /* Points to first sample of column 0 of X: X[:,0] */ in silk_corrVector_FLP()
51 for( lag = 0; lag < Order; lag++ ) { in silk_corrVector_FLP()
62 …const opus_int Order, /* I Max lag for correlatio… in silk_corrMatrix_FLP() argument
70 ptr1 = &x[ Order - 1 ]; /* First sample of column 0 of X */ in silk_corrMatrix_FLP()
72 matrix_ptr( XX, 0, 0, Order ) = ( silk_float )energy; in silk_corrMatrix_FLP()
73 for( j = 1; j < Order; j++ ) { in silk_corrMatrix_FLP()
76 matrix_ptr( XX, j, j, Order ) = ( silk_float )energy; in silk_corrMatrix_FLP()
79 ptr2 = &x[ Order - 2 ]; /* First sample of column 1 of X */ in silk_corrMatrix_FLP()
80 for( lag = 1; lag < Order; lag++ ) { in silk_corrMatrix_FLP()
[all …]
/external/tensorflow/tensorflow/lite/experimental/ruy/
Dinternal_matrix.h120 Order order = Order::kColMajor;
136 Order order = Order::kColMajor;
252 if (layout.order == Order::kColMajor) { in IsPacked()
260 return layout.order == Order::kRowMajor; in IsRowMajor()
265 return layout.order == Order::kColMajor; in IsColMajor()
271 layout.order == Order::kColMajor ? layout.cols : layout.rows; in FlatSize()
284 int row_stride = layout.order == Order::kColMajor ? 1 : layout.stride; in Offset()
285 int col_stride = layout.order == Order::kRowMajor ? 1 : layout.stride; in Offset()
296 layout.order == Order::kColMajor ? layout.kernel.cols : layout.stride; in Offset()
298 layout.order == Order::kRowMajor ? layout.kernel.rows : layout.stride; in Offset()
[all …]
Dkernel_x86.h44 using LhsLayout = FixedKernelLayout<Order::kColMajor, 4, 8>;
45 using RhsLayout = FixedKernelLayout<Order::kColMajor, 4, 8>;
64 using LhsLayout = FixedKernelLayout<Order::kRowMajor, 1, 8>;
65 using RhsLayout = FixedKernelLayout<Order::kRowMajor, 1, 8>;
84 using LhsLayout = FixedKernelLayout<Order::kColMajor, 4, 16>;
85 using RhsLayout = FixedKernelLayout<Order::kColMajor, 4, 16>;
109 using LhsLayout = FixedKernelLayout<Order::kRowMajor, 1, 16>;
110 using RhsLayout = FixedKernelLayout<Order::kRowMajor, 1, 16>;
133 using LhsLayout = FixedKernelLayout<Order::kColMajor, 4, 8>;
134 using RhsLayout = FixedKernelLayout<Order::kColMajor, 4, 8>;
[all …]
Dexample.cc27 ruy::MakeSimpleLayout(2, 2, ruy::Order::kRowMajor, &lhs.layout); in ExampleMulFloat()
30 ruy::MakeSimpleLayout(2, 2, ruy::Order::kColMajor, &rhs.layout); in ExampleMulFloat()
33 ruy::MakeSimpleLayout(2, 2, ruy::Order::kColMajor, &dst.layout); in ExampleMulFloat()
52 ruy::MakeSimpleLayout(2, 2, ruy::Order::kRowMajor, &lhs.layout); in ExampleMulFloatWithBiasAddAndClamp()
55 ruy::MakeSimpleLayout(2, 2, ruy::Order::kColMajor, &rhs.layout); in ExampleMulFloatWithBiasAddAndClamp()
58 ruy::MakeSimpleLayout(2, 2, ruy::Order::kColMajor, &dst.layout); in ExampleMulFloatWithBiasAddAndClamp()
79 ruy::MakeSimpleLayout(2, 2, ruy::Order::kRowMajor, &lhs.layout); in ExampleMulUint8AsymmetricQuantized()
83 ruy::MakeSimpleLayout(2, 2, ruy::Order::kColMajor, &rhs.layout); in ExampleMulUint8AsymmetricQuantized()
87 ruy::MakeSimpleLayout(2, 2, ruy::Order::kColMajor, &dst.layout); in ExampleMulUint8AsymmetricQuantized()
110 ruy::MakeSimpleLayout(2, 2, ruy::Order::kRowMajor, &lhs.layout); in ExampleMulInt8PerChannelQuantized()
[all …]
Dmatrix.h29 enum class Order : std::uint8_t { kColMajor, kRowMajor }; enum
38 Order order = Order::kColMajor;
130 inline void MakeSimpleLayout(int rows, int cols, Order order, Layout* layout) { in MakeSimpleLayout()
134 layout->stride = order == Order::kColMajor ? rows : cols; in MakeSimpleLayout()
163 template <Order tOrder, int tRows, int tCols>
165 static constexpr Order kOrder = tOrder;
174 template <Order tOrder, int tRows, int tCols>
176 template <Order tOrder, int tRows, int tCols>
Dkernel_arm.h55 using LhsLayout = FixedKernelLayout<Order::kColMajor, 16, 4>;
56 using RhsLayout = FixedKernelLayout<Order::kColMajor, 16, 4>;
84 using LhsLayout = FixedKernelLayout<Order::kColMajor, 16, 4>;
85 using RhsLayout = FixedKernelLayout<Order::kColMajor, 16, 2>;
110 using LhsLayout = FixedKernelLayout<Order::kColMajor, 4, 8>;
111 using RhsLayout = FixedKernelLayout<Order::kColMajor, 4, 8>;
142 using LhsLayout = FixedKernelLayout<Order::kRowMajor, 1, 8>;
143 using RhsLayout = FixedKernelLayout<Order::kRowMajor, 1, 8>;
165 using LhsLayout = FixedKernelLayout<Order::kRowMajor, 1, 8>;
166 using RhsLayout = FixedKernelLayout<Order::kRowMajor, 1, 4>;
[all …]
Dtest.h363 inline void MakeLayout(int rows, int cols, Order order,
369 const int packed_stride = order == Order::kColMajor ? rows : cols;
403 void MakeRandom(int rows, int cols, Order order, Scalar zero_point,
521 Order lhs_order = Order::kRowMajor;
522 Order rhs_order = Order::kColMajor;
523 Order dst_order = Order::kColMajor;
646 ? Order::kColMajor
647 : Order::kRowMajor));
656 ? Order::kColMajor
657 : Order::kRowMajor));
[all …]
Dtest_special_specs.cc87 test_set.lhs_order = Order::kRowMajor; in TestZeroPointSupport()
88 test_set.rhs_order = Order::kColMajor; in TestZeroPointSupport()
89 test_set.dst_order = Order::kColMajor; in TestZeroPointSupport()
149 TestStandardCppKernelLayout<FixedKernelLayout<Order::kColMajor, 1, 1>, in TEST()
150 FixedKernelLayout<Order::kColMajor, 1, 1>>(); in TEST()
154 TestStandardCppKernelLayout<FixedKernelLayout<Order::kRowMajor, 4, 4>, in TEST()
155 FixedKernelLayout<Order::kRowMajor, 4, 4>>(); in TEST()
159 TestStandardCppKernelLayout<FixedKernelLayout<Order::kColMajor, 1, 4>, in TEST()
160 FixedKernelLayout<Order::kColMajor, 1, 8>>(); in TEST()
Dpack_x86.h116 struct PackImpl<Path::kSse42, FixedKernelLayout<Order::kColMajor, 4, 8>, Scalar,
121 using Layout = FixedKernelLayout<Order::kColMajor, 4, 8>;
165 struct PackImpl<Path::kSse42, FixedKernelLayout<Order::kRowMajor, 1, 8>, float,
167 using Layout = FixedKernelLayout<Order::kRowMajor, 1, 8>;
203 struct PackImpl<Path::kAvx2, FixedKernelLayout<Order::kColMajor, 4, 8>, Scalar,
208 using Layout = FixedKernelLayout<Order::kColMajor, 4, 8>;
248 struct PackImpl<Path::kAvx2, FixedKernelLayout<Order::kRowMajor, 1, 8>, float,
250 using Layout = FixedKernelLayout<Order::kRowMajor, 1, 8>;
286 struct PackImpl<Path::kAvx512, FixedKernelLayout<Order::kColMajor, 4, 16>,
291 using Layout = FixedKernelLayout<Order::kColMajor, 4, 16>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DSDNodeDbgValue.h51 unsigned Order; variable
60 : Var(Var), Expr(Expr), DL(std::move(dl)), Order(O), IsIndirect(indir) { in SDDbgValue()
69 : Var(Var), Expr(Expr), DL(std::move(dl)), Order(O), IsIndirect(false) { in SDDbgValue()
76 bool IsIndirect, DebugLoc DL, unsigned Order, in SDDbgValue() argument
78 : Var(Var), Expr(Expr), DL(DL), Order(Order), IsIndirect(IsIndirect) { in SDDbgValue()
120 unsigned getOrder() const { return Order; } in getOrder()
134 unsigned Order; variable
138 : Label(Label), DL(std::move(dl)), Order(O) {} in SDDbgLabel()
148 unsigned getOrder() const { return Order; } in getOrder()
/external/deqp/framework/referencerenderer/
DrrVertexAttrib.cpp59 template<typename SrcScalarType, typename DstScalarType, typename Order>
65 dst[Order::T0] = DstScalarType(aligned[0]); in readOrder()
66 if (size >= 2) dst[Order::T1] = DstScalarType(aligned[1]); in readOrder()
67 if (size >= 3) dst[Order::T2] = DstScalarType(aligned[2]); in readOrder()
68 if (size >= 4) dst[Order::T3] = DstScalarType(aligned[3]); in readOrder()
71 template<typename SrcScalarType, typename Order>
79 dst[Order::T0] = float(aligned[0]) / float(range); in readUnormOrder()
80 if (size >= 2) dst[Order::T1] = float(aligned[1]) / float(range); in readUnormOrder()
81 if (size >= 3) dst[Order::T2] = float(aligned[2]) / float(range); in readUnormOrder()
82 if (size >= 4) dst[Order::T3] = float(aligned[3]) / float(range); in readUnormOrder()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Support/
DDynamicLibrary.cpp77 void *LibLookup(const char *Symbol, DynamicLibrary::SearchOrdering Order) { in LibLookup() argument
78 if (Order & SO_LoadOrder) { in LibLookup()
92 void *Lookup(const char *Symbol, DynamicLibrary::SearchOrdering Order) { in Lookup() argument
93 assert(!((Order & SO_LoadedFirst) && (Order & SO_LoadedLast)) && in Lookup()
96 if (!Process || (Order & SO_LoadedFirst)) { in Lookup()
97 if (void *Ptr = LibLookup(Symbol, Order)) in Lookup()
106 if (Order & SO_LoadedLast) { in Lookup()
107 if (void *Ptr = LibLookup(Symbol, Order)) in Lookup()
/external/cblas/include/
Dcblas.h416 void cblas_sgemm(const enum CBLAS_ORDER Order, const enum CBLAS_TRANSPOSE TransA,
421 void cblas_ssymm(const enum CBLAS_ORDER Order, const enum CBLAS_SIDE Side,
426 void cblas_ssyrk(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo,
430 void cblas_ssyr2k(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo,
435 void cblas_strmm(const enum CBLAS_ORDER Order, const enum CBLAS_SIDE Side,
440 void cblas_strsm(const enum CBLAS_ORDER Order, const enum CBLAS_SIDE Side,
446 void cblas_dgemm(const enum CBLAS_ORDER Order, const enum CBLAS_TRANSPOSE TransA,
451 void cblas_dsymm(const enum CBLAS_ORDER Order, const enum CBLAS_SIDE Side,
456 void cblas_dsyrk(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo,
460 void cblas_dsyr2k(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo,
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DAllocationOrder.h32 ArrayRef<MCPhysReg> Order; variable
50 ArrayRef<MCPhysReg> getOrder() const { return Order; } in getOrder()
61 Limit = Order.size();
63 unsigned Reg = Order[Pos++];
80 return Order[Pos++]; in nextWithDups()
DRegAllocGreedy.cpp456 const AllocationOrder &Order);
459 const AllocationOrder &Order);
461 const AllocationOrder &Order,
472 unsigned getCheapestEvicteeWeight(const AllocationOrder &Order,
490 AllocationOrder &Order,
500 unsigned tryAssignCSRFirstTime(LiveInterval &VirtReg, AllocationOrder &Order,
760 AllocationOrder &Order, in tryAssign() argument
762 Order.rewind(); in tryAssign()
764 while ((PhysReg = Order.next())) in tryAssign()
767 if (!PhysReg || Order.isHint()) in tryAssign()
[all …]
/external/llvm/lib/CodeGen/
DAllocationOrder.cpp37 Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg)); in AllocationOrder()
38 TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM, Matrix); in AllocationOrder()
51 assert(std::find(Order.begin(), Order.end(), Hints[I]) != Order.end() && in AllocationOrder()
DAllocationOrder.h31 ArrayRef<MCPhysReg> Order; variable
45 ArrayRef<MCPhysReg> getOrder() const { return Order; } in getOrder()
54 Limit = Order.size();
56 unsigned Reg = Order[Pos++];
71 return Order[Pos++]; in nextWithDups()
/external/llvm/lib/CodeGen/SelectionDAG/
DSDNodeDbgValue.h50 unsigned Order; variable
59 : Var(Var), Expr(Expr), Offset(off), DL(std::move(dl)), Order(O), in SDDbgValue()
69 : Var(Var), Expr(Expr), Offset(off), DL(std::move(dl)), Order(O), in SDDbgValue()
78 : Var(Var), Expr(Expr), Offset(off), DL(std::move(dl)), Order(O), in SDDbgValue()
116 unsigned getOrder() const { return Order; } in getOrder()
/external/llvm/include/llvm/CodeGen/
DSelectionDAGNodes.h527 void setIROrder(unsigned Order) { IROrder = Order; }
817 SDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs)
820 NumOperands(0), NumValues(VTs.NumVTs), IROrder(Order),
849 SDLoc(const Instruction *I, int Order) : IROrder(Order) {
850 assert(Order >= 0 && "bad IROrder");
959 BinaryWithFlagsSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl,
961 : SDNode(Opc, Order, dl, VTs), Flags(NodeFlags) {}
999 AddrSpaceCastSDNode(unsigned Order, const DebugLoc &dl, EVT VT,
1021 MemSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTs,
1153 AtomicSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTL,
[all …]
/external/tensorflow/tensorflow/lite/kernels/
Dcpu_backend_gemm_params.h30 enum class Order { kColMajor, kRowMajor }; enum
42 Order order = Order::kColMajor;
233 TFLITE_DCHECK(lhs_params.order == Order::kRowMajor);
234 TFLITE_DCHECK(rhs_params.order == Order::kColMajor);
235 TFLITE_DCHECK(dst_params.order == Order::kColMajor);

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