/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUInstrInfo.cpp | 72 enum SIEncodingFamily { enum 88 static SIEncodingFamily subtargetEncodingFamily(const AMDGPUSubtarget &ST) { in subtargetEncodingFamily() 92 return SIEncodingFamily::SI; in subtargetEncodingFamily() 94 return SIEncodingFamily::VI; in subtargetEncodingFamily() 101 return SIEncodingFamily::SI; in subtargetEncodingFamily()
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D | SIInstrInfo.td | 87 // SIEncodingFamily enum in AMDGPUInstrInfo.cpp 88 def SIEncodingFamily { 699 def "" : EXPCommon, SIMCInstr <"exp", SIEncodingFamily.NONE> ; 702 def _si : EXPCommon, SIMCInstr <"exp", SIEncodingFamily.SI>, EXPe { 707 def _vi : EXPCommon, SIMCInstr <"exp", SIEncodingFamily.VI>, EXPe_vi { 719 SIMCInstr<opName, SIEncodingFamily.NONE> { 727 SIMCInstr<opName, SIEncodingFamily.SI> { 737 SIMCInstr<opName, SIEncodingFamily.VI> { 809 SIMCInstr<opName, SIEncodingFamily.NONE> { 824 SIMCInstr<opName, SIEncodingFamily.SI> { [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | VOP2Instructions.td | 610 VOP2_Real<!cast<VOP2_Pseudo>(NAME), SIEncodingFamily.SI>, 615 def _si : VOP2_Real<!cast<VOP2_Pseudo>(NAME), SIEncodingFamily.SI>, 621 VOP2_Real<!cast<VOP2_Pseudo>(NAME#"_e32"), SIEncodingFamily.SI>, 627 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.SI>, 633 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.SI>, 721 VOP2_Real<!cast<VOP2_Pseudo>(NAME), SIEncodingFamily.VI>, 726 def _vi : VOP2_Real<!cast<VOP2_Pseudo>(NAME), SIEncodingFamily.VI>, 732 VOP2_Real<!cast<VOP2_Pseudo>(NAME#"_e32"), SIEncodingFamily.VI>, 738 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.VI>, 744 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.VI>, [all …]
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D | VOP3Instructions.td | 558 def _si : VOP3_Real<!cast<VOP3_Pseudo>(NAME), SIEncodingFamily.SI>, 563 def _si : VOP3_Real<!cast<VOP3_Pseudo>(NAME), SIEncodingFamily.SI>, 627 def _ci : VOP3_Real<!cast<VOP3_Pseudo>(NAME), SIEncodingFamily.SI>, 635 def _ci : VOP3_Real<!cast<VOP3_Pseudo>(NAME), SIEncodingFamily.SI>, 654 def _vi : VOP3_Real<!cast<VOP3_Pseudo>(NAME), SIEncodingFamily.VI>, 659 def _vi : VOP3_Real<!cast<VOP3_Pseudo>(NAME), SIEncodingFamily.VI>, 664 def _vi : VOP3_Real<!cast<VOP3_Pseudo>(NAME), SIEncodingFamily.VI>, 669 def _vi : VOP3_Real<!cast<VOP3_Pseudo>(NAME), SIEncodingFamily.VI>, 678 def _vi : VOP3_Real<!cast<VOP3_Pseudo>(NAME), SIEncodingFamily.VI>, 683 def _vi : VOP3_Real<!cast<VOP3_Pseudo>(NAME), SIEncodingFamily.VI>, [all …]
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D | VOP1Instructions.td | 404 VOP1_Real<!cast<VOP1_Pseudo>(NAME#"_e32"), SIEncodingFamily.SI>, 407 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.SI>, 479 VOP1_Real<!cast<VOP1_Pseudo>(NAME#"_e32"), SIEncodingFamily.SI>, 482 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.SI>, 515 VOP1_Real<!cast<VOP1_Pseudo>(NAME), SIEncodingFamily.VI>, 523 VOP1_Real<!cast<VOP1_Pseudo>(NAME#"_e32"), SIEncodingFamily.VI>, 526 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.VI>,
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D | SIInstrInfo.td | 26 // SIEncodingFamily enum in AMDGPUInstrInfo.cpp 27 def SIEncodingFamily { 1051 SIMCInstr <"exp"#!if(done, "_done", ""), SIEncodingFamily.NONE>; 1056 SIMCInstr <"exp"#!if(done, "_done", ""), SIEncodingFamily.SI>, 1064 SIMCInstr <"exp"#!if(done, "_done", ""), SIEncodingFamily.VI>, 1854 SIMCInstr<opName, SIEncodingFamily.NONE> { 1863 SIMCInstr<opName, SIEncodingFamily.SI> { 1873 SIMCInstr<opName, SIEncodingFamily.VI> { 1950 let KeyCol = [!cast<string>(SIEncodingFamily.NONE)]; 1951 let ValueCols = [[!cast<string>(SIEncodingFamily.SI)], [all …]
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D | VOPInstructions.td | 45 SIMCInstr <opName#suffix, SIEncodingFamily.NONE>, 403 SIMCInstr <opName#"_sdwa", SIEncodingFamily.NONE>, 434 SIMCInstr <ps.PseudoInstr, SIEncodingFamily.SDWA> { 461 SIMCInstr <ps.PseudoInstr, SIEncodingFamily.SDWA9> {
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D | SMInstructions.td | 26 SIMCInstr<opName, SIEncodingFamily.NONE> { 464 , SIMCInstr<ps.PseudoInstr, SIEncodingFamily.SI> 517 , SIMCInstr<ps.PseudoInstr, SIEncodingFamily.VI> 744 , SIMCInstr<ps.PseudoInstr, SIEncodingFamily.SI>
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D | BUFInstructions.td | 77 SIMCInstr<opName, SIEncodingFamily.NONE> { 296 SIMCInstr<opName, SIEncodingFamily.NONE> { 1647 SIMCInstr<ps.PseudoInstr, SIEncodingFamily.SI> { 1774 SIMCInstr<ps.PseudoInstr, SIEncodingFamily.SI> { 1832 SIMCInstr<ps.PseudoInstr, SIEncodingFamily.VI> { 1882 SIMCInstr<ps.PseudoInstr, SIEncodingFamily.GFX80> { 2007 SIMCInstr<ps.PseudoInstr, SIEncodingFamily.VI> { 2037 SIMCInstr<ps.PseudoInstr, SIEncodingFamily.GFX80> {
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D | VOPCInstructions.td | 67 SIMCInstr<opName#"_e32", SIEncodingFamily.NONE> { 684 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.SI>, 688 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.SI>, 922 VOPC_Real<!cast<VOPC_Pseudo>(NAME#"_e32"), SIEncodingFamily.VI>, 926 VOP3_Real<!cast<VOP3_Pseudo>(NAME#"_e64"), SIEncodingFamily.VI>,
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D | SOPInstructions.td | 25 SIMCInstr<opName, SIEncodingFamily.NONE> { 517 SIMCInstr<opName, SIEncodingFamily.NONE> { 1078 SIMCInstr<opName, SIEncodingFamily.SI> { 1215 SIMCInstr<opName, SIEncodingFamily.VI> {
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D | MIMGInstructions.td | 263 SIMCInstr<NAME, SIEncodingFamily.SI>, 270 SIMCInstr<NAME, SIEncodingFamily.VI>,
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D | VOP3PInstructions.td | 198 def _vi : VOP3P_Real<!cast<VOP3_Pseudo>(NAME), SIEncodingFamily.VI>,
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D | SIInstrInfo.cpp | 5020 enum SIEncodingFamily { enum 5029 static SIEncodingFamily subtargetEncodingFamily(const GCNSubtarget &ST) { in subtargetEncodingFamily() 5035 return SIEncodingFamily::SI; in subtargetEncodingFamily() 5038 return SIEncodingFamily::VI; in subtargetEncodingFamily() 5044 SIEncodingFamily Gen = subtargetEncodingFamily(ST); in pseudoToMCOpcode() 5048 Gen = SIEncodingFamily::GFX9; in pseudoToMCOpcode() 5051 Gen = ST.getGeneration() == AMDGPUSubtarget::GFX9 ? SIEncodingFamily::SDWA9 in pseudoToMCOpcode() 5052 : SIEncodingFamily::SDWA; in pseudoToMCOpcode() 5057 Gen = SIEncodingFamily::GFX80; in pseudoToMCOpcode()
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D | FLATInstructions.td | 23 SIMCInstr<opName, SIEncodingFamily.NONE> { 885 SIMCInstr <ps.PseudoInstr, SIEncodingFamily.SI> { 953 SIMCInstr <ps.PseudoInstr, SIEncodingFamily.VI> {
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D | DSInstructions.td | 12 SIMCInstr <opName, SIEncodingFamily.NONE> { 828 SIMCInstr <ds.Mnemonic, SIEncodingFamily.SI> { 999 SIMCInstr <ds.Mnemonic, SIEncodingFamily.VI> {
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