Home
last modified time | relevance | path

Searched refs:SL (Results 1 – 25 of 586) sorted by relevance

12345678910>>...24

/external/swiftshader/third_party/llvm-7.0/llvm/unittests/DebugInfo/MSF/
DMSFCommonTest.cpp106 MSFStreamLayout SL = getFpmStreamLayout(L, false, false); in TEST() local
107 EXPECT_EQ(1000u, SL.Length); in TEST()
108 EXPECT_EQ(1u, SL.Blocks.size()); in TEST()
109 EXPECT_EQ(SB.FreeBlockMapBlock, SL.Blocks.front()); in TEST()
111 SL = getFpmStreamLayout(L, false, true); in TEST()
112 EXPECT_EQ(1000u, SL.Length); in TEST()
113 EXPECT_EQ(1u, SL.Blocks.size()); in TEST()
114 EXPECT_EQ(3u - SB.FreeBlockMapBlock, SL.Blocks.front()); in TEST()
118 SL = getFpmStreamLayout(L, false, false); in TEST()
119 EXPECT_EQ(SB.BlockSize + 1, SL.Length); in TEST()
[all …]
/external/cpuinfo/test/cpuid/
Dleagoo-t5c.log5 CPUID 00000004: 3C000121-00C0003F-0000003F-00000001 [SL 00]
6 CPUID 00000004: 3C000122-01C0003F-0000003F-00000001 [SL 01]
7 CPUID 00000004: 3C01C143-03C0003F-000003FF-00000001 [SL 02]
10 CPUID 00000007: 00000000-00002282-00000000-00000000 [SL 00]
14 CPUID 0000000B: 00000001-00000001-00000100-00000002 [SL 00]
15 CPUID 0000000B: 00000005-00000008-00000201-00000002 [SL 01]
23 CPUID 00000014: 00000000-00000000-00000000-00000000 [SL 00]
26 CPUID 00000017: 00000003-00000001-00000001-00000001 [SL 00]
27 CPUID 00000017: 756E6547-20656E69-65727053-72746461 [SL 01]
28 CPUID 00000017: 52286D75-72502029-7365636F-20726F73 [SL 02]
[all …]
Dmemo-pad-7.log5 CPUID 00000004: 1C000121-0140003F-0000003F-00000001 [SL 00]
6 CPUID 00000004: 1C000122-01C0003F-0000003F-00000001 [SL 01]
7 CPUID 00000004: 1C00C143-03C0003F-000003FF-00000001 [SL 02]
10 CPUID 00000007: 00000000-00002282-00000000-00000000 [SL 00]
14 CPUID 0000000B: 00000001-00000001-00000100-00000000 [SL 00]
15 CPUID 0000000B: 00000004-00000004-00000201-00000000 [SL 01]
Dzenfone-2.log5 CPUID 00000004: 1C000121-0140003F-0000003F-00000001 [SL 00]
6 CPUID 00000004: 1C000122-01C0003F-0000003F-00000001 [SL 01]
7 CPUID 00000004: 1C00C143-03C0003F-000003FF-00000001 [SL 02]
10 CPUID 00000007: 00000000-00002282-00000000-00000000 [SL 00]
14 CPUID 0000000B: 00000001-00000001-00000100-00000000 [SL 00]
15 CPUID 0000000B: 00000004-00000004-00000201-00000000 [SL 01]
Dalldocube-iwork8.log5 CPUID 00000004: 1C000121-0140003F-0000003F-00000001 [SL 00]
6 CPUID 00000004: 1C000122-01C0003F-0000003F-00000001 [SL 01]
7 CPUID 00000004: 1C00C143-03C0003F-000003FF-00000001 [SL 02]
10 CPUID 00000007: 00000000-00002282-00000000-00000000 [SL 00]
14 CPUID 0000000B: 00000001-00000001-00000100-00000000 [SL 00]
15 CPUID 0000000B: 00000004-00000004-00000201-00000000 [SL 01]
Dzenfone-c.log5 CPUID 00000004: 04004121-0140003F-0000003F-00000001 [SL 00]
6 CPUID 00000004: 04004122-01C0003F-0000003F-00000001 [SL 01]
7 CPUID 00000004: 04004143-01C0003F-000003FF-00000001 [SL 02]
10 CPUID 00000007: 00000000-00000000-00000000-00000000 [SL 00]
Dzenfone-2e.log5 CPUID 00000004: 04004121-0140003F-0000003F-00000001 [SL 00]
6 CPUID 00000004: 04004122-01C0003F-0000003F-00000001 [SL 01]
7 CPUID 00000004: 04004143-01C0003F-000003FF-00000001 [SL 02]
10 CPUID 00000007: 00000000-00000000-00000000-00000000 [SL 00]
/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp784 const StructLayout *SL = TD.getStructLayout(ST); in LowerConstantInitializer() local
790 SDValue Offset = DAG.getConstant(SL->getElementOffset(I), DL, PtrVT); in LowerConstantInitializer()
1029 SDLoc SL(Op); in split64BitValue() local
1031 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op); in split64BitValue()
1033 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32); in split64BitValue()
1034 const SDValue One = DAG.getConstant(1, SL, MVT::i32); in split64BitValue()
1036 SDValue Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, Zero); in split64BitValue()
1037 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, One); in split64BitValue()
1043 SDLoc SL(Op); in getLoHalf64() local
1045 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op); in getLoHalf64()
[all …]
DSIISelLowering.cpp549 const SDLoc &SL, SDValue Chain, in LowerParameterPtr() argument
558 SDValue BasePtr = DAG.getCopyFromReg(Chain, SL, in LowerParameterPtr()
560 return DAG.getNode(ISD::ADD, SL, PtrVT, BasePtr, in LowerParameterPtr()
561 DAG.getConstant(Offset, SL, PtrVT)); in LowerParameterPtr()
564 const SDLoc &SL, SDValue Chain, in LowerParameter() argument
579 SDValue Ptr = LowerParameterPtr(DAG, SL, Chain, Offset); in LowerParameter()
581 VT, SL, Chain, Ptr, PtrOffset, PtrInfo, MemVT, in LowerParameter()
1280 SDLoc SL(Op); in LowerFrameIndex() local
1311 return DAG.getNode(ISD::AssertZext, SL, MVT::i32, TFI, in LowerFrameIndex()
1443 SDLoc SL; in getSegmentAperture() local
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp1224 SDLoc SL(Op); in LowerCONCAT_VECTORS() local
1225 SDValue Lo = DAG.getNode(ISD::BITCAST, SL, MVT::i32, Op.getOperand(0)); in LowerCONCAT_VECTORS()
1226 SDValue Hi = DAG.getNode(ISD::BITCAST, SL, MVT::i32, Op.getOperand(1)); in LowerCONCAT_VECTORS()
1228 SDValue BV = DAG.getBuildVector(MVT::v2i32, SL, { Lo, Hi }); in LowerCONCAT_VECTORS()
1229 return DAG.getNode(ISD::BITCAST, SL, VT, BV); in LowerCONCAT_VECTORS()
1326 SDLoc SL(Op); in split64BitValue() local
1328 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op); in split64BitValue()
1330 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32); in split64BitValue()
1331 const SDValue One = DAG.getConstant(1, SL, MVT::i32); in split64BitValue()
1333 SDValue Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, Zero); in split64BitValue()
[all …]
DSIISelLowering.cpp1189 const SDLoc &SL, in lowerKernArgParameterPtr() argument
1204 SDValue BasePtr = DAG.getCopyFromReg(Chain, SL, in lowerKernArgParameterPtr()
1207 return DAG.getObjectPtrOffset(SL, BasePtr, Offset); in lowerKernArgParameterPtr()
1211 const SDLoc &SL) const { in getImplicitArgPtr()
1214 return lowerKernArgParameterPtr(DAG, SL, DAG.getEntryNode(), Offset); in getImplicitArgPtr()
1218 const SDLoc &SL, SDValue Val, in convertArgType() argument
1224 Val = DAG.getNode(Opc, SL, MemVT, Val, DAG.getValueType(VT)); in convertArgType()
1228 Val = getFPExtOrFPTrunc(DAG, Val, SL, VT); in convertArgType()
1230 Val = DAG.getSExtOrTrunc(Val, SL, VT); in convertArgType()
1232 Val = DAG.getZExtOrTrunc(Val, SL, VT); in convertArgType()
[all …]
DAMDGPUISelDAGToDAG.cpp769 SDLoc SL(N); in SelectFMA_W_CHAIN() local
783 SDLoc SL(N); in SelectFMUL_W_CHAIN() local
798 SDLoc SL(N); in SelectDIV_SCALE() local
813 SDLoc SL(N); in SelectMAD_64_32() local
817 SDValue Clamp = CurDAG->getTargetConstant(0, SL, MVT::i1); in SelectMAD_64_32()
1399 SDLoc SL(ByteOffsetNode); in SelectSMRDOffset() local
1405 Offset = CurDAG->getTargetConstant(EncodedOffset, SL, MVT::i32); in SelectSMRDOffset()
1415 Offset = CurDAG->getTargetConstant(EncodedOffset, SL, MVT::i32); in SelectSMRDOffset()
1417 SDValue C32Bit = CurDAG->getTargetConstant(ByteOffset, SL, MVT::i32); in SelectSMRDOffset()
1418 Offset = SDValue(CurDAG->getMachineNode(AMDGPU::S_MOV_B32, SL, MVT::i32, in SelectSMRDOffset()
[all …]
DSIISelLowering.h41 SDValue lowerKernArgParameterPtr(SelectionDAG &DAG, const SDLoc &SL,
43 SDValue getImplicitArgPtr(SelectionDAG &DAG, const SDLoc &SL) const;
45 const SDLoc &SL, SDValue Chain,
50 const SDLoc &SL, SDValue Chain,
97 SelectionDAG &DAG, EVT VT, EVT MemVT, const SDLoc &SL, SDValue Val,
124 SDValue splitBinaryBitConstantOp(DAGCombinerInfo &DCI, const SDLoc &SL,
135 SDValue performFPMed3ImmCombine(SelectionDAG &DAG, const SDLoc &SL,
137 SDValue performIntMed3ImmCombine(SelectionDAG &DAG, const SDLoc &SL,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/DebugInfo/MSF/
DMappedBlockStream.cpp64 MSFStreamLayout SL; in createIndexedStream() local
65 SL.Blocks = Layout.StreamMap[StreamIndex]; in createIndexedStream()
66 SL.Length = Layout.StreamSizes[StreamIndex]; in createIndexedStream()
68 Layout.SB->BlockSize, SL, MsfData, Allocator); in createIndexedStream()
75 MSFStreamLayout SL; in createDirectoryStream() local
76 SL.Blocks = Layout.DirectoryBlocks; in createDirectoryStream()
77 SL.Length = Layout.SB->NumDirectoryBytes; in createDirectoryStream()
78 return createStream(Layout.SB->BlockSize, SL, MsfData, Allocator); in createDirectoryStream()
85 MSFStreamLayout SL(getFpmStreamLayout(Layout)); in createFpmStream() local
86 return createStream(Layout.SB->BlockSize, SL, MsfData, Allocator); in createFpmStream()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonGenExtract.cpp165 uint32_t SL = CSL->getZExtValue(); in INITIALIZE_PASS_DEPENDENCY() local
171 if (!LogicalSR && (SR > SL)) in INITIALIZE_PASS_DEPENDENCY()
173 APInt A = APInt(BW, ~0ULL).lshr(SR).shl(SL); in INITIALIZE_PASS_DEPENDENCY()
179 APInt M = CM->getValue().lshr(SL); in INITIALIZE_PASS_DEPENDENCY()
184 uint32_t U = BW - std::max(SL, SR); in INITIALIZE_PASS_DEPENDENCY()
216 if (SL != 0) in INITIALIZE_PASS_DEPENDENCY()
217 NewIn = IRB.CreateShl(NewIn, SL, CSL->getName()); in INITIALIZE_PASS_DEPENDENCY()
/external/llvm/lib/Target/Hexagon/
DHexagonGenExtract.cpp153 uint32_t SL = CSL->getZExtValue(); in INITIALIZE_PASS_DEPENDENCY() local
159 if (!LogicalSR && (SR > SL)) in INITIALIZE_PASS_DEPENDENCY()
161 APInt A = APInt(BW, ~0ULL).lshr(SR).shl(SL); in INITIALIZE_PASS_DEPENDENCY()
167 APInt M = CM->getValue().lshr(SL); in INITIALIZE_PASS_DEPENDENCY()
172 uint32_t U = BW - std::max(SL, SR); in INITIALIZE_PASS_DEPENDENCY()
204 if (SL != 0) in INITIALIZE_PASS_DEPENDENCY()
205 NewIn = IRB.CreateShl(NewIn, SL, CSL->getName()); in INITIALIZE_PASS_DEPENDENCY()
/external/llvm/lib/Transforms/Scalar/
DLoopIdiomRecognize.cpp111 bool processLoopStores(SmallVectorImpl<StoreInst *> &SL, const SCEV *BECount,
476 for (auto &SL : StoreRefsForMemset) in runOnLoopBlock() local
477 MadeChange |= processLoopStores(SL.second, BECount, true); in runOnLoopBlock()
479 for (auto &SL : StoreRefsForMemsetPattern) in runOnLoopBlock() local
480 MadeChange |= processLoopStores(SL.second, BECount, false); in runOnLoopBlock()
507 bool LoopIdiomRecognize::processLoopStores(SmallVectorImpl<StoreInst *> &SL, in processLoopStores() argument
517 for (unsigned i = 0, e = SL.size(); i < e; ++i) { in processLoopStores()
518 assert(SL[i]->isSimple() && "Expected only non-volatile stores."); in processLoopStores()
520 Value *FirstStoredVal = SL[i]->getValueOperand(); in processLoopStores()
521 Value *FirstStorePtr = SL[i]->getPointerOperand(); in processLoopStores()
[all …]
/external/clang/lib/StaticAnalyzer/Checkers/
DUnreachableCodeChecker.cpp148 SourceLocation SL; in checkEndAnalysis() local
152 SL = DL.asLocation(); in checkEndAnalysis()
153 if (SR.isInvalid() || !SL.isValid()) in checkEndAnalysis()
161 if (SM.isInSystemHeader(SL) || SM.isInExternCSystemHeader(SL)) in checkEndAnalysis()
/external/clang/tools/libclang/
DCIndexInclusionStack.cpp36 const SrcMgr::SLocEntry &SL = (SM.*Getter)(i, &Invalid); in getInclusions() local
38 if (!SL.isFile() || Invalid) in getInclusions()
41 const SrcMgr::FileInfo &FI = SL.getFile(); in getInclusions()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/IPO/
DGlobalSplit.cpp72 const StructLayout *SL = DL.getStructLayout(Init->getType()); in splitGlobal() local
85 unsigned SplitBegin = SL->getElementOffset(I); in splitGlobal()
87 ? SL->getSizeInBytes() in splitGlobal()
88 : SL->getElementOffset(I + 1); in splitGlobal()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/
DLoopIdiomRecognize.cpp166 bool processLoopStores(SmallVectorImpl<StoreInst *> &SL, const SCEV *BECount,
545 for (auto &SL : StoreRefsForMemset) in runOnLoopBlock() local
546 MadeChange |= processLoopStores(SL.second, BECount, true); in runOnLoopBlock()
548 for (auto &SL : StoreRefsForMemsetPattern) in runOnLoopBlock() local
549 MadeChange |= processLoopStores(SL.second, BECount, false); in runOnLoopBlock()
576 bool LoopIdiomRecognize::processLoopStores(SmallVectorImpl<StoreInst *> &SL, in processLoopStores() argument
586 for (unsigned i = 0, e = SL.size(); i < e; ++i) { in processLoopStores()
587 assert(SL[i]->isSimple() && "Expected only non-volatile stores."); in processLoopStores()
589 Value *FirstStoredVal = SL[i]->getValueOperand(); in processLoopStores()
590 Value *FirstStorePtr = SL[i]->getPointerOperand(); in processLoopStores()
[all …]
/external/icu/icu4c/source/test/intltest/
Ditspoof.cpp160 const uint32_t SL = USPOOF_SINGLE_SCRIPT_CONFUSABLE; in testSkeleton() local
165 CHECK_SKELETON(SL, "nochange", "nochange"); in testSkeleton()
175 CHECK_SKELETON(SL, "\\u059c", "\\u0301"); in testSkeleton()
176 CHECK_SKELETON(SL, "\\u2A74", "\\u003A\\u003A\\u003D"); in testSkeleton()
177 CHECK_SKELETON(SL, "\\u247E", "\\u0028\\u006C\\u006C\\u0029"); // "(ll)" in testSkeleton()
178 CHECK_SKELETON(SL, "\\uFDFB", "\\u062C\\u0644\\u0020\\u062C\\u0644\\u006c\\u0644\\u006f"); in testSkeleton()
185 CHECK_SKELETON(SL, "\\u0C83", "\\u0983"); in testSkeleton()
194 CHECK_SKELETON(SL, "\\u0391", "A"); in testSkeleton()
199 CHECK_SKELETON(SL, "\\u13CF", "b"); in testSkeleton()
204 CHECK_SKELETON(SL, "\\u0022", "\\u0027\\u0027"); in testSkeleton()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/IR/
DOperator.cpp52 const StructLayout *SL = DL.getStructLayout(STy); in accumulateConstantOffset() local
53 Offset += APInt(Offset.getBitWidth(), SL->getElementOffset(ElementIdx)); in accumulateConstantOffset()
/external/llvm/lib/IR/
DOperator.cpp38 const StructLayout *SL = DL.getStructLayout(STy); in accumulateConstantOffset() local
39 Offset += APInt(Offset.getBitWidth(), SL->getElementOffset(ElementIdx)); in accumulateConstantOffset()
/external/harfbuzz_ng/src/
Dhb-ot-shape-complex-thai.cc92 SL, /* Shift combining-mark left */ enumerator
149 case SL: pua_mappings = SL_mappings; break; in thai_pua_shape()
188 /*T1*/ {{SL, T2}, {NOP,T1}, {SDL,T2}},
189 /*T2*/ {{NOP,T3}, {NOP,T2}, {SL, T3}},

12345678910>>...24