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Searched refs:Succs (Results 1 – 25 of 78) sorted by relevance

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/external/llvm/lib/Analysis/
DSparsePropagation.cpp122 SmallVectorImpl<bool> &Succs, in getFeasibleSuccessors() argument
124 Succs.resize(TI.getNumSuccessors()); in getFeasibleSuccessors()
129 Succs[0] = true; in getFeasibleSuccessors()
142 Succs[0] = Succs[1] = true; in getFeasibleSuccessors()
153 Succs[0] = Succs[1] = true; in getFeasibleSuccessors()
158 Succs[C->isNullValue()] = true; in getFeasibleSuccessors()
165 Succs[0] = Succs[1] = true; in getFeasibleSuccessors()
170 Succs.assign(Succs.size(), true); in getFeasibleSuccessors()
184 Succs.assign(TI.getNumSuccessors(), true); in getFeasibleSuccessors()
195 Succs.assign(TI.getNumSuccessors(), true); in getFeasibleSuccessors()
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/external/llvm/lib/CodeGen/
DScheduleDAG.cpp80 for (SmallVectorImpl<SDep>::iterator II = PredSU->Succs.begin(), in addPred()
81 EE = PredSU->Succs.end(); II != EE; ++II) { in addPred()
122 N->Succs.push_back(P); in addPred()
142 SmallVectorImpl<SDep>::iterator Succ = std::find(N->Succs.begin(), in removePred()
143 N->Succs.end(), P); in removePred()
144 assert(Succ != N->Succs.end() && "Mismatching preds / succs lists!"); in removePred()
145 N->Succs.erase(Succ); in removePred()
185 for (SUnit::const_succ_iterator I = SU->Succs.begin(), in setDepthDirty()
186 E = SU->Succs.end(); I != E; ++I) { in setDepthDirty()
275 for (SUnit::const_succ_iterator I = Cur->Succs.begin(), in ComputeHeight()
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DLatencyPriorityQueue.cpp77 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in push()
93 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in scheduledNode()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Analysis/
DSparsePropagation.h192 void getFeasibleSuccessors(TerminatorInst &TI, SmallVectorImpl<bool> &Succs,
289 TerminatorInst &TI, SmallVectorImpl<bool> &Succs, bool AggressiveUndef) { in getFeasibleSuccessors() argument
290 Succs.resize(TI.getNumSuccessors()); in getFeasibleSuccessors()
296 Succs[0] = true; in getFeasibleSuccessors()
311 Succs[0] = Succs[1] = true; in getFeasibleSuccessors()
324 Succs[0] = Succs[1] = true; in getFeasibleSuccessors()
329 Succs[C->isNullValue()] = true; in getFeasibleSuccessors()
334 Succs.assign(Succs.size(), true); in getFeasibleSuccessors()
339 Succs.assign(Succs.size(), true); in getFeasibleSuccessors()
354 Succs.assign(TI.getNumSuccessors(), true); in getFeasibleSuccessors()
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/external/clang/test/Analysis/
Dblocks.mm16 // CHECK-NEXT: Succs (1): B1
22 // CHECK-NEXT: Succs (1): B0
40 // CHECK-NEXT: Succs (1): B1
48 // CHECK-NEXT: Succs (1): B0
63 // CHECK-NEXT: Succs (1): B1
72 // CHECK-NEXT: Succs (1): B0
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DScheduleDAG.cpp121 for (SDep &SuccDep : PredSU->Succs) { in addPred()
166 N->Succs.push_back(P); in addPred()
183 SmallVectorImpl<SDep>::iterator Succ = llvm::find(N->Succs, P); in removePred()
184 assert(Succ != N->Succs.end() && "Mismatching preds / succs lists!"); in removePred()
185 N->Succs.erase(Succ); in removePred()
223 for (SDep &SuccDep : SU->Succs) { in setDepthDirty()
302 for (const SDep &SuccDep : Cur->Succs) { in ComputeHeight()
386 if (Succs.size() != 0) { in dumpAll()
388 for (const SDep &Dep : Succs) { in dumpAll()
485 unsigned Degree = SU.Succs.size(); in InitDAGTopologicalSorting()
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DLatencyPriorityQueue.cpp78 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in push()
94 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in scheduledNode()
DMacroFusion.cpp44 for (SDep &SI : FirstSU.Succs) in fuseInstructionPair()
61 for (SDep &SI : FirstSU.Succs) in fuseInstructionPair()
78 for (const SDep &SI : FirstSU.Succs) { in fuseInstructionPair()
104 if (SU.Succs.empty()) in fuseInstructionPair()
/external/clang/include/clang/StaticAnalyzer/Core/PathSensitive/
DExplodedGraph.h122 NodeGroup Succs; variable
127 : Location(loc), State(std::move(state)), Succs(IsSink) { in ExplodedNode()
178 unsigned succ_size() const { return Succs.size(); } in succ_size()
180 bool succ_empty() const { return Succs.empty(); } in succ_empty()
183 bool isSink() const { return Succs.getFlag(); } in isSink()
217 succ_iterator succ_begin() { return Succs.begin(); } in succ_begin()
218 succ_iterator succ_end() { return Succs.end(); } in succ_end()
240 void replaceSuccessor(ExplodedNode *node) { Succs.replaceNode(node); } in replaceSuccessor()
/external/llvm/lib/CodeGen/SelectionDAG/
DResourcePriorityQueue.cpp110 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in numberRCValSuccInSU()
147 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in numberCtrlDepsInSU()
235 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in push()
274 for (SUnit::const_succ_iterator I = Packet[i]->Succs.begin(), in isResourceAvailable()
275 E = Packet[i]->Succs.end(); I != E; ++I) { in isResourceAvailable()
525 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in scheduledNode()
543 HorizontalVerticalBalance += (SU->Succs.size() - numberCtrlDepsInSU(SU)); in scheduledNode()
DScheduleDAGFast.cpp194 for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in ScheduleNodeBottomUp()
295 for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in CopyAndMoveSuccessors()
365 for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in CopyAndMoveSuccessors()
402 for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in InsertCopiesAndMoveSuccs()
541 assert(RootSU->Succs.empty() && "Graph root shouldn't have successors!"); in ListScheduleBottomUp()
/external/llvm/lib/Target/Hexagon/
DHexagonMachineScheduler.cpp66 if (Packet[i]->Succs.size() == 0) in isResourceAvailable()
68 for (SUnit::const_succ_iterator I = Packet[i]->Succs.begin(), in isResourceAvailable()
69 E = Packet[i]->Succs.end(); I != E; ++I) { in isResourceAvailable()
251 for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in releaseBottomNode()
451 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in getSingleUnscheduledSucc()
512 for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in SchedulingCost()
DHexagonVLIWPacketizer.cpp812 for (unsigned i = 0; i < PacketSU->Succs.size(); ++i) { in restrictingDepExistInPacket()
813 auto &Dep = PacketSU->Succs[i]; in restrictingDepExistInPacket()
877 for (unsigned i = 0; i < PacketSU->Succs.size(); ++i) { in arePredicatesComplements()
878 auto Dep = PacketSU->Succs[i]; in arePredicatesComplements()
1215 for (unsigned i = 0; i < SUJ->Succs.size(); ++i) { in isLegalToPacketizeTogether()
1219 if (SUJ->Succs[i].getSUnit() != SUI) in isLegalToPacketizeTogether()
1222 SDep::Kind DepType = SUJ->Succs[i].getKind(); in isLegalToPacketizeTogether()
1247 DepReg = SUJ->Succs[i].getReg(); in isLegalToPacketizeTogether()
1254 if (!isCallDependent(I, DepType, SUJ->Succs[i].getReg())) in isLegalToPacketizeTogether()
1334 unsigned DepReg = SUJ->Succs[i].getReg(); in isLegalToPacketizeTogether()
/external/clang/include/clang/Analysis/
DCFG.h474 AdjacentBlocks Succs; variable
493 BlockID(blockid), Preds(C, 1), Succs(C, 1), HasNoReturnElement(false), in CFGBlock()
541 succ_iterator succ_begin() { return Succs.begin(); } in succ_begin()
542 succ_iterator succ_end() { return Succs.end(); } in succ_end()
543 const_succ_iterator succ_begin() const { return Succs.begin(); } in succ_begin()
544 const_succ_iterator succ_end() const { return Succs.end(); } in succ_end()
546 succ_reverse_iterator succ_rbegin() { return Succs.rbegin(); } in succ_rbegin()
547 succ_reverse_iterator succ_rend() { return Succs.rend(); } in succ_rend()
548 const_succ_reverse_iterator succ_rbegin() const { return Succs.rbegin(); } in succ_rbegin()
549 const_succ_reverse_iterator succ_rend() const { return Succs.rend(); } in succ_rend()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonMachineScheduler.cpp71 if (SUd->Succs.size() == 0) in hasDependence()
81 for (const auto &S : SUd->Succs) { in hasDependence()
310 for (SUnit::succ_iterator I = SU->Succs.begin(), E = SU->Succs.end(); in releaseBottomNode()
540 for (auto &Succ : SU->Succs) { in isSingleUnscheduledSucc()
646 for (const SDep &SI : SU->Succs) in SchedulingCost()
715 for (const SDep &SI : SU->Succs) { in SchedulingCost()
740 for (const auto &SI : SU->Succs) { in SchedulingCost()
836 CurrSize = (*I)->Succs.size(); in pickNodeFromQueue()
837 CandSize = Candidate.SU->Succs.size(); in pickNodeFromQueue()
DHexagonSubtarget.cpp153 for (SDep &SI : SU.Succs) { in apply()
349 MachineInstr *DDst = Dst->Succs[0].getSUnit()->getInstr(); in adjustSchedDependency()
421 for (auto &I : Src->Succs) { in restoreLatency()
460 for (auto &I : Src->Succs) { in changeLatency()
507 if (getZeroLatency(Dst, Dst->Succs) != nullptr) in isBestZeroLatency()
516 DstBest = getZeroLatency(Src, Src->Succs); in isBestZeroLatency()
563 for (auto &I : SrcBest->Succs) in isBestZeroLatency()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Vectorize/
DVPlan.cpp350 std::vector<BasicBlock *> Succs(succ_begin(BB), succ_end(BB)); in updateDominatorTree() local
351 assert(Succs.size() <= 2 && in updateDominatorTree()
353 PostDomSucc = Succs[0]; in updateDominatorTree()
354 if (Succs.size() == 1) { in updateDominatorTree()
360 BasicBlock *InterimSucc = Succs[1]; in updateDominatorTree()
362 PostDomSucc = Succs[1]; in updateDominatorTree()
363 InterimSucc = Succs[0]; in updateDominatorTree()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/
DWebAssemblyFixIrreducibleControlFlow.cpp88 SmallVector<MachineBasicBlock *, 2> Succs; member in __anon1ff66ce00211::MetaBlock
93 Succs(MBB->succ_begin(), MBB->succ_end()) {} in MetaBlock()
96 Loop->getExitBlocks(Succs); in MetaBlock()
108 return Succs; in successors()
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyFixIrreducibleControlFlow.cpp85 SmallVector<MachineBasicBlock *, 2> Succs; member in __anon9110bc480211::MetaBlock
90 Succs(MBB->succ_begin(), MBB->succ_end()) {} in MetaBlock()
93 Loop->getExitBlocks(Succs); in MetaBlock()
105 return Succs; in successors()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DResourcePriorityQueue.cpp107 for (const SDep &Succ : SU->Succs) { in numberRCValSuccInSU()
143 for (const SDep &Succ : SU->Succs) in numberCtrlDepsInSU()
228 for (const SDep &Succ : SU->Succs) in push()
267 for (const SDep &Succ : Packet[i]->Succs) { in isResourceAvailable()
511 for (const SDep &Succ : SU->Succs) { in scheduledNode()
528 HorizontalVerticalBalance += (SU->Succs.size() - numberCtrlDepsInSU(SU)); in scheduledNode()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DGCNMinRegStrategy.cpp95 for (auto SDep : SU->Succs) { in getReadySuccessors()
111 return SU->Succs.size() - getReadySuccessors(SU); in getNotReadySuccessors()
186 for (const auto &S : SchedSU->Succs) { in bumpPredsPriority()
222 for (const auto &S : SU->Succs) { in releaseSuccessors()
DSIMachineScheduler.cpp444 for (SDep& Succ : SU->Succs) { in undoSchedule()
485 for (SDep& Succ : SU->Succs) { in releaseSuccessors()
517 for (SDep& Succ : SU->Succs) { in nodeScheduled()
548 assert(none_of(Succs, in addPred()
561 for (std::pair<SIScheduleBlock*, SIScheduleBlockLinkKind> &S : Succs) { in addSucc()
571 Succs.push_back(std::make_pair(Succ, Kind)); in addSucc()
592 for (std::pair<SIScheduleBlock*, SIScheduleBlockLinkKind> S : Succs) { in printDebug()
872 for (SDep& SuccDep : SU->Succs) { in colorComputeReservedDependencies()
956 for (SDep& SuccDep : SU->Succs) { in colorEndsAccordingToDependencies()
1026 for (SDep& SuccDep : SU->Succs) { in colorMergeConstantLoadsNextGroup()
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/external/llvm/lib/Transforms/IPO/
DPruneEH.cpp266 std::vector<BasicBlock *> Succs(succ_begin(BB), succ_end(BB)); in DeleteBasicBlock() local
268 for (unsigned i = 0, e = Succs.size(); i != e; ++i) in DeleteBasicBlock()
269 Succs[i]->removePredecessor(BB); in DeleteBasicBlock()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/IPO/
DPruneEH.cpp262 std::vector<BasicBlock *> Succs(succ_begin(BB), succ_end(BB)); in DeleteBasicBlock() local
264 for (unsigned i = 0, e = Succs.size(); i != e; ++i) in DeleteBasicBlock()
265 Succs[i]->removePredecessor(BB); in DeleteBasicBlock()
/external/llvm/lib/Target/AMDGPU/
DSIMachineScheduler.cpp423 for (SDep& Succ : SU->Succs) { in undoSchedule()
464 for (SDep& Succ : SU->Succs) { in releaseSuccessors()
494 for (SDep& Succ : SU->Succs) { in nodeScheduled()
525 assert(none_of(Succs, in addPred()
534 for (SIScheduleBlock* S : Succs) { in addSucc()
540 Succs.push_back(Succ); in addSucc()
560 for (SIScheduleBlock* S : Succs) { in printDebug()
763 for (SDep& SuccDep : SU->Succs) { in colorComputeReservedDependencies()
836 for (SDep& SuccDep : SU->Succs) { in colorEndsAccordingToDependencies()
903 for (SDep& SuccDep : SU->Succs) { in colorMergeConstantLoadsNextGroup()
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