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Searched refs:address_mode (Results 1 – 24 of 24) sorted by relevance

/external/tensorflow/tensorflow/lite/delegates/gpu/cl/kernels/
Dutil.cc60 std::string TextureAddressModeToString(TextureAddressMode address_mode) { in TextureAddressModeToString() argument
61 switch (address_mode) { in TextureAddressModeToString()
177 TextureAddressMode address_mode) const { in ReadWHS()
178 return Read(GetGlobalAddressNoDeclarationWHS(x, y, s), address_mode); in ReadWHS()
183 const std::string& b, TextureAddressMode address_mode) const { in ReadWHSB()
184 return Read(GetGlobalAddressNoDeclarationWHSB(x, y, s, b), address_mode); in ReadWHSB()
189 const std::string& s, TextureAddressMode address_mode) const { in ReadWHDS()
190 return Read(GetGlobalAddressNoDeclarationWHDS(x, y, z, s), address_mode); in ReadWHDS()
196 TextureAddressMode address_mode) const { in ReadWHDSB()
197 return Read(GetGlobalAddressNoDeclarationWHDSB(x, y, z, s, b), address_mode); in ReadWHDSB()
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Dutil.h103 TextureAddressMode address_mode = TextureAddressMode::DONT_CARE) const;
108 TextureAddressMode address_mode = TextureAddressMode::DONT_CARE) const;
113 TextureAddressMode address_mode = TextureAddressMode::DONT_CARE) const;
118 TextureAddressMode address_mode = TextureAddressMode::DONT_CARE) const;
124 TextureAddressMode address_mode = TextureAddressMode::DONT_CARE) const;
129 TextureAddressMode address_mode = TextureAddressMode::DONT_CARE) const;
134 TextureAddressMode address_mode = TextureAddressMode::DONT_CARE) const;
139 TextureAddressMode address_mode = TextureAddressMode::DONT_CARE) const;
158 TextureAddressMode address_mode = TextureAddressMode::DONT_CARE) const;
163 TextureAddressMode address_mode = TextureAddressMode::DONT_CARE) const;
Dmax_unpooling.cc41 const auto address_mode = GetFastestZeroMode(device); in GetMaxUnoolingKernelCode() local
81 c += " FLT4 src = " + src.Read("src_adr", address_mode) + ";\n"; in GetMaxUnoolingKernelCode()
82 c += " int4 ind = convert_int4(" + src_ind.Read("src_adr", address_mode) + in GetMaxUnoolingKernelCode()
121 const auto address_mode = GetFastestZeroMode(device); in GetMaxUnooling3DKernelCode() local
169 c += " FLT4 src = " + src.Read("src_adr", address_mode) + ";\n"; in GetMaxUnooling3DKernelCode()
170 c += " int4 ind = convert_int4(" + src_ind.Read("src_adr", address_mode) + in GetMaxUnooling3DKernelCode()
Ddepth_wise_conv.cc38 TextureAddressMode address_mode) { in GetSrcValue() argument
42 src_tensor.ReadWHS("x_c", "y_c", "Z", address_mode) + ";\n"; in GetSrcValue()
46 src_tensor.ReadWHS("x_c", "y_c", "z_layer", address_mode) + ";\n"; in GetSrcValue()
52 src_tensor.ReadWHS("x_c", "y_c", "z_layer", address_mode) + ";\n"; in GetSrcValue()
62 src_tensor.ReadWHS("x_c", "y_c", "z_layer", address_mode) + ";\n"; in GetSrcValue()
Ddepth_wise_conv_3d.cc38 TextureAddressMode address_mode) { in GetSrcValue() argument
42 src_tensor.ReadWHDS("x_c", "y_c", "z_c", "S", address_mode) + ";\n"; in GetSrcValue()
46 src_tensor.ReadWHDS("x_c", "y_c", "z_c", "z_layer", address_mode) + in GetSrcValue()
53 src_tensor.ReadWHDS("x_c", "y_c", "z_c", "z_layer", address_mode) + in GetSrcValue()
64 src_tensor.ReadWHDS("x_c", "y_c", "z_c", "z_layer", address_mode) + in GetSrcValue()
Dpooling.cc38 const auto address_mode = GetFastestZeroMode(device); in GetAveragePoolingKernelCode() local
85 src_tensor.ReadAsFloatWHS("x_c", "y_c", "Z", address_mode) + ";\n"; in GetAveragePoolingKernelCode()
113 const auto address_mode = GetFastestZeroMode(device); in GetAveragePooling3DKernelCode() local
161 src_tensor.ReadAsFloatWHDS("x_c", "y_c", "z_c", "S", address_mode) + in GetAveragePooling3DKernelCode()
Dconv_constants.cc118 const auto address_mode = GetFastestZeroMode(device); in GenerateConvolutionConstantCode() local
143 src_tensor.ReadWHS(s_x, s_y, std::to_string(s), address_mode) + in GenerateConvolutionConstantCode()
/external/igt-gpu-tools/assembler/
Dgen8_instruction.c50 if (reg.address_mode == BRW_ADDRESS_DIRECT) { in gen8_set_dst()
185 } else if (reg.address_mode == BRW_ADDRESS_DIRECT) { in gen8_set_src0()
228 } else if (reg.address_mode == BRW_ADDRESS_REGISTER_INDIRECT_REGISTER) { in gen8_set_src0()
274 } else if (reg.address_mode == BRW_ADDRESS_DIRECT) { in gen8_set_src1()
316 } else if (reg.address_mode == BRW_ADDRESS_REGISTER_INDIRECT_REGISTER) { in gen8_set_src1()
Dgram.y73 .address_mode = BRW_ADDRESS_DIRECT,
82 .reg.address_mode = BRW_ADDRESS_DIRECT,
288 if (reg->address_mode == BRW_ADDRESS_DIRECT && in validate_dst_reg()
297 if (reg->address_mode == BRW_ADDRESS_REGISTER_INDIRECT_REGISTER && in validate_dst_reg()
326 if (reg.address_mode == BRW_ADDRESS_REGISTER_INDIRECT_REGISTER && in validate_src_reg()
383 …tic int get_subreg_address(unsigned regfile, unsigned type, unsigned subreg, unsigned address_mode) in get_subreg_address() argument
387 assert(address_mode == BRW_ADDRESS_DIRECT); in get_subreg_address()
424 if (reg->address_mode == BRW_ADDRESS_DIRECT) in resolve_subnr()
426 reg->address_mode); in resolve_subnr()
1177 src0.reg.address_mode = BRW_ADDRESS_DIRECT;
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Dbrw_reg.h122 unsigned address_mode:1; /* relative addressing, hopefully! */ member
207 reg.address_mode = BRW_ADDRESS_DIRECT; in brw_reg()
721 reg.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; in brw_vec4_indirect()
731 reg.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; in brw_vec1_indirect()
Dbrw_eu_emit.c116 insn->bits1.da1.dest_address_mode = dest.address_mode; in brw_set_dest()
118 if (dest.address_mode == BRW_ADDRESS_DIRECT) { in brw_set_dest()
266 assert(reg.address_mode == BRW_ADDRESS_DIRECT); in brw_set_src0()
275 insn->bits2.da1.src0_address_mode = reg.address_mode; in brw_set_src0()
293 if (reg.address_mode == BRW_ADDRESS_DIRECT) { in brw_set_src0()
370 insn->bits3.da1.src1_address_mode = reg.address_mode; in brw_set_src1()
382 assert (intel->gen >= 4 || reg.address_mode == BRW_ADDRESS_DIRECT); in brw_set_src1()
384 if (reg.address_mode == BRW_ADDRESS_DIRECT) { in brw_set_src1()
843 assert(dest.address_mode == BRW_ADDRESS_DIRECT); in brw_set_3src_dest()
858 assert(src0.address_mode == BRW_ADDRESS_DIRECT); in brw_set_3src_src0()
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/external/mesa3d/src/freedreno/vulkan/
Dtu_util.h187 tu6_tex_wrap(VkSamplerAddressMode address_mode) in tu6_tex_wrap() argument
196 assert(address_mode < ARRAY_SIZE(lookup)); in tu6_tex_wrap()
197 return lookup[address_mode]; in tu6_tex_wrap()
/external/mesa3d/src/freedreno/ir2/
Dinstr-a2xx.h223 instr_addr_mode_t address_mode : 1; member
232 instr_addr_mode_t address_mode : 1; member
245 instr_addr_mode_t address_mode : 1; member
Ddisasm-a2xx.c513 if (cf->exec.address_mode == ABSOLUTE_ADDR) in print_cf_exec()
522 if (cf->loop.address_mode == ABSOLUTE_ADDR) in print_cf_loop()
535 if (cf->jmp_call.address_mode == ABSOLUTE_ADDR) in print_cf_jmp_call()
/external/mesa3d/src/intel/compiler/
Dbrw_reg.h223 unsigned address_mode:1; /* relative addressing, hopefully! */ member
429 reg.address_mode = BRW_ADDRESS_DIRECT; in brw_reg()
1145 reg.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; in brw_vec4_indirect()
1155 reg.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; in brw_vec1_indirect()
1166 reg.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER; in brw_VxH_indirect()
Dbrw_ir.h71 using brw_reg::address_mode;
Dbrw_eu_emit.c117 assert(dest.address_mode == BRW_ADDRESS_DIRECT); in brw_set_dest()
131 assert(dest.address_mode == BRW_ADDRESS_DIRECT); in brw_set_dest()
141 brw_inst_set_dst_address_mode(devinfo, inst, dest.address_mode); in brw_set_dest()
143 if (dest.address_mode == BRW_ADDRESS_DIRECT) { in brw_set_dest()
231 assert(reg.address_mode == BRW_ADDRESS_DIRECT); in brw_set_src0()
238 assert(reg.address_mode == BRW_ADDRESS_DIRECT); in brw_set_src0()
250 assert(reg.address_mode == BRW_ADDRESS_DIRECT); in brw_set_src0()
262 brw_inst_set_src0_address_mode(devinfo, inst, reg.address_mode); in brw_set_src0()
281 if (reg.address_mode == BRW_ADDRESS_DIRECT) { in brw_set_src0()
359 assert(reg.address_mode == BRW_ADDRESS_DIRECT); in brw_set_src1()
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Dbrw_eu_validate.c1774 unsigned vstride, width, hstride, type_size, reg, subreg, address_mode; in special_requirements_for_handling_double_precision_data_types() local
1793 address_mode = brw_inst_src ## n ## _address_mode(devinfo, inst) in special_requirements_for_handling_double_precision_data_types()
1844 ERROR_IF(BRW_ADDRESS_REGISTER_INDIRECT_REGISTER == address_mode || in special_requirements_for_handling_double_precision_data_types()
/external/u-boot/arch/x86/include/asm/arch-quark/
Dmrc.h122 uint32_t address_mode; member
/external/u-boot/arch/x86/cpu/quark/
Ddram.c90 mrc_params->address_mode = fdtdec_get_int(blob, node, "addr-mode", 0); in mrc_configure_params()
Dsmc.c2424 drp |= (mrc_params->address_mode << 14); in prog_dra_drb()
/external/mesa3d/src/intel/tools/
Di965_gram.y1565 $$.address_mode = BRW_ADDRESS_DIRECT;
1570 $$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER;
1575 $$.address_mode = BRW_ADDRESS_DIRECT;
1580 $$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER;
1728 $$.address_mode = BRW_ADDRESS_REGISTER_INDIRECT_REGISTER;
/external/v8/src/compiler/backend/arm64/
Dcode-generator-arm64.cc395 AddressingMode address_mode = AddressingModeField::decode(opcode); in EmitMaybePoisonedFPLoad() local
396 if (access_mode == kMemoryAccessPoisoned && address_mode != kMode_Root) { in EmitMaybePoisonedFPLoad()
399 switch (address_mode) { in EmitMaybePoisonedFPLoad()
/external/mesa3d/src/amd/vulkan/
Dradv_device.c7230 static unsigned radv_tex_wrap(VkSamplerAddressMode address_mode) in radv_tex_wrap() argument
7232 switch (address_mode) { in radv_tex_wrap()