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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dschedule-regpressure-limit2.ll18 %adr.a.0 = getelementptr inbounds float, float addrspace(3)* %in_arg, i32 20004
19 %adr.b.0 = getelementptr inbounds float, float addrspace(3)* %in_arg, i32 20252
20 %adr.c.0 = getelementptr inbounds float, float addrspace(3)* %in_arg, i32 20508
21 %adr.a.1 = getelementptr inbounds float, float addrspace(3)* %in_arg, i32 20772
22 %adr.b.1 = getelementptr inbounds float, float addrspace(3)* %in_arg, i32 21020
23 %adr.c.1 = getelementptr inbounds float, float addrspace(3)* %in_arg, i32 21276
24 %adr.a.2 = getelementptr inbounds float, float addrspace(3)* %in_arg, i32 21540
25 %adr.b.2 = getelementptr inbounds float, float addrspace(3)* %in_arg, i32 21788
26 %adr.c.2 = getelementptr inbounds float, float addrspace(3)* %in_arg, i32 22044
27 %adr.a.3 = getelementptr inbounds float, float addrspace(3)* %in_arg, i32 22308
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/SVE/
Dadr.s10 adr z0.s, [z0.s, z0.s] label
16 adr z0.s, [z0.s, z0.s, lsl #0] label
22 adr z0.s, [z0.s, z0.s, lsl #1] label
28 adr z0.s, [z0.s, z0.s, lsl #2] label
34 adr z0.s, [z0.s, z0.s, lsl #3] label
40 adr z0.d, [z0.d, z0.d] label
46 adr z0.d, [z0.d, z0.d, lsl #0] label
52 adr z0.d, [z0.d, z0.d, lsl #1] label
58 adr z0.d, [z0.d, z0.d, lsl #2] label
64 adr z0.d, [z0.d, z0.d, lsl #3] label
[all …]
Dadr-diagnostics.s6 adr z0.s, [z0.s, z0.d] label
11 adr z0.s, [z0.s, z0.s, lsl] label
16 adr z0.s, [z0.s, z0.s, lsl #4] label
21 adr z0.s, [z0.s, z0.s, uxtw] label
26 adr z0.s, [z0.s, z0.s, sxtw] label
31 adr z0.d, [z0.d, z0.s] label
36 adr z0.d, [z0.d, z0.s, uxtw] label
41 adr z0.d, [z0.d, z0.s, sxtw] label
46 adr z0.d, [z0.d, z0.d, lsl #4] label
51 adr z0.d, [z0.d, z0.d, uxtw #4] label
[all …]
/external/u-boot/include/linux/mtd/
Ddoc2000.h84 #define ReadDOC_(adr, reg) ((unsigned char)(*(volatile __u32 *)(((unsigned long)adr)+((reg)<<2… argument
85 #define WriteDOC_(d, adr, reg) do{ *(volatile __u32 *)(((unsigned long)adr)+((reg)<<2)) = (__u32)d… argument
88 #define ReadDOC_(adr, reg) ((unsigned char)(*(volatile __u16 *)(((unsigned long)adr)+((reg)<<1… argument
89 #define WriteDOC_(d, adr, reg) do{ *(volatile __u16 *)(((unsigned long)adr)+((reg)<<1)) = (__u16)d… argument
92 #define ReadDOC_(adr, reg) readb((void __iomem *)(adr) + (reg)) argument
93 #define WriteDOC_(d, adr, reg) writeb(d, (void __iomem *)(adr) + (reg)) argument
103 #define ReadDOC(adr, reg) ReadDOC_(adr,DoC_##reg) argument
104 #define WriteDOC(d, adr, reg) WriteDOC_(d,adr,DoC_##reg) argument
/external/u-boot/drivers/power/regulator/
Dpalmas_regulator.c53 unsigned int adr; in palmas_smps_enable() local
57 adr = uc_pdata->ctrl_reg; in palmas_smps_enable()
59 ret = pmic_reg_read(dev->parent, adr); in palmas_smps_enable()
78 ret = pmic_reg_write(dev->parent, adr, ret); in palmas_smps_enable()
120 unsigned int hex, adr; in palmas_smps_val() local
130 adr = uc_pdata->volt_reg; in palmas_smps_val()
132 ret = pmic_reg_read(dev->parent, adr); in palmas_smps_val()
160 return pmic_reg_write(dev->parent, adr, ret); in palmas_smps_val()
167 unsigned int adr; in palmas_ldo_bypass_enable() local
181 adr = p->ctrl_reg; in palmas_ldo_bypass_enable()
[all …]
Dlp873x_regulator.c26 unsigned int adr; in lp873x_buck_enable() local
30 adr = uc_pdata->ctrl_reg; in lp873x_buck_enable()
32 ret = pmic_reg_read(dev->parent, adr); in lp873x_buck_enable()
50 ret = pmic_reg_write(dev->parent, adr, ret); in lp873x_buck_enable()
88 unsigned int hex, adr; in lp873x_buck_val() local
97 adr = uc_pdata->volt_reg; in lp873x_buck_val()
99 ret = pmic_reg_read(dev->parent, adr); in lp873x_buck_val()
120 ret = pmic_reg_write(dev->parent, adr, ret); in lp873x_buck_val()
128 unsigned int adr; in lp873x_ldo_enable() local
132 adr = uc_pdata->ctrl_reg; in lp873x_ldo_enable()
[all …]
Dtps65941_regulator.c30 unsigned int adr; in tps65941_buck_enable() local
34 adr = uc_pdata->ctrl_reg; in tps65941_buck_enable()
36 ret = pmic_reg_read(dev->parent, adr); in tps65941_buck_enable()
54 ret = pmic_reg_write(dev->parent, adr, ret); in tps65941_buck_enable()
120 unsigned int hex, adr; in tps65941_buck_val() local
129 adr = uc_pdata->volt_reg; in tps65941_buck_val()
131 ret = pmic_reg_read(dev->parent, adr); in tps65941_buck_val()
172 ret = pmic_reg_write(dev->parent, adr, ret); in tps65941_buck_val()
182 unsigned int adr; in tps65941_ldo_enable() local
186 adr = uc_pdata->ctrl_reg; in tps65941_ldo_enable()
[all …]
Dlp87565_regulator.c24 unsigned int adr; in lp87565_buck_enable() local
28 adr = uc_pdata->ctrl_reg; in lp87565_buck_enable()
30 ret = pmic_reg_read(dev->parent, adr); in lp87565_buck_enable()
48 ret = pmic_reg_write(dev->parent, adr, ret); in lp87565_buck_enable()
86 unsigned int hex, adr; in lp87565_buck_val() local
95 adr = uc_pdata->volt_reg; in lp87565_buck_val()
97 ret = pmic_reg_read(dev->parent, adr); in lp87565_buck_val()
118 ret = pmic_reg_write(dev->parent, adr, ret); in lp87565_buck_val()
Dmax77686.c319 unsigned int adr; in max77686_ldo_val() local
332 adr = MAX77686_REG_PMIC_LDO1CTRL1 + ldo - 1; in max77686_ldo_val()
334 ret = pmic_read(dev->parent, adr, &val, 1); in max77686_ldo_val()
353 ret = pmic_write(dev->parent, adr, &val, 1); in max77686_ldo_val()
360 unsigned int mask, adr; in max77686_buck_val() local
374 adr = max77686_buck_out[buck]; in max77686_buck_val()
388 ret = pmic_read(dev->parent, adr, &val, 1); in max77686_buck_val()
407 ret = pmic_write(dev->parent, adr, &val, 1); in max77686_buck_val()
414 unsigned int adr, mode; in max77686_ldo_mode() local
427 adr = MAX77686_REG_PMIC_LDO1CTRL1 + ldo - 1; in max77686_ldo_mode()
[all …]
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t186/
Dplat_trampoline.S23 adr x0, __tegra186_system_suspend_state
41 adr x1, __tegra186_cpu_reset_handler_end
42 adr x2, __tegra186_cpu_reset_handler_data
62 adr x0, __tegra186_cpu_reset_handler_data
107 adr x0, __tegra186_cpu_reset_handler_end
108 adr x1, tegra186_cpu_reset_handler
115 adr x0, tegra186_cpu_reset_handler
121 adr x0, __tegra186_smmu_context
122 adr x1, tegra186_cpu_reset_handler
136 adr x0, __tegra186_system_suspend_state
[all …]
/external/arm-trusted-firmware/plat/nvidia/tegra/soc/t194/
Dplat_trampoline.S23 adr x0, __tegra194_system_suspend_state
41 adr x1, __tegra194_cpu_reset_handler_end
42 adr x2, __tegra194_cpu_reset_handler_data
62 adr x0, __tegra194_cpu_reset_handler_data
106 adr x0, __tegra194_cpu_reset_handler_end
107 adr x1, tegra194_cpu_reset_handler
114 adr x0, tegra194_cpu_reset_handler
120 adr x0, __tegra194_smmu_context
121 adr x1, tegra194_cpu_reset_handler
135 adr x0, __tegra194_system_suspend_state
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Darm64-adr.s4 adr x0, #0 label
5 adr x0, #1 label
6 adr x0, 1f label
7 adr x0, foo label
26 adr x0, #0xffffffff label
/external/llvm/test/MC/AArch64/
Darm64-adr.s4 adr x0, #0 label
5 adr x0, #1 label
6 adr x0, 1f label
7 adr x0, foo label
26 adr x0, #0xffffffff label
/external/arm-trusted-firmware/include/plat/arm/common/aarch64/
Darm_macros.S54 adr x6, icc_regs
65 adr x6, gicc_regs
76 adr x4, gicd_pend_reg
84 adr x4, prefix
92 adr x4, spacer
98 adr x4, newline
/external/arm-trusted-firmware/include/plat/marvell/common/aarch64/
Dmarvell_macros.S62 adr x6, icc_regs
74 adr x6, gicc_regs
85 adr x4, gicd_pend_reg
93 adr x4, spacer
99 adr x4, newline
119 adr x6, cci_iface_regs
/external/arm-trusted-firmware/plat/rockchip/common/include/
Dplat_macros.S62 adr x6, icc_regs
73 adr x6, gicc_regs
84 adr x4, gicd_pend_reg
92 adr x4, spacer
98 adr x4, newline
104 adr x6, cci_iface_regs
/external/arm-trusted-firmware/plat/mediatek/common/drivers/pmic_wrap/
Dpmic_wrap_init.c98 uint32_t adr, in pwrap_wacs2() argument
129 wacs_adr = (adr >> 1) << 16; in pwrap_wacs2()
157 int32_t pwrap_read(uint32_t adr, uint32_t *rdata) in pwrap_read() argument
159 return pwrap_wacs2(0, adr, 0, rdata, 1); in pwrap_read()
162 int32_t pwrap_write(uint32_t adr, uint32_t wdata) in pwrap_write() argument
164 return pwrap_wacs2(1, adr, wdata, 0, 1); in pwrap_write()
/external/arm-trusted-firmware/plat/hisilicon/hikey/include/
Dplat_macros.S40 adr x6, gicc_regs
50 adr x4, gicd_pend_reg
57 adr x4, spacer
61 adr x4, newline
65 adr x6, cci_iface_regs
/external/arm-trusted-firmware/plat/mediatek/mt8183/include/
Dplat_macros.S38 adr x6, gicc_regs
48 adr x4, gicd_pend_reg
56 adr x4, spacer
62 adr x4, newline
67 adr x6, cci_iface_regs
/external/arm-trusted-firmware/plat/renesas/rcar/include/
Dplat_macros.S35 adr x6, gicc_regs /* Load the gicc reg list to x6 */
45 adr x4, gicd_pend_reg
52 adr x4, spacer
56 adr x4, newline
74 adr x6, cci_iface_regs
/external/arm-trusted-firmware/plat/mediatek/mt6795/include/
Dplat_macros.S32 adr x6, gicc_regs
42 adr x4, gicd_pend_reg
50 adr x4, spacer
56 adr x4, newline
74 adr x6, cci_iface_regs
/external/arm-trusted-firmware/plat/hisilicon/hikey960/include/
Dplat_macros.S40 adr x6, gicc_regs
50 adr x4, gicd_pend_reg
57 adr x4, spacer
61 adr x4, newline
65 adr x6, cci_iface_regs
/external/arm-trusted-firmware/plat/mediatek/mt8173/include/
Dplat_macros.S38 adr x6, gicc_regs
48 adr x4, gicd_pend_reg
56 adr x4, spacer
62 adr x4, newline
67 adr x6, cci_iface_regs
/external/arm-trusted-firmware/plat/hisilicon/hikey/aarch64/
Dhikey_helpers.S105 adr x4, plat_err_str
108 adr x4, esr_el3_str
114 adr x4, elr_el3_str
122 adr x4, plat_err_str
125 adr x4, esr_el1_str
131 adr x4, elr_el1_str
/external/arm-trusted-firmware/plat/xilinx/versal/include/
Dplat_macros.S54 adr x6, icc_regs
65 adr x6, gicc_regs
76 adr x4, gicd_pend_reg
84 adr x4, spacer
90 adr x4, newline

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