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/external/u-boot/arch/arm/dts/
Dzynqmp-clk.dtsi79 clocks = <&clk100 &clk100>;
83 clocks = <&clk100 &clk100>;
87 clocks = <&clk600>, <&clk100>;
91 clocks = <&clk600>, <&clk100>;
95 clocks = <&clk600>, <&clk100>;
99 clocks = <&clk600>, <&clk100>;
103 clocks = <&clk600>, <&clk100>;
107 clocks = <&clk600>, <&clk100>;
111 clocks = <&clk600>, <&clk100>;
115 clocks = <&clk600>, <&clk100>;
[all …]
Dzynqmp-clk-ccf.dtsi15 clocks = <&zynqmp_clk PL0_REF>;
21 clocks = <&zynqmp_clk PL1_REF>;
27 clocks = <&zynqmp_clk PL2_REF>;
33 clocks = <&zynqmp_clk PL3_REF>;
84 clocks = <&pss_ref_clk>, <&video_clk>, <&pss_alt_ref_clk>,
92 clocks = <&zynqmp_clk CAN0_REF>, <&zynqmp_clk LPD_LSBUS>;
96 clocks = <&zynqmp_clk CAN1_REF>, <&zynqmp_clk LPD_LSBUS>;
100 clocks = <&zynqmp_clk ACPU>;
104 clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>;
108 clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>;
[all …]
Domap3xxx-clocks.dtsi20 …clocks = <&virt_12m_ck>, <&virt_13m_ck>, <&virt_19200000_ck>, <&virt_26000000_ck>, <&virt_38_4m_ck…
27 clocks = <&osc_sys_ck>;
37 clocks = <&osc_sys_ck>;
45 clocks = <&dpll3_ck>;
53 clocks = <&dpll3_m2_ck>;
61 clocks = <&dpll4_ck>;
69 clocks = <&dpll3_m2x2_ck>;
77 clocks = <&sys_ck>;
87 clocks = <&core_96m_fck>, <&mcbsp_clks>;
95 clocks = <&mcbsp5_gate_fck>, <&mcbsp5_mux_fck>;
[all …]
Ddra7xx-clocks.dtsi14 clocks = <&atl_gfclk_mux>;
20 clocks = <&atl_gfclk_mux>;
26 clocks = <&atl_gfclk_mux>;
32 clocks = <&atl_gfclk_mux>;
110 clocks = <&sys_clkin1>;
202 clocks = <&abe_dpll_clk_mux>, <&abe_dpll_bypass_clk_mux>;
209 clocks = <&dpll_abe_ck>;
215 clocks = <&dpll_abe_x2_ck>;
226 clocks = <&dpll_abe_m2x2_ck>;
235 clocks = <&dpll_abe_ck>;
[all …]
Dam43xx-clocks.dtsi14 clocks = <&sysboot_freq_sel_ck>, <&crystal_freq_sel_ck>;
22 clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>;
30 clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>;
38 clocks = <&sys_clkin_ck>;
46 clocks = <&sys_clkin_ck>;
54 clocks = <&sys_clkin_ck>;
62 clocks = <&sys_clkin_ck>;
70 clocks = <&sys_clkin_ck>;
78 clocks = <&sys_clkin_ck>;
86 clocks = <&sys_clkin_ck>;
[all …]
Dam33xx-clocks.dtsi14 clocks = <&virt_19200000_ck>, <&virt_24000000_ck>, <&virt_25000000_ck>, <&virt_26000000_ck>;
22 clocks = <&sys_clkin_ck>;
30 clocks = <&sys_clkin_ck>;
38 clocks = <&sys_clkin_ck>;
46 clocks = <&sys_clkin_ck>;
54 clocks = <&sys_clkin_ck>;
62 clocks = <&sys_clkin_ck>;
70 clocks = <&sys_clkin_ck>;
78 clocks = <&sys_clkin_ck>;
86 clocks = <&sys_clkin_ck>;
[all …]
Domap34xx-omap36xx-clocks.dtsi14 clocks = <&l4_ick>;
22 clocks = <&security_l4_ick2>;
30 clocks = <&security_l4_ick2>;
38 clocks = <&security_l4_ick2>;
46 clocks = <&security_l4_ick2>;
54 clocks = <&dpll4_m5x2_ck>;
63 clocks = <&l4_ick>;
71 clocks = <&core_96m_fck>;
79 clocks = <&l3_ick>;
87 clocks = <&security_l3_ick>;
[all …]
Domap36xx-am35xx-omap3430es2plus-clocks.dtsi14 clocks = <&corex2_fck>;
22 clocks = <&corex2_fck>;
31 clocks = <&sys_ck>, <&sys_ck>;
40 clocks = <&dpll5_ck>;
49 clocks = <&core_ck>;
57 clocks = <&core_ck>;
65 clocks = <&core_ck>;
73 clocks = <&core_ck>;
81 clocks = <&dpll4_m2x2_ck>;
89 clocks = <&core_ck>;
[all …]
Dsocfpga.dtsi85 clocks = <&l4_main_clk>;
103 clocks = <&can0_clk>;
112 clocks = <&can1_clk>;
121 clocks {
150 clocks = <&osc1>;
156 clocks = <&main_pll>;
164 clocks = <&main_pll>;
172 clocks = <&main_pll>, <&osc1>;
180 clocks = <&main_pll>;
187 clocks = <&main_pll>;
[all …]
Ddm816x-clocks.dtsi12 clocks = <&sys_clkin_ck &sys_clkin_ck>;
28 clocks = <&sys_clkin_ck &sys_clkin_ck>;
40 clocks = <&sys_clkin_ck &sys_clkin_ck>;
51 clocks = <&main_fapll 7>, < &sys_clkin_ck>;
92 clocks = <&main_fapll 5 &ddr_fapll 1 &video_fapll 1
100 clocks = <&clkout_pre_ck>;
109 clocks = <&clkout_div_ck>;
114 /* CM_DPLL clocks p1795 */
118 clocks = <&main_fapll 1>;
126 clocks = <&main_fapll 2>;
[all …]
Domap36xx-omap3430es2plus-clocks.dtsi14 clocks = <&corex2_fck>;
22 clocks = <&corex2_fck>;
31 clocks = <&ssi_ssr_gate_fck_3430es2>, <&ssi_ssr_div_fck_3430es2>;
37 clocks = <&ssi_ssr_fck>;
45 clocks = <&core_l3_ick>;
53 clocks = <&l4_ick>;
61 clocks = <&ssi_l4_ick>;
69 clocks = <&omap_96m_fck>;
77 clocks = <&sys_ck>;
85 clocks = <&omap_96m_fck>;
[all …]
Dbcm283x.dtsi130 clocks = <&clocks BCM2835_CLOCK_V3D>,
131 <&clocks BCM2835_CLOCK_PERI_IMAGE>,
132 <&clocks BCM2835_CLOCK_H264>,
133 <&clocks BCM2835_CLOCK_ISP>;
138 clocks: cprman@7e101000 { label
145 * pixel clocks come from the DSI analog PHY.
147 clocks = <&clk_osc>,
402 clocks = <&clocks BCM2835_CLOCK_UART>,
403 <&clocks BCM2835_CLOCK_VPU>;
412 clocks = <&clocks BCM2835_CLOCK_VPU>;
[all …]
Dr7s72100.dtsi30 /* Fixed factor clocks */
34 clocks = <&cpg_clocks R7S72100_CLK_PLL>;
48 clocks = <&cpg_clocks R7S72100_CLK_I>;
53 /* External clocks */
64 clocks = <&cpg_clocks R7S72100_CLK_PLL>;
72 clocks = <&cpg_clocks R7S72100_CLK_PLL>;
121 clocks = <&mstp4_clks R7S72100_CLK_SCIF0>;
134 clocks = <&mstp4_clks R7S72100_CLK_SCIF1>;
147 clocks = <&mstp4_clks R7S72100_CLK_SCIF2>;
160 clocks = <&mstp4_clks R7S72100_CLK_SCIF3>;
[all …]
Dkeystone-clocks.dtsi11 clocks {
19 clocks = <&mainpllclk>, <&refclksys>;
29 clocks = <&mainmuxclk>;
38 clocks = <&mainmuxclk>;
47 clocks = <&mainmuxclk>;
57 clocks = <&mainmuxclk>;
67 clocks = <&chipclk1>;
76 clocks = <&chipclk1>;
85 clocks = <&papllclk>;
94 clocks = <&chipclk1>;
[all …]
Dstm32f429.dtsi15 clocks {
59 clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM2)>;
68 clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM2)>;
89 clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM3)>;
98 clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM3)>;
119 clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM4)>;
128 clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM4)>;
149 clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM5)>;
157 clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM5)>;
178 clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM6)>;
[all …]
Dkeystone-k2hk-clocks.dtsi11 clocks {
15 clocks = <&refclkarm>;
24 clocks = <&refclksys>;
32 clocks = <&refclkpass>;
41 clocks = <&refclkddr3a>;
50 clocks = <&refclkddr3b>;
59 clocks = <&chipclk16>;
69 clocks = <&chipclk1rstiso13>;
79 clocks = <&chipclk12>;
89 clocks = <&chipclk1>;
[all …]
Dstm32f746.dtsi15 clocks {
46 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;
55 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM2)>;
76 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM3)>;
85 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM3)>;
106 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM4)>;
115 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM4)>;
136 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM5)>;
144 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM5)>;
165 clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM6)>;
[all …]
Dkeystone-k2l-clocks.dtsi11 clocks {
15 clocks = <&refclksys>;
24 clocks = <&refclksys>;
32 clocks = <&refclksys>;
41 clocks = <&refclksys>;
50 clocks = <&chipclk12>;
60 clocks = <&chipclk12>;
70 clocks = <&chipclk1>;
80 clocks = <&chipclk1>;
90 clocks = <&chipclk1>;
[all …]
Dsocfpga_arria10.dtsi86 clocks = <&l4_main_clk>;
104 clocks {
138 clocks = <&osc1>, <&cb_intosc_ls_clk>,
146 clocks = <&main_pll>;
153 clocks = <&main_pll>;
161 clocks = <&main_pll>;
168 clocks = <&main_pll>;
175 clocks = <&main_pll>;
182 clocks = <&main_pll>;
190 clocks = <&main_pll>;
[all …]
Dsama5d2.dtsi15 clocks {
38 clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
46 clocks = <&utmi>, <&uhphs_clk>;
54 clocks = <&sdmmc0_hclk>, <&sdmmc0_gclk>, <&main>;
62 clocks = <&sdmmc1_hclk>, <&sdmmc1_gclk>, <&main>;
76 clocks = <&lcdc_clk>;
97 clocks = <&main>;
108 clocks = <&plla>;
114 clocks = <&main>;
120 clocks = <&audio_pll_frac>;
[all …]
Dstm32h743.dtsi16 clocks {
41 clocks = <&rcc TIM5_CK>;
49 clocks = <&rcc LPTIM1_CK>;
77 clocks = <&rcc SPI2_CK>;
88 clocks = <&rcc SPI3_CK>;
97 clocks = <&rcc USART2_CK>;
108 clocks = <&rcc I2C1_CK>;
120 clocks = <&rcc I2C2_CK>;
132 clocks = <&rcc I2C3_CK>;
139 clocks = <&rcc DAC12_CK>;
[all …]
Dimx7ulp.dtsi80 clocks {
163 clocks = <&clks IMX7ULP_CLK_DMA1>, <&clks IMX7ULP_CLK_DMA_MUX1>;
197 clocks = <&clks IMX7ULP_CLK_SNVS>;
205 clocks = <&clks IMX7ULP_CLK_LPTPM5>;
212 /* clocks = <&lpclk>;*/
213 clocks = <&clks IMX7ULP_CLK_LPIT1>;
215 assigned-clocks = <&clks IMX7ULP_CLK_LPIT1>;
223 clocks = <&clks IMX7ULP_CLK_LPI2C4>;
225 assigned-clocks = <&clks IMX7ULP_CLK_LPI2C4>;
235 clocks = <&clks IMX7ULP_CLK_LPI2C5>;
[all …]
Dast2500-u-boot.dtsi28 clocks = <&scu PLL_MPLL>;
42 clocks = <&scu BCLK_SDCLK>;
50 clocks = <&scu BCLK_SDCLK>;
59 clocks = <&scu PCLK_UART1>;
63 clocks = <&scu PCLK_UART2>;
67 clocks = <&scu PCLK_UART3>;
71 clocks = <&scu PCLK_UART4>;
75 clocks = <&scu PCLK_UART5>;
83 clocks = <&scu PCLK_MAC1>, <&scu PLL_D2PLL>;
87 clocks = <&scu PCLK_MAC2>, <&scu PLL_D2PLL>;
Dimx8mn.dtsi51 clocks = <&clk IMX8MN_CLK_ARM>;
61 clocks = <&clk IMX8MN_CLK_ARM>;
71 clocks = <&clk IMX8MN_CLK_ARM>;
81 clocks = <&clk IMX8MN_CLK_ARM>;
171 clocks = <&clk IMX8MN_CLK_GPIO1_ROOT>;
183 clocks = <&clk IMX8MN_CLK_GPIO2_ROOT>;
195 clocks = <&clk IMX8MN_CLK_GPIO3_ROOT>;
207 clocks = <&clk IMX8MN_CLK_GPIO4_ROOT>;
219 clocks = <&clk IMX8MN_CLK_GPIO5_ROOT>;
230 clocks = <&clk IMX8MN_CLK_WDOG1_ROOT>;
[all …]
/external/u-boot/drivers/clk/renesas/
DKconfig12 Enable this to support the clocks on Renesas RCar Gen2 SoC.
18 Enable this to support the clocks on Renesas R8A7790 SoC.
24 Enable this to support the clocks on Renesas R8A7791 SoC.
30 Enable this to support the clocks on Renesas R8A7792 SoC.
36 Enable this to support the clocks on Renesas R8A7793 SoC.
42 Enable this to support the clocks on Renesas R8A7794 SoC.
49 Enable this to support the clocks on Renesas RCar Gen3 SoC.
55 Enable this to support the clocks on Renesas R8A7795 SoC.
61 Enable this to support the clocks on Renesas R8A7796 SoC.
67 Enable this to support the clocks on Renesas R8A77965 SoC.
[all …]

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