Searched refs:ddr_wrlvl_cntl (Results 1 – 21 of 21) sorted by relevance
| /external/u-boot/board/freescale/corenet_ds/ |
| D | p4080ds_ddr.c | 104 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CNTL,
136 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CNTL,
168 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CNTL,
200 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CNTL,
232 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CNTL,
264 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CNTL,
296 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CNTL,
328 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CNTL,
|
| /external/u-boot/drivers/ddr/fsl/ |
| D | mpc85xx_ddr_gen3.c | 133 out_be32(&ddr->ddr_wrlvl_cntl, regs->ddr_wrlvl_cntl); in fsl_ddr_set_memctl_regs()
206 out_be32(&ddr->ddr_wrlvl_cntl, regs->ddr_wrlvl_cntl & 0x7fffffff); in fsl_ddr_set_memctl_regs()
331 out_be32(&ddr->ddr_wrlvl_cntl, regs->ddr_wrlvl_cntl); in fsl_ddr_set_memctl_regs()
|
| D | arm_ddr_gen3.c | 110 ddr_out32(&ddr->ddr_wrlvl_cntl, regs->ddr_wrlvl_cntl); in fsl_ddr_set_memctl_regs()
|
| D | fsl_ddr_gen4.c | 196 ddr_out32(&ddr->ddr_wrlvl_cntl, regs->ddr_wrlvl_cntl); in fsl_ddr_set_memctl_regs()
|
| D | ctrl_regs.c | 2283 ddr->ddr_wrlvl_cntl = (0 in set_ddr_wrlvl_cntl()
2292 debug("FSLDDR: wrlvl_cntl = 0x%08x\n", ddr->ddr_wrlvl_cntl); in set_ddr_wrlvl_cntl()
|
| D | interactive.c | 668 CFG_REGS(ddr_wrlvl_cntl), in print_fsl_memctl_config_regs()
759 CFG_REGS(ddr_wrlvl_cntl), in fsl_ddr_regs_edit()
|
| /external/u-boot/board/freescale/bsc9132qds/ |
| D | spl_minimal.c | 36 __raw_writel(CONFIG_SYS_DDR_WRLVL_CONTROL_800, &ddr->ddr_wrlvl_cntl); in sdram_init()
56 __raw_writel(CONFIG_SYS_DDR_WRLVL_CONTROL_1333, &ddr->ddr_wrlvl_cntl); in sdram_init()
|
| D | ddr.c | 39 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CONTROL_800,
66 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CONTROL_1333,
|
| /external/u-boot/board/freescale/p1010rdb/ |
| D | ddr.c | 42 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CONTROL_800,
69 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CONTROL_667,
|
| /external/u-boot/board/freescale/p1_twr/ |
| D | ddr.c | 48 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CONTROL, in fixed_sdram()
|
| /external/u-boot/board/freescale/ls1043ardb/ |
| D | ddr.h | 94 .ddr_wrlvl_cntl = 0x8675F607,
|
| /external/u-boot/board/freescale/bsc9131rdb/ |
| D | spl_minimal.c | 44 __raw_writel(CONFIG_SYS_DDR_WRLVL_CONTROL_800, &ddr->ddr_wrlvl_cntl); in sdram_init()
|
| D | ddr.c | 40 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CONTROL_800,
|
| /external/u-boot/board/Arcturus/ucp1020/ |
| D | ddr.c | 108 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CONTROL, in fixed_sdram()
|
| /external/u-boot/board/freescale/ls1021aiot/ |
| D | ls1021aiot.c | 71 out_be32(&ddr->ddr_wrlvl_cntl, DDR_DDR_WRLVL_CNTL); in ddrmc_init()
|
| /external/u-boot/board/freescale/ls1021atsn/ |
| D | ls1021atsn.c | 63 out_be32(&ddr->ddr_wrlvl_cntl, DDR_DDR_WRLVL_CNTL); in ddrmc_init()
|
| /external/u-boot/board/freescale/p1_p2_rdb_pc/ |
| D | ddr.c | 240 .ddr_wrlvl_cntl = CONFIG_SYS_DDR_WRLVL_CONTROL, in fixed_sdram()
|
| /external/u-boot/include/ |
| D | fsl_immap.h | 55 u32 ddr_wrlvl_cntl; /* write leveling control*/ member
|
| D | fsl_ddr_sdram.h | 284 unsigned int ddr_wrlvl_cntl; member
|
| /external/u-boot/board/freescale/mpc8569mds/ |
| D | mpc8569mds.c | 255 out_be32(&ddr->ddr_wrlvl_cntl, CONFIG_SYS_DDR_WRLVL_CNTL); in fixed_sdram()
|
| /external/u-boot/board/freescale/ls1021atwr/ |
| D | ls1021atwr.c | 177 out_be32(&ddr->ddr_wrlvl_cntl, DDR_DDR_WRLVL_CNTL); in ddrmc_init()
|