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Searched refs:dev_dbg (Results 1 – 25 of 72) sorted by relevance

123

/external/u-boot/drivers/usb/dwc3/
Ddwc3-omap.c219 dev_dbg(omap->dev, "ID GND\n"); in dwc3_omap_set_mailbox()
231 dev_dbg(omap->dev, "VBUS Connect\n"); in dwc3_omap_set_mailbox()
244 dev_dbg(omap->dev, "VBUS Disconnect\n"); in dwc3_omap_set_mailbox()
256 dev_dbg(omap->dev, "invalid state\n"); in dwc3_omap_set_mailbox()
268 dev_dbg(omap->dev, "DMA Disable was Cleared\n"); in dwc3_omap_interrupt()
273 dev_dbg(omap->dev, "OTG Event\n"); in dwc3_omap_interrupt()
276 dev_dbg(omap->dev, "DRVVBUS Rise\n"); in dwc3_omap_interrupt()
279 dev_dbg(omap->dev, "CHRGVBUS Rise\n"); in dwc3_omap_interrupt()
282 dev_dbg(omap->dev, "DISCHRGVBUS Rise\n"); in dwc3_omap_interrupt()
285 dev_dbg(omap->dev, "IDPULLUP Rise\n"); in dwc3_omap_interrupt()
[all …]
Dep0.c97 dev_dbg(dwc->dev, "%s STARTTRANSFER failed", dep->name); in dwc3_ep0_start_trans()
162 dev_dbg(dwc->dev, "too early for delayed status"); in __dwc3_gadget_ep0_queue()
226 dev_dbg(dwc->dev, "trying to queue request %p to disabled %s", in dwc3_gadget_ep0_queue()
505 dev_dbg(dwc->dev, "invalid device address %d", addr); in dwc3_ep0_set_address()
510 dev_dbg(dwc->dev, "trying to set address when configured"); in dwc3_ep0_set_address()
575 dev_dbg(dwc->dev, "resize FIFOs flag SET"); in dwc3_ep0_set_config()
797 dev_dbg(dwc->dev, "Setup Pending received"); in dwc3_ep0_complete_data()
885 dev_dbg(dwc->dev, "Invalid Test #%d", in dwc3_ep0_complete_status()
894 dev_dbg(dwc->dev, "Setup Pending received"); in dwc3_ep0_complete_status()
948 dev_dbg(dwc->dev, "failed to map request\n"); in __dwc3_ep0_do_control_data()
[all …]
/external/u-boot/drivers/remoteproc/
Dti_k3_dsp_rproc.c65 dev_dbg(dev, "%s addr = 0x%lx, size = 0x%lx\n", __func__, addr, size); in k3_dsp_load()
78 dev_dbg(dev, "%s: Boot vector = 0x%x\n", __func__, boot_vector); in k3_dsp_load()
97 dev_dbg(dev, "%s\n", __func__); in k3_dsp_start()
123 dev_dbg(dev, "%s\n", __func__); in k3_dsp_stop()
141 dev_dbg(dev, "%s\n", __func__); in k3_dsp_init()
148 dev_dbg(dev, "%s\n", __func__); in k3_dsp_reset()
162 dev_dbg(dev, "%s\n", __func__); in k3_dsp_da_to_va()
203 dev_dbg(dev, "%s\n", __func__); in ti_sci_proc_of_to_priv()
236 dev_dbg(dev, "%s\n", __func__); in k3_dsp_of_get_memories()
266 dev_dbg(dev, "memory %8s: bus addr %pa size 0x%zx va %p da %pa\n", in k3_dsp_of_get_memories()
[all …]
Dti_k3_arm64_rproc.c55 dev_dbg(dev, "%s addr = 0x%lx, size = 0x%lx\n", __func__, addr, size); in k3_arm64_load()
76 dev_dbg(dev, "%s\n", __func__); in k3_arm64_start()
109 dev_dbg(dev, "%s\n", __func__); in k3_arm64_init()
112 dev_dbg(dev, "%s: rproc successfully initialized\n", __func__); in k3_arm64_init()
125 dev_dbg(dev, "%s\n", __func__); in ti_sci_proc_of_to_priv()
156 dev_dbg(dev, "%s\n", __func__); in k3_arm64_of_to_priv()
200 dev_dbg(dev, "%s\n", __func__); in k3_arm64_probe()
206 dev_dbg(dev, "%s: Probe failed with error %d\n", __func__, ret); in k3_arm64_probe()
210 dev_dbg(dev, "Remoteproc successfully probed\n"); in k3_arm64_probe()
Dti_k3_r5f_rproc.c149 dev_dbg(dev, "%s\n", __func__); in k3_r5f_lockstep_release()
185 dev_dbg(dev, "%s\n", __func__); in k3_r5f_split_release()
211 dev_dbg(dev, "%s\n", __func__); in k3_r5f_prepare()
270 dev_dbg(dev, "%s addr = 0x%lx, size = 0x%lx\n", __func__, addr, size); in k3_r5f_load()
301 dev_dbg(dev, "%s: Boot vector = 0x%x\n", __func__, boot_vector); in k3_r5f_load()
351 dev_dbg(dev, "%s\n", __func__); in k3_r5f_start()
400 dev_dbg(dev, "%s\n", __func__); in k3_r5f_split_reset()
415 dev_dbg(dev, "%s\n", __func__); in k3_r5f_lockstep_reset()
435 dev_dbg(dev, "%s\n", __func__); in k3_r5f_unprepare()
457 dev_dbg(dev, "%s\n", __func__); in k3_r5f_stop()
[all …]
/external/u-boot/drivers/pinctrl/
Dpinctrl-single.c59 dev_dbg(dev, " invalid register offset 0x%pa\n", &reg); in single_configure_pins()
76 dev_dbg(dev, " reg/val 0x%pa/0x%08x\n", &reg, val); in single_configure_pins()
93 dev_dbg(dev, " invalid register offset 0x%pa\n", &reg); in single_configure_bits()
113 dev_dbg(dev, " reg/val 0x%pa/0x%08x\n", &reg, val); in single_configure_bits()
129 dev_dbg(dev, "configuring pins for %s\n", config->name); in single_set_state()
131 dev_dbg(dev, " invalid pin configuration in fdt\n"); in single_set_state()
143 dev_dbg(dev, "configuring pins for %s\n", config->name); in single_set_state()
145 dev_dbg(dev, " invalid bits configuration in fdt\n"); in single_set_state()
174 dev_dbg(dev, "no valid base register address\n"); in single_ofdata_to_platdata()
Dpinctrl-generic.c26 dev_dbg(dev, "get_pins_count or get_pin_name missing\n"); in pinctrl_pin_name_to_selector()
57 dev_dbg(dev, "get_groups_count or get_group_name missing\n"); in pinctrl_group_name_to_selector()
89 dev_dbg(dev, in pinmux_func_name_to_selector()
123 dev_dbg(dev, "pinmux_group_set op missing\n"); in pinmux_enable_setting()
130 dev_dbg(dev, "pinmux_set op missing\n"); in pinmux_enable_setting()
166 dev_dbg(dev, "pinconf_num_params or pinconf_params missing\n"); in pinconf_prop_name_to_param()
202 dev_dbg(dev, "pinconf_group_set op missing\n"); in pinconf_enable_setting()
210 dev_dbg(dev, "pinconf_set op missing\n"); in pinconf_enable_setting()
Dpinctrl-uclass.c183 dev_dbg(dev, "%s: dev_read_phandle_with_args: err=%d\n", in pinctrl_gpio_get_pinctrl_and_offset()
191 dev_dbg(dev, in pinctrl_gpio_get_pinctrl_and_offset()
202 dev_dbg(dev, in pinctrl_gpio_get_pinctrl_and_offset()
293 dev_dbg(dev, "set_state_simple op missing\n"); in pinctrl_select_state_simple()
399 dev_dbg(dev, "ops is not set. Do not bind.\n"); in pinctrl_post_bind()
/external/u-boot/arch/arm/mach-stm32mp/
Dpwr_regulator.c83 dev_dbg(dev, "no child found\n"); in stm32mp_pwr_bind()
146 dev_dbg(dev, "found regulator %s\n", (*p)->name); in stm32mp_pwr_regulator_probe()
157 dev_dbg(dev, "regulator "); in stm32mp_pwr_regulator_probe()
160 dev_dbg(dev, "%s'%s' ", (i > 1) ? ", " : "", s); in stm32mp_pwr_regulator_probe()
161 dev_dbg(dev, "%s not supported\n", (i > 2) ? "are" : "is"); in stm32mp_pwr_regulator_probe()
180 dev_dbg(dev, "Invalid uV=%d for: %s\n", uV, uc_pdata->name); in stm32mp_pwr_regulator_set_value()
196 dev_dbg(dev, "Invalid constraints for: %s\n", uc_pdata->name); in stm32mp_pwr_regulator_get_value()
213 dev_dbg(dev, "%s id %s\n", p->name, (reg & p->enable) ? "on" : "off"); in stm32mp_pwr_regulator_get_enable()
225 dev_dbg(dev, "Turning %s %s\n", enable ? "on" : "off", p->name); in stm32mp_pwr_regulator_set_enable()
255 dev_dbg(dev, "%s: timeout\n", p->name); in stm32mp_pwr_regulator_set_enable()
/external/u-boot/drivers/i2c/
Di2c-uniphier-f.c84 dev_dbg(priv->dev, "error: device busy too long. reset...\n"); in uniphier_fi2c_check_bus_busy()
125 dev_dbg(priv->dev, "error: time out\n"); in wait_for_irq()
130 dev_dbg(priv->dev, "error: arbitration lost\n"); in wait_for_irq()
136 dev_dbg(priv->dev, "error: no answer\n"); in wait_for_irq()
147 dev_dbg(priv->dev, "stop condition\n"); in issue_stop()
152 dev_dbg(priv->dev, "error: device busy after operation\n"); in issue_stop()
164 dev_dbg(priv->dev, "%s: addr = %x, len = %d\n", __func__, addr, len); in uniphier_fi2c_transmit()
171 dev_dbg(priv->dev, "start condition\n"); in uniphier_fi2c_transmit()
179 dev_dbg(priv->dev, "sending %x\n", *buf); in uniphier_fi2c_transmit()
205 dev_dbg(priv->dev, "%s: addr = %x, len = %d\n", __func__, addr, len); in uniphier_fi2c_receive()
[all …]
Di2c-uniphier.c93 dev_dbg(priv->dev, "uniphier_i2c: bus arbitration failed\n"); in send_byte()
98 dev_dbg(priv->dev, "uniphier_i2c: slave did not return ACK\n"); in send_byte()
109 dev_dbg(priv->dev, "%s: addr = %x, len = %d\n", __func__, addr, len); in uniphier_i2c_transmit()
133 dev_dbg(priv->dev, "%s: addr = %x, len = %d\n", __func__, addr, len); in uniphier_i2c_receive()
/external/u-boot/drivers/usb/musb-new/
Dmusb_gadget.c193 dev_dbg(musb->controller, "%s done request %p, %d/%d\n", in musb_g_giveback()
197 dev_dbg(musb->controller, "%s request %p, %d/%d fault %d\n", in musb_g_giveback()
242 dev_dbg(musb->controller, "%s: abort DMA --> %d\n", in nuke()
326 dev_dbg(musb->controller, "ep:%s disabled - ignore request\n", in txstate()
333 dev_dbg(musb->controller, "dma pending...\n"); in txstate()
345 dev_dbg(musb->controller, "%s old packet still ready , txcsr %03x\n", in txstate()
351 dev_dbg(musb->controller, "%s stalling, txcsr %03x\n", in txstate()
356 dev_dbg(musb->controller, "hw_ep%d, maxpacket %d, fifo count %d, txcsr %03x\n", in txstate()
473 dev_dbg(musb->controller, "%s TX/IN %s len %d/%d, txcsr %04x, fifo %d/%d\n", in txstate()
500 dev_dbg(musb->controller, "<== %s, txcsr %04x\n", musb_ep->end_point.name, csr); in musb_g_tx()
[all …]
Dmusb_host.c100 dev_dbg(musb->controller, "Host TX FIFONOTEMPTY csr: %02x\n", csr); in musb_h_tx_flush_fifo()
228 dev_dbg(musb->controller, "qh %p urb %p dev%d ep%d%s%s, hw_ep %d, %p/%d\n", in musb_start_urb()
255 dev_dbg(musb->controller, "check whether there's still time for periodic Tx\n"); in musb_start_urb()
272 dev_dbg(musb->controller, "SOF for %d\n", epnum); in musb_start_urb()
282 dev_dbg(musb->controller, "Start TX%d %s\n", epnum, in musb_start_urb()
297 dev_dbg(musb->controller, in musb_giveback()
420 dev_dbg(musb->controller, "... next ep%d %cX urb %p\n", in musb_advance_schedule()
465 dev_dbg(musb->controller, "RX%d count %d, buffer %p len %d/%d\n", epnum, rx_count, in musb_host_packet_rx()
488 dev_dbg(musb->controller, "** OVERFLOW %d into %d\n", rx_count, length); in musb_host_packet_rx()
507 dev_dbg(musb->controller, "** OVERFLOW %d into %d\n", rx_count, length); in musb_host_packet_rx()
[all …]
Dmusb_core.c223 dev_dbg(musb->controller, "%cX ep%d fifo %p count %d buf %p\n", in musb_write_fifo()
263 dev_dbg(musb->controller, "%cX ep%d fifo %p count %d buf %p\n", in musb_read_fifo()
344 dev_dbg(musb->controller, "HNP: b_wait_acon timeout; back to b_peripheral\n"); in musb_otg_timer_func()
351 dev_dbg(musb->controller, "HNP: %s timeout\n", in musb_otg_timer_func()
357 dev_dbg(musb->controller, "HNP: Unhandled mode %s\n", in musb_otg_timer_func()
373 dev_dbg(musb->controller, "HNP: stop from %s\n", otg_state_string(musb->xceiv->state)); in musb_hnp_stop()
378 dev_dbg(musb->controller, "HNP: back to %s\n", in musb_hnp_stop()
382 dev_dbg(musb->controller, "HNP: Disabling HR\n"); in musb_hnp_stop()
392 dev_dbg(musb->controller, "HNP: Stopping in unknown state %s\n", in musb_hnp_stop()
425 dev_dbg(musb->controller, "<== Power=%02x, DevCtl=%02x, int_usb=0x%x\n", power, devctl, in musb_stage0_irq()
[all …]
Dmusb_gadget_ep0.c190 dev_dbg(musb->controller, "HNP: Setting HR\n"); in musb_try_b_hnp_enable()
287 dev_dbg(musb->controller, "restarting the request\n"); in service_zero_data_request()
532 dev_dbg(musb->controller, "odd; csr0 %04x\n", musb_readw(regs, MUSB_CSR0)); in ep0_txstate()
589 dev_dbg(musb->controller, "SETUP req%02x.%02x v%04x i%04x l%d\n", in musb_read_setup()
657 dev_dbg(musb->controller, "csr %04x, count %d, myaddr %d, ep0stage %s\n", in musb_g_ep0_irq()
736 dev_dbg(musb->controller, "entering TESTMODE\n"); in musb_g_ep0_irq()
848 dev_dbg(musb->controller, "handled %d, csr %04x, ep0stage %s\n", in musb_g_ep0_irq()
865 dev_dbg(musb->controller, "stall (%d)\n", handled); in musb_g_ep0_irq()
945 dev_dbg(musb->controller, "ep0 request queued in state %d\n", in musb_g_ep0_queue()
954 dev_dbg(musb->controller, "queue to %s (%s), length=%d\n", in musb_g_ep0_queue()
[all …]
/external/u-boot/drivers/mmc/
Dbcm2835_sdhost.c184 dev_dbg(dev, "=========== REGISTER DUMP ===========\n"); in bcm2835_dumpregs()
185 dev_dbg(dev, "SDCMD 0x%08x\n", readl(host->ioaddr + SDCMD)); in bcm2835_dumpregs()
186 dev_dbg(dev, "SDARG 0x%08x\n", readl(host->ioaddr + SDARG)); in bcm2835_dumpregs()
187 dev_dbg(dev, "SDTOUT 0x%08x\n", readl(host->ioaddr + SDTOUT)); in bcm2835_dumpregs()
188 dev_dbg(dev, "SDCDIV 0x%08x\n", readl(host->ioaddr + SDCDIV)); in bcm2835_dumpregs()
189 dev_dbg(dev, "SDRSP0 0x%08x\n", readl(host->ioaddr + SDRSP0)); in bcm2835_dumpregs()
190 dev_dbg(dev, "SDRSP1 0x%08x\n", readl(host->ioaddr + SDRSP1)); in bcm2835_dumpregs()
191 dev_dbg(dev, "SDRSP2 0x%08x\n", readl(host->ioaddr + SDRSP2)); in bcm2835_dumpregs()
192 dev_dbg(dev, "SDRSP3 0x%08x\n", readl(host->ioaddr + SDRSP3)); in bcm2835_dumpregs()
193 dev_dbg(dev, "SDHSTS 0x%08x\n", readl(host->ioaddr + SDHSTS)); in bcm2835_dumpregs()
[all …]
/external/u-boot/drivers/pci/
Dpci-aardvark.c308 dev_dbg(pcie->dev, "PCIE CFG read: (b,d,f)=(%2d,%2d,%2d) ", in pcie_advk_read_config()
312 dev_dbg(pcie->dev, "- out of range\n"); in pcie_advk_read_config()
346 dev_dbg(pcie->dev, "(addr,size,val)=(0x%04x, %d, 0x%08x)\n", in pcie_advk_read_config()
404 dev_dbg(pcie->dev, "PCIE CFG write: (b,d,f)=(%2d,%2d,%2d) ", in pcie_advk_write_config()
406 dev_dbg(pcie->dev, "(addr,size,val)=(0x%04x, %d, 0x%08lx)\n", in pcie_advk_write_config()
410 dev_dbg(pcie->dev, "- out of range\n"); in pcie_advk_write_config()
431 dev_dbg(pcie->dev, "\tPIO req. - addr = 0x%08x\n", reg); in pcie_advk_write_config()
436 dev_dbg(pcie->dev, "\tPIO req. - val = 0x%08x\n", reg); in pcie_advk_write_config()
441 dev_dbg(pcie->dev, "\tPIO req. - strb = 0x%02x\n", reg); in pcie_advk_write_config()
447 dev_dbg(pcie->dev, "- wait pio timeout\n"); in pcie_advk_write_config()
[all …]
/external/u-boot/drivers/core/
Dsyscon-uclass.c67 dev_dbg(dev, "invalid compatible for syscon device\n"); in syscon_probe_by_ofnode()
80 dev_dbg(dev, "unable to bound syscon device\n"); in syscon_probe_by_ofnode()
85 dev_dbg(dev, "unable to probe syscon device\n"); in syscon_probe_by_ofnode()
112 dev_dbg(dev, "unable to find syscon device\n"); in syscon_regmap_lookup_by_phandle()
122 dev_dbg(dev, "unable to find regmap\n"); in syscon_regmap_lookup_by_phandle()
210 dev_dbg(dev, "unable to find regmap\n"); in syscon_node_to_regmap()
/external/u-boot/drivers/usb/cdns3/
Ddrd.c43 dev_dbg(cdns->dev, "Set controller to OTG mode\n"); in cdns3_set_mode()
74 dev_dbg(cdns->dev, "OTG ID: %d", id); in cdns3_get_id()
84 dev_dbg(cdns->dev, "OTG VBUS: %d", vbus); in cdns3_get_vbus()
126 dev_dbg(cdns->dev, "Waiting till Host mode is turned on\n"); in cdns3_drd_switch_host()
163 dev_dbg(cdns->dev, "Waiting till Device mode is turned on\n"); in cdns3_drd_switch_gadget()
282 dev_dbg(cdns->dev, "Controller strapped to HOST\n"); in cdns3_drd_init()
285 dev_dbg(cdns->dev, "Controller strapped to PERIPHERAL\n"); in cdns3_drd_init()
/external/u-boot/drivers/mtd/spi/
Dspi-nor-tiny.c57 dev_dbg(&flash->spimem->spi->dev, "error %d reading %x\n", ret, in spi_nor_read_reg()
124 dev_dbg(nor->dev, "error %d reading CR\n", ret); in read_cr()
365 dev_dbg(nor->dev, "error %d reading JEDEC ID\n", tmp); in spi_nor_read_id()
376 dev_dbg(nor->dev, "unrecognized JEDEC id bytes: %02x, %02x, %02x\n", in spi_nor_read_id()
387 dev_dbg(nor->dev, "from 0x%08x, len %zd\n", (u32)from, len); in spi_nor_read()
477 dev_dbg(nor->dev, in write_sr_cr()
484 dev_dbg(nor->dev, in write_sr_cr()
513 dev_dbg(dev, "error while reading configuration register\n"); in spansion_read_cr_quad_enable()
525 dev_dbg(dev, "error while reading status register\n"); in spansion_read_cr_quad_enable()
537 dev_dbg(nor->dev, "Spansion Quad bit not set\n"); in spansion_read_cr_quad_enable()
[all …]
/external/u-boot/drivers/pinctrl/nxp/
Dpinctrl-imx.c30 dev_dbg(dev, "%s: %s\n", __func__, config->name); in imx_pinctrl_set_state()
97 dev_dbg(dev, "mux_reg 0x%x, conf_reg 0x%x, " in imx_pinctrl_set_state()
117 dev_dbg(dev, "write mux: offset 0x%x val 0x%x\n", in imx_pinctrl_set_state()
167 dev_dbg(dev, "select_input: offset 0x%x val " in imx_pinctrl_set_state()
182 dev_dbg(dev, "write config: offset 0x%x val " in imx_pinctrl_set_state()
250 dev_dbg(dev, "initialized IMX pinctrl driver\n"); in imx_pinctrl_probe()
/external/u-boot/drivers/w1-eeprom/
Dds2502.c86 dev_dbg(dev, "Error %d reading command CRC\n", ret); in ds2502_read()
91 dev_dbg(dev, in ds2502_read()
101 dev_dbg(dev, "Error %d reading data\n", ret); in ds2502_read()
111 dev_dbg(dev, "Bad CRC8 got=%02X exp=%02X pos=%04X\n", in ds2502_read()
195 dev_dbg(dev, "page logical %d => physical %d\n", i, page); in ds2502_read_buf()
/external/u-boot/net/
Dmdio-uclass.c144 dev_dbg(dev, "can't find PHY node\n"); in dm_eth_connect_phy_handle()
153 dev_dbg(ethdev, "missing reg property in phy node\n"); in dm_eth_connect_phy_handle()
160 dev_dbg(dev, "can't find MDIO bus for node %s\n", in dm_eth_connect_phy_handle()
197 dev_dbg(ethdev, "can't find interface mode, default to NONE\n"); in dm_eth_phy_connect()
/external/u-boot/drivers/hwspinlock/
Dhwspinlock-uclass.c48 dev_dbg(dev, "%s: dev_read_phandle_with_args: err=%d\n", in hwspinlock_get_by_index()
56 dev_dbg(dev, in hwspinlock_get_by_index()
71 dev_dbg(dev, "of_xlate() failed: %d\n", ret); in hwspinlock_get_by_index()
/external/u-boot/drivers/gpio/
D74x164_gpio.c153 dev_dbg(dev, "No registers-default property\n"); in gen_74x164_probe()
158 dev_dbg(dev, "No oe-pins property\n"); in gen_74x164_probe()
168 dev_dbg(dev, "%s is ready\n", dev->name); in gen_74x164_probe()

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