/external/u-boot/drivers/mtd/nand/raw/ |
D | omap_gpmc.c | 592 uint32_t *eccpos = chip->ecc.layout->eccpos; in omap_read_page_bch() local 599 oob_pos = (eccsize * eccsteps) + chip->ecc.layout->eccpos[0]; in omap_read_page_bch() 600 oob += chip->ecc.layout->eccpos[0]; in omap_read_page_bch() 620 ecc_code[i] = chip->oob_poi[eccpos[i]]; in omap_read_page_bch() 751 ecclayout->eccpos[i] = i + 2; in omap_select_ecc_scheme() 753 ecclayout->eccpos[i] = i + 1; in omap_select_ecc_scheme() 786 ecclayout->eccpos[0] = BADBLOCK_MARKER_LENGTH; in omap_select_ecc_scheme() 789 ecclayout->eccpos[i] = in omap_select_ecc_scheme() 790 ecclayout->eccpos[i - 1] + 1; in omap_select_ecc_scheme() 792 ecclayout->eccpos[i] = in omap_select_ecc_scheme() [all …]
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D | zynq_nand.c | 178 .eccpos = {0, 1, 2}, 186 .eccpos = { 197 .eccpos = { 568 u32 *eccpos = chip->ecc.layout->eccpos; in zynq_nand_write_page_hwecc() local 591 chip->oob_poi[eccpos[i]] = ~(ecc_calc[i]); in zynq_nand_write_page_hwecc() 628 u32 *eccpos = chip->ecc.layout->eccpos; in zynq_nand_write_page_swecc() local 635 chip->oob_poi[eccpos[i]] = ecc_calc[i]; in zynq_nand_write_page_swecc() 661 u32 *eccpos = chip->ecc.layout->eccpos; in zynq_nand_read_page_hwecc() local 701 ecc_code[i] = ~(chip->oob_poi[eccpos[i]]); in zynq_nand_read_page_hwecc() 734 u32 *eccpos = chip->ecc.layout->eccpos; in zynq_nand_read_page_swecc() local [all …]
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D | davinci_nand.c | 268 .eccpos = { 278 .eccpos = { 291 .eccpos = { 311 .eccpos = { 325 .eccpos = { 428 uint32_t *eccpos; in nand_davinci_read_page_hwecc() local 440 eccpos = chip->ecc.layout->eccpos; in nand_davinci_read_page_hwecc() 448 ecc_code[i] = chip->oob_poi[eccpos[i]]; in nand_davinci_read_page_hwecc()
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D | lpc32xx_nand_slc.c | 76 .eccpos = { 10, 11, 12, 13, 14, 15, }, 420 uint32_t *eccpos = chip->ecc.layout->eccpos; in lpc32xx_read_page_hwecc() local 436 ecc_code[i] = chip->oob_poi[eccpos[i]]; in lpc32xx_read_page_hwecc() 458 uint32_t *eccpos = chip->ecc.layout->eccpos; in lpc32xx_write_page_hwecc() local 472 chip->oob_poi[eccpos[i]] = ecc_calc[i]; in lpc32xx_write_page_hwecc()
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D | atmel_nand.c | 99 layout->eccpos[i] = oobsize - ecc_len + i; in pmecc_config_ecc_layout() 470 pos = tmp + nand_chip->ecc.layout->eccpos[0]; in pmecc_correct_data() 534 uint32_t *eccpos = chip->ecc.layout->eccpos; in atmel_nand_pmecc_read_page() local 563 if (pmecc_correction(mtd, stat, buf, &oob[eccpos[0]]) != 0) in atmel_nand_pmecc_read_page() 574 uint32_t *eccpos = chip->ecc.layout->eccpos; in atmel_nand_pmecc_write_page() local 606 chip->oob_poi[eccpos[pos]] = in atmel_nand_pmecc_write_page() 672 pmecc_writel(host->pmecc, saddr, ecc_layout->eccpos[0]); in atmel_pmecc_core_init() 674 ecc_layout->eccpos[ecc_layout->eccbytes - 1]); in atmel_pmecc_core_init() 964 .eccpos = {60, 61, 62, 63}, 977 .eccpos = {0, 1, 2, 3}, [all …]
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D | fsmc_nand.c | 31 .eccpos = { 2, 3, 4, 5, 6, 7, 8, 67 .eccpos = { 2, 3, 4, 5, 6, 7, 8, 120 .eccpos = { 0, 1, 2, 3, 6, 7, 8, 137 .eccpos = {2, 3, 4, 18, 19, 20, 34, 35, 36, 50, 51, 52,
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D | nand_base.c | 53 .eccpos = {0, 1, 2}, 63 .eccpos = {0, 1, 2, 3, 6, 7}, 71 .eccpos = { 82 .eccpos = { 1860 uint32_t *eccpos = chip->ecc.layout->eccpos; in nand_read_page_swecc() local 1869 ecc_code[i] = chip->oob_poi[eccpos[i]]; in nand_read_page_swecc() 1902 uint32_t *eccpos = chip->ecc.layout->eccpos; in nand_read_subpage() local 1940 if (eccpos[i + index] + 1 != eccpos[i + index + 1]) { in nand_read_subpage() 1956 aligned_pos = eccpos[index] & ~(busw - 1); in nand_read_subpage() 1958 if (eccpos[index] & (busw - 1)) in nand_read_subpage() [all …]
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D | fsl_ifc_nand.c | 65 .eccpos = {8, 9, 10, 11, 12, 13, 14, 15}, 72 .eccpos = {8, 9, 10, 11, 12, 13, 14, 15}, 79 .eccpos = { 91 .eccpos = { 107 .eccpos = { 131 .eccpos = { 155 .eccpos = {
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D | fsl_elbc_nand.c | 82 .eccpos = {6, 7, 8}, 89 .eccpos = {8, 9, 10}, 96 .eccpos = {6, 7, 8, 22, 23, 24, 38, 39, 40, 54, 55, 56}, 103 .eccpos = {8, 9, 10, 24, 25, 26, 40, 41, 42, 56, 57, 58},
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D | pxa3xx_nand.c | 319 .eccpos = { 329 .eccpos = { 343 .eccpos = { 358 .eccpos = { 385 .eccpos = { 395 .eccpos = {},
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D | nand_bch.c | 173 layout->eccpos[i] = mtd->oobsize-layout->eccbytes+i; in nand_bch_init()
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D | mxc_nand.c | 53 .eccpos = {6, 7, 8, 9, 10}, 59 .eccpos = { 72 .eccpos = {7, 8, 9, 10, 11, 12, 13, 14, 15}, 78 .eccpos = {
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D | vf610_nfc.c | 168 .eccpos = {19, 20, 21, 22, 23, 183 .eccpos = { 4, 5, 6, 7, 8, 9, 10, 11,
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D | lpc32xx_nand_mlc.c | 202 .eccpos = {24, 25, 26, 27, 28, 29, 30, 31, 32, 33,
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D | arasan_nfc.c | 215 .eccpos = { 1174 nand_oob.eccpos[i] = eccpos_start + i; in arasan_nand_ecc_init()
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D | sunxi_nand.c | 1498 layout->eccpos[(ecc->bytes * i) + j] = in sunxi_nand_hw_ecc_ctrl_init() 1535 layout->eccpos[i] = i; in sunxi_nand_hw_syndrome_ecc_ctrl_init()
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D | tegra_nand.c | 51 .eccpos = {
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D | stm32_fmc2_nand.c | 1020 ecclayout->eccpos[i] = oob_index; in stm32_fmc2_probe()
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/external/strace/ |
D | mtd.c | 197 for (i = 0; i < ARRAY_SIZE(ninfo.eccpos); ++i) { in decode_nand_oobinfo() 200 tprintf("%#x", ninfo.eccpos[i]); in decode_nand_oobinfo() 217 for (i = 0; i < ARRAY_SIZE(nlay.eccpos); ++i) { in decode_nand_ecclayout_user() 220 tprintf("%#x", nlay.eccpos[i]); in decode_nand_ecclayout_user()
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/external/kernel-headers/original/uapi/mtd/ |
D | mtd-abi.h | 216 __u32 eccpos[32]; member 236 __u32 eccpos[MTD_MAX_ECCPOS_ENTRIES]; member
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/external/u-boot/include/mtd/ |
D | mtd-abi.h | 205 __u32 eccpos[32]; member 225 __u32 eccpos[MTD_MAX_ECCPOS_ENTRIES]; member
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/external/u-boot/doc/ |
D | README.omap3 | 159 * CONFIG_SYS_NAND_ECCPOS (must be the same as .eccpos in
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/external/u-boot/drivers/mtd/nand/raw/brcmnand/ |
D | brcmnand.c | 931 layout->eccpos[idx1++] = i * sas + 6; in brcmnand_create_layout() 932 layout->eccpos[idx1++] = i * sas + 7; in brcmnand_create_layout() 933 layout->eccpos[idx1++] = i * sas + 8; in brcmnand_create_layout() 964 layout->eccpos[idx1] = i * sas + j; in brcmnand_create_layout()
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/external/u-boot/include/linux/mtd/ |
D | mtd.h | 144 __u32 eccpos[MTD_MAX_ECCPOS_ENTRIES_LARGE]; member
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/external/u-boot/drivers/mtd/onenand/ |
D | onenand_base.c | 52 .eccpos = { 72 .eccpos = { 89 .eccpos = {
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