/external/u-boot/board/freescale/p1022ds/ |
D | diu.c | 67 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in diu_set_pixel_clock() local 78 temp = in_be32(&gur->clkdvdr) & 0x2000FFFF; in diu_set_pixel_clock() 79 out_be32(&gur->clkdvdr, temp); /* turn off clock */ in diu_set_pixel_clock() 80 out_be32(&gur->clkdvdr, temp | 0x80000000 | ((pixval & 0x1F) << 16)); in diu_set_pixel_clock() 85 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in platform_diu_init() local 191 clrsetbits_be32(&gur->pmuxcr, PMUXCR_ELBCDIU_MASK, PMUXCR_ELBCDIU_DIU); in platform_diu_init() 192 pmuxcr = in_be32(&gur->pmuxcr); in platform_diu_init() 214 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; in set_mux_to_lbc() local 217 if ((in_be32(&gur->pmuxcr) & PMUXCR_ELBCDIU_MASK) != in set_mux_to_lbc() 233 out_be32(&gur->pmuxcr, (pmuxcr & ~PMUXCR_ELBCDIU_MASK) | in set_mux_to_lbc() [all …]
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D | p1022ds.c | 34 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; in board_early_init_f() local 37 setbits_be32(&gur->pmuxcr, 0x1000); in board_early_init_f() 39 setbits_be32(&gur->pmuxcr, in board_early_init_f() 40 in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA); in board_early_init_f() 44 in_be32(&gur->pmuxcr); in board_early_init_f() 47 clrbits_be32(&gur->pmuxcr2, 0x001F8000); in board_early_init_f() 108 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in misc_init_r() local 128 clrsetbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_ETSECUSB_MASK, in misc_init_r() 141 clrsetbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_TDM_MASK, in misc_init_r() 145 clrsetbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SPI_MASK, in misc_init_r() [all …]
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/external/u-boot/arch/powerpc/cpu/mpc85xx/ |
D | fsl_corenet_serdes.c | 109 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in serdes_lane_enabled() local 129 return !(in_be32(&gur->rcwsr[word]) & (0x80000000 >> bit)); in serdes_lane_enabled() 134 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in is_serdes_configured() local 137 if (!(in_be32(&gur->rcwsr[5]) & FSL_CORENET_RCWSR5_SRDS_EN)) in is_serdes_configured() 168 const ccsr_gur_t *gur; in serdes_get_first_lane() local 170 gur = (typeof(gur))CONFIG_SYS_MPC85xx_GUTS_ADDR; in serdes_get_first_lane() 173 if (unlikely((in_be32(&gur->rcwsr[5]) & 0x2000) == 0)) in serdes_get_first_lane() 176 prtcl = (in_be32(&gur->rcwsr[4]) & FSL_CORENET_RCWSR4_SRDS_PRTCL) >> 26; in serdes_get_first_lane() 246 const ccsr_gur_t *gur; in serdes_reset_rx() local 252 gur = (typeof(gur))CONFIG_SYS_MPC85xx_GUTS_ADDR; in serdes_reset_rx() [all …]
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D | mp.c | 87 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in cpu_disable() local 89 setbits_be32(&gur->coredisrl, 1 << nr); in cpu_disable() 95 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in is_core_disabled() local 96 u32 coredisrl = in_be32(&gur->coredisrl); in is_core_disabled() 103 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in cpu_disable() local 107 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_CPU0); in cpu_disable() 110 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_CPU1); in cpu_disable() 121 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in is_core_disabled() local 122 u32 devdisr = in_be32(&gur->devdisr); in is_core_disabled() 256 volatile ccsr_gur_t *gur; in plat_mp_up() local [all …]
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/external/u-boot/drivers/net/fm/ |
D | p1023.c | 19 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in is_device_disabled() local 20 u32 devdisr = in_be32(&gur->devdisr); in is_device_disabled() 27 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_disable_port() local 33 setbits_be32(&gur->devdisr, port_to_devdisr[port]); in fman_disable_port() 38 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_enable_port() local 40 clrbits_be32(&gur->devdisr, port_to_devdisr[port]); in fman_enable_port() 45 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_port_enet_if() local 46 u32 pordevsr = in_be32(&gur->pordevsr); in fman_port_enet_if()
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D | p5020.c | 23 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in is_device_disabled() local 24 u32 devdisr2 = in_be32(&gur->devdisr2); in is_device_disabled() 31 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_disable_port() local 37 setbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_disable_port() 42 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_enable_port() local 44 clrbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_enable_port() 49 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_port_enet_if() local 50 u32 rcwsr11 = in_be32(&gur->rcwsr[11]); in fman_port_enet_if()
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D | p4080.c | 27 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in is_device_disabled() local 28 u32 devdisr2 = in_be32(&gur->devdisr2); in is_device_disabled() 35 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_disable_port() local 41 setbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_disable_port() 46 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_enable_port() local 48 clrbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_enable_port() 53 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_port_enet_if() local 54 u32 rcwsr11 = in_be32(&gur->rcwsr[11]); in fman_port_enet_if()
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D | p5040.c | 29 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in is_device_disabled() local 30 u32 devdisr2 = in_be32(&gur->devdisr2); in is_device_disabled() 37 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_disable_port() local 43 setbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_disable_port() 48 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_enable_port() local 50 clrbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_enable_port() 55 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_port_enet_if() local 56 u32 rcwsr11 = in_be32(&gur->rcwsr[11]); in fman_port_enet_if()
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D | b4860.c | 28 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in is_device_disabled() local 29 u32 devdisr2 = in_be32(&gur->devdisr2); in is_device_disabled() 36 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_disable_port() local 38 setbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_disable_port() 43 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_enable_port() local 45 clrbits_be32(&gur->devdisr2, port_to_devdisr[port]); in fman_enable_port() 54 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in fman_port_enet_if() local 73 serdes2_prtcl = in_be32(&gur->rcwsr[4]) & in fman_port_enet_if()
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/external/u-boot/board/xes/common/ |
D | fsl_8xxx_pci.c | 29 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in pci_init_board() local 30 u32 devdisr = in_be32(&gur->devdisr); in pci_init_board() 31 uint pci_spd_norm = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_SPD; in pci_init_board() 32 uint pci_32 = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_PCI32; in pci_init_board() 33 uint pci_arb = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_ARB; in pci_init_board() 34 uint pcix = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1; in pci_init_board() 59 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in pci_init_board() local 61 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); in pci_init_board()
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D | fsl_8xxx_clk.c | 15 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in get_board_sys_clk() local 18 volatile ccsr_gur_t *gur = &immap->im_gur; in get_board_sys_clk() 21 if (in_be32(&gur->gpporcr) & 0x10000) in get_board_sys_clk() 38 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in get_board_ddr_clk() local 39 u32 ddr_ratio = (in_be32(&gur->porpllsr) & 0x00003e00) >> 9; in get_board_ddr_clk() 45 if (in_be32(&gur->gpporcr) & 0x20000) in get_board_ddr_clk()
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/external/u-boot/drivers/net/ldpaa_eth/ |
D | ls1088a.c | 28 struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR; in is_device_disabled() local 29 u32 devdisr2 = in_le32(&gur->devdisr2); in is_device_disabled() 36 struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR; in wriop_dpmac_disable() local 38 setbits_le32(&gur->devdisr2, dpmac_to_devdisr[dpmac_id]); in wriop_dpmac_disable() 43 struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR; in wriop_dpmac_enable() local 45 clrbits_le32(&gur->devdisr2, dpmac_to_devdisr[dpmac_id]); in wriop_dpmac_enable() 93 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); in fsl_rgmii_init() local 97 ec = gur_in32(&gur->rcwsr[FSL_CHASSIS3_EC1_REGSR]) in fsl_rgmii_init() 106 ec = gur_in32(&gur->rcwsr[FSL_CHASSIS3_EC2_REGSR]) in fsl_rgmii_init()
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D | lx2160a.c | 36 struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR; in is_device_disabled() local 37 u32 devdisr2 = in_le32(&gur->devdisr2); in is_device_disabled() 44 struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR; in wriop_dpmac_disable() local 46 setbits_le32(&gur->devdisr2, dpmac_to_devdisr[dpmac_id]); in wriop_dpmac_disable() 51 struct ccsr_gur __iomem *gur = (void *)CONFIG_SYS_FSL_GUTS_ADDR; in wriop_dpmac_enable() local 53 clrbits_le32(&gur->devdisr2, dpmac_to_devdisr[dpmac_id]); in wriop_dpmac_enable() 87 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); in fsl_rgmii_init() local 91 ec = gur_in32(&gur->rcwsr[FSL_CHASSIS3_EC1_REGSR - 1]) in fsl_rgmii_init() 100 ec = gur_in32(&gur->rcwsr[FSL_CHASSIS3_EC2_REGSR - 1]) in fsl_rgmii_init()
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/external/u-boot/board/freescale/bsc9131rdb/ |
D | bsc9131rdb.c | 28 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; in board_early_init_f() local 30 clrbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_CTS_B0_GPIO42); in board_early_init_f() 31 setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_CTS_B0_DSP_TMS); in board_early_init_f() 33 clrbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_RTS_B0_GPIO43); in board_early_init_f() 34 setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_RTS_B0_DSP_TCK | in board_early_init_f() 36 setbits_be32(&gur->halt_req_mask, HALTED_TO_HALT_REQ_MASK_0); in board_early_init_f() 37 clrsetbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_IFC_AD_GPIO_MASK | in board_early_init_f()
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/external/u-boot/board/freescale/p1_p2_rdb_pc/ |
D | spl.c | 29 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; in board_init_f() local 34 setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000); in board_init_f() 35 setbits_be32(&gur->pmuxcr, in board_init_f() 36 in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA); in board_init_f() 39 in_be32(&gur->pmuxcr); in board_init_f() 42 clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA); in board_init_f() 46 plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; in board_init_f()
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/external/u-boot/board/Arcturus/ucp1020/ |
D | spl.c | 37 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; in board_init_f() local 42 setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000); in board_init_f() 43 setbits_be32(&gur->pmuxcr, in board_init_f() 44 in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA); in board_init_f() 47 in_be32(&gur->pmuxcr); in board_init_f() 50 clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA); in board_init_f() 54 plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; in board_init_f()
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/external/u-boot/board/gdsys/p1022/ |
D | diu.c | 49 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in diu_set_pixel_clock() local 60 temp = in_be32(&gur->clkdvdr) & 0x2000FFFF; in diu_set_pixel_clock() 61 out_be32(&gur->clkdvdr, temp); /* turn off clock */ in diu_set_pixel_clock() 62 out_be32(&gur->clkdvdr, temp | 0x80000000 | ((pixval & 0x1F) << 16)); in diu_set_pixel_clock() 67 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in platform_diu_init() local 79 clrsetbits_be32(&gur->pmuxcr, PMUXCR_ELBCDIU_MASK, PMUXCR_ELBCDIU_DIU); in platform_diu_init() 80 pmuxcr = in_be32(&gur->pmuxcr); in platform_diu_init()
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D | controlcenterd.c | 75 ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR; in board_early_init_f() local 79 clrsetbits_be32(&gur->pmuxcr, 0x00600000, 0x80000000); in board_early_init_f() 82 setbits_be32(&gur->pmuxcr, 0x00001000); in board_early_init_f() 85 setbits_be32(&gur->pmuxcr, 0x00000010); in board_early_init_f() 88 setbits_be32(&gur->pmuxcr, 0x00000020); in board_early_init_f() 91 setbits_be32(&gur->pmuxcr, 0x000000c0); in board_early_init_f() 94 setbits_be32(&gur->pmuxcr2, 0x03000000); in board_early_init_f() 97 clrbits_be32(&gur->pmuxcr, 0x00000300); in board_early_init_f() 100 setbits_be32(&gur->pmuxcr, 0x000000F0); in board_early_init_f() 103 in_be32(&gur->pmuxcr); in board_early_init_f() [all …]
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/external/u-boot/board/freescale/mpc8569mds/ |
D | mpc8569mds.c | 187 volatile struct ccsr_gur *gur; in board_early_init_f() local 188 gur = (struct ccsr_gur *)(CONFIG_SYS_IMMR + 0xe0000); in board_early_init_f() 189 gur->plppar1 &= ~PLPPAR1_I2C_BIT_MASK; in board_early_init_f() 190 gur->plppar1 |= PLPPAR1_I2C2_VAL; in board_early_init_f() 191 gur->plpdir1 &= ~PLPDIR1_I2C_BIT_MASK; in board_early_init_f() 192 gur->plpdir1 |= PLPDIR1_I2C2_VAL; in board_early_init_f() 288 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in local_bus_init() local 297 out_be32(&gur->lbiuiplldcr1, 0x00078080); in local_bus_init() 299 out_be32(&gur->lbiuiplldcr0, 0x7c0f1bf0); in local_bus_init() 301 out_be32(&gur->lbiuiplldcr0, 0x6c0f1bf0); in local_bus_init() [all …]
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/external/u-boot/board/freescale/mpc8548cds/ |
D | mpc8548cds.c | 33 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in checkboard() local 55 gur->tsec34ioovcr = 0xe7e0; /* 1110 0111 1110 0xxx */ in checkboard() 68 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in local_bus_init() local 77 gur->lbiuiplldcr1 = 0x00078080; in local_bus_init() 79 gur->lbiuiplldcr0 = 0x7c0f1bf0; in local_bus_init() 81 gur->lbiuiplldcr0 = 0x6c0f1bf0; in local_bus_init() 83 gur->lbiuiplldcr0 = 0x5c0f1bf0; in local_bus_init() 197 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in pci_init_board() local 204 devdisr = in_be32(&gur->devdisr); in pci_init_board() 205 pordevsr = in_be32(&gur->pordevsr); in pci_init_board() [all …]
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/external/u-boot/board/sbc8548/ |
D | sbc8548.c | 58 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in local_bus_init() local 71 out_be32(&gur->lbiuiplldcr1, 0x00078080); in local_bus_init() 73 out_be32(&gur->lbiuiplldcr0, 0x7c0f1bf0); in local_bus_init() 75 out_be32(&gur->lbiuiplldcr0, 0x6c0f1bf0); in local_bus_init() 77 out_be32(&gur->lbiuiplldcr0, 0x5c0f1bf0); in local_bus_init() 244 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in pci_init_board() local 249 u32 devdisr = in_be32(&gur->devdisr); in pci_init_board() 250 u32 pordevsr = in_be32(&gur->pordevsr); in pci_init_board() 251 u32 porpllsr = in_be32(&gur->porpllsr); in pci_init_board() 280 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); /* disable */ in pci_init_board() [all …]
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/external/u-boot/board/freescale/bsc9132qds/ |
D | bsc9132qds.c | 49 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in board_config_serdes_mux() local 50 u32 pordevsr = in_be32(&gur->pordevsr); in board_config_serdes_mux() 275 ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in misc_init_r() local 276 u32 porbmsr = in_be32(&gur->porbmsr); in misc_init_r() 292 clrbits_be32(&gur->pmuxcr3, in misc_init_r() 294 setbits_be32(&gur->pmuxcr3, MPC85xx_PMUXCR3_UART2_SEL); in misc_init_r() 312 clrbits_be32(&gur->pmuxcr, in misc_init_r() 314 setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR0_SIM_SEL); in misc_init_r() 326 clrbits_be32(&gur->pmuxcr3, in misc_init_r() 328 setbits_be32(&gur->pmuxcr3, MPC85xx_PMUXCR3_UART3_SEL); in misc_init_r() [all …]
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/external/u-boot/board/freescale/mpc8568mds/ |
D | mpc8568mds.c | 130 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in local_bus_init() local 139 gur->lbiuiplldcr1 = 0x00078080; in local_bus_init() 141 gur->lbiuiplldcr0 = 0x7c0f1bf0; in local_bus_init() 143 gur->lbiuiplldcr0 = 0x6c0f1bf0; in local_bus_init() 145 gur->lbiuiplldcr0 = 0x5c0f1bf0; in local_bus_init() 293 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in pci_init_board() local 300 devdisr = in_be32(&gur->devdisr); in pci_init_board() 301 pordevsr = in_be32(&gur->pordevsr); in pci_init_board() 302 porpllsr = in_be32(&gur->porpllsr); in pci_init_board() 340 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); /* disable */ in pci_init_board()
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/external/u-boot/arch/arm/cpu/armv8/fsl-layerscape/ |
D | mp.c | 45 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); in wake_secondary_core_n() local 54 gur_out32(&gur->scratchrw[6], mpidr); in wake_secondary_core_n() 63 while (gur_in32(&gur->scratchrw[6]) != 0) in wake_secondary_core_n() 70 struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); in fsl_layerscape_wake_seconday_cores() local 101 gur_out32(&gur->bootlocptrh, (u32)(gd->relocaddr >> 32)); in fsl_layerscape_wake_seconday_cores() 102 gur_out32(&gur->bootlocptrl, (u32)gd->relocaddr); in fsl_layerscape_wake_seconday_cores() 104 svr = gur_in32(&gur->svr); in fsl_layerscape_wake_seconday_cores() 107 gur_out32(&gur->scratchrw[6], 1); in fsl_layerscape_wake_seconday_cores() 117 cluster = in_le32(&gur->tp_cluster[i].lower); in fsl_layerscape_wake_seconday_cores() 126 cluster = in_le32(&gur->tp_cluster[i].lower); in fsl_layerscape_wake_seconday_cores() [all …]
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/external/u-boot/board/freescale/mpc8544ds/ |
D | mpc8544ds.c | 28 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in checkboard() local 34 if ((uint)&gur->porpllsr != 0xe00e0000) { in checkboard() 35 printf("immap size error %lx\n",(ulong)&gur->porpllsr); in checkboard() 66 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); in pci_init_board() local 74 devdisr = in_be32(&gur->devdisr); in pci_init_board() 75 pordevsr = in_be32(&gur->pordevsr); in pci_init_board() 76 porpllsr = in_be32(&gur->porpllsr); in pci_init_board() 118 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE3); /* disable */ in pci_init_board() 125 setbits_be32(&gur->devdisr, _DEVDISR_PCIE1); /* disable */ in pci_init_board() 132 setbits_be32(&gur->devdisr, _DEVDISR_PCIE2); /* disable */ in pci_init_board() [all …]
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