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Searched refs:gur_in32 (Results 1 – 14 of 14) sorted by relevance

/external/u-boot/board/freescale/common/
Dfsl_chain_of_trust.c37 #define gur_in32(a) in_le32(a) macro
39 #define gur_in32(a) in_be32(a) macro
55 val = gur_in32(&gur->rcwsr[RCW_SB_EN_REG_INDEX - 1]) & RCW_SB_EN_MASK; in fsl_check_boot_mode_secure()
62 val = gur_in32(&gur->pordevsr2) & MPC85xx_PORDEVSR2_SBC_MASK; in fsl_check_boot_mode_secure()
/external/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
Dfsl_lsch3_serdes.c92 cfg = gur_in32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]); in serdes_get_first_lane()
99 cfg = gur_in32(&gur->rcwsr[FSL_CHASSIS3_SRDS2_REGSR - 1]); in serdes_get_first_lane()
106 cfg = gur_in32(&gur->rcwsr[FSL_CHASSIS3_SRDS3_REGSR - 1]); in serdes_get_first_lane()
142 cfg = gur_in32(&gur->rcwsr[rcwsr - 1]) & sd_prctl_mask; in serdes_init()
397 u32 cfg_rcwsrds1 = gur_in32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]); in setup_serdes_volt()
401 u32 cfg_rcwsrds2 = gur_in32(&gur->rcwsr[FSL_CHASSIS3_SRDS2_REGSR - 1]); in setup_serdes_volt()
406 u32 cfg_rcwsrds3 = gur_in32(&gur->rcwsr[FSL_CHASSIS3_SRDS3_REGSR - 1]); in setup_serdes_volt()
Dfsl_lsch3_speed.c92 sys_info->freq_systembus *= (gur_in32(&gur->rcwsr[0]) >> in get_sys_info()
95 sys_info->freq_ddrbus *= (gur_in32(&gur->rcwsr[0]) >> in get_sys_info()
100 sys_info->freq_ddrbus2 *= (gur_in32(&gur->rcwsr[0]) >> in get_sys_info()
Dfsl_lsch2_serdes.c42 u32 cfg = gur_in32(&gur->rcwsr[4]); in serdes_get_first_lane()
78 u32 cfg = gur_in32(&gur->rcwsr[4]) & in get_serdes_protocol()
111 cfg = gur_in32(&gur->rcwsr[4]) & sd_prctl_mask; in serdes_init()
148 u32 cfg_rcw4 = gur_in32(&gur->rcwsr[4]); in setup_serdes_volt()
149 u32 cfg_rcw5 = gur_in32(&gur->rcwsr[5]); in setup_serdes_volt()
Dcpu.c394 svr = gur_in32(&gur->svr); in cpu_name()
458 svr = gur_in32(&gur->svr); in fix_pcie_mmu_map()
859 type = gur_in32(&gur->tp_ityp[idx]); in initiator_type()
875 cluster = gur_in32(&gur->tp_cluster[i].lower); in cpu_pos_mask()
896 cluster = gur_in32(&gur->tp_cluster[i].lower); in cpu_mask()
929 cluster = gur_in32(&gur->tp_cluster[i].lower); in fsl_qoriq_core_to_cluster()
953 cluster = gur_in32(&gur->tp_cluster[i].lower); in fsl_qoriq_core_to_type()
973 return gur_in32(&gur->svr); in get_svr()
984 u32 type, rcw, svr = gur_in32(&gur->svr); in print_cpuinfo()
1025 rcw = gur_in32(&gur->rcwsr[i]); in print_cpuinfo()
Dfsl_lsch2_speed.c69 sys_info->freq_systembus *= (gur_in32(&gur->rcwsr[0]) >> in get_sys_info()
76 sys_info->freq_ddrbus *= (gur_in32(&gur->rcwsr[0]) >> in get_sys_info()
Dfdt.c174 val = gur_in32(&gur->svr); in fdt_fixup_gic()
356 rev = gur_in32(&gur->svr); in fdt_fixup_msi()
427 unsigned int svr = gur_in32(&gur->svr); in ft_cpu_setup()
Dmp.c63 while (gur_in32(&gur->scratchrw[6]) != 0) in wake_secondary_core_n()
104 svr = gur_in32(&gur->svr); in fsl_layerscape_wake_seconday_cores()
Dsoc.c38 u32 svr = gur_in32(&gur->svr); in soc_has_dp_ddr()
52 u32 svr = gur_in32(&gur->svr); in soc_has_aiop()
397 u32 rstrqmr1 = gur_in32(&gur->rstrqmr1); in erratum_a009929()
/external/u-boot/board/freescale/lx2160a/
Dlx2160a.c205 sdhc1_base_pmux = gur_in32(&gur->rcwsr[FSL_CHASSIS3_RCWSR12_REGSR - 1]) in esdhc_dspi_status_fixup()
224 sdhc2_base_pmux = gur_in32(&gur->rcwsr[FSL_CHASSIS3_RCWSR13_REGSR - 1]) in esdhc_dspi_status_fixup()
241 iic5_pmux = gur_in32(&gur->rcwsr[FSL_CHASSIS3_RCWSR12_REGSR - 1]) in esdhc_dspi_status_fixup()
409 sdhc1_base_pmux = gur_in32(&gur->rcwsr[FSL_CHASSIS3_RCWSR12_REGSR - 1]) in config_board_mux()
431 sdhc2_base_pmux = gur_in32(&gur->rcwsr[FSL_CHASSIS3_RCWSR13_REGSR - 1]) in config_board_mux()
448 iic5_pmux = gur_in32(&gur->rcwsr[FSL_CHASSIS3_RCWSR12_REGSR - 1]) in config_board_mux()
/external/u-boot/drivers/net/ldpaa_eth/
Dls1088a.c97 ec = gur_in32(&gur->rcwsr[FSL_CHASSIS3_EC1_REGSR]) in fsl_rgmii_init()
106 ec = gur_in32(&gur->rcwsr[FSL_CHASSIS3_EC2_REGSR]) in fsl_rgmii_init()
Dlx2160a.c91 ec = gur_in32(&gur->rcwsr[FSL_CHASSIS3_EC1_REGSR - 1]) in fsl_rgmii_init()
100 ec = gur_in32(&gur->rcwsr[FSL_CHASSIS3_EC2_REGSR - 1]) in fsl_rgmii_init()
/external/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
Dsoc.h21 #define gur_in32(a) in_le32(a) macro
24 #define gur_in32(a) in_be32(a) macro
/external/u-boot/board/freescale/ls2080ardb/
Dls2080ardb.c265 u32 svr = gur_in32(&gur->svr); in misc_init_r()