| /external/llvm/test/MC/ELF/ |
| D | relax-arith2.s | 15 .section imul,"x"
16 imul $-128, %bx, %bx
17 imul $127, bar, %bx
18 imul $0, %ebx, %ebx
19 imul $1, bar, %ebx
20 imul $-1, %rbx, %rbx
21 imul $42, bar, %rbx
|
| D | relax-arith.s | 15 .section imul,"x"
16 imul $foo, %bx, %bx
17 imul $foo, bar, %bx
18 imul $foo, %ebx, %ebx
19 imul $foo, bar, %ebx
20 imul $foo, %rbx, %rbx
21 imul $foo, bar, %rbx
|
| D | relax-arith3.s | 12 .section imul,"x"
13 imul $foo, bar(%rip), %bx
14 imul $foo, bar(%rip), %ebx
15 imul $foo, bar(%rip), %rbx
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ELF/ |
| D | relax-arith2.s | 15 .section imul,"x"
16 imul $-128, %bx, %bx
17 imul $127, bar, %bx
18 imul $0, %ebx, %ebx
19 imul $1, bar, %ebx
20 imul $-1, %rbx, %rbx
21 imul $42, bar, %rbx
|
| D | relax-arith.s | 15 .section imul,"x"
16 imul $foo, %bx, %bx
17 imul $foo, bar, %bx
18 imul $foo, %ebx, %ebx
19 imul $foo, bar, %ebx
20 imul $foo, %rbx, %rbx
21 imul $foo, bar, %rbx
|
| D | relax-arith3.s | 12 .section imul,"x"
13 imul $foo, bar(%rip), %bx
14 imul $foo, bar(%rip), %ebx
15 imul $foo, bar(%rip), %rbx
|
| /external/swiftshader/third_party/subzero/tests_lit/assembler/x86/ |
| D | immediate_encodings.ll | 170 ; imul has some shorter 8-bit immediate encodings.
182 ; CHECK: 66 6b c0 63 imul ax,ax
194 ; CHECK: 66 6b c0 91 imul ax,ax
206 ; CHECK: 66 69 c0 01 04 imul ax,ax
218 ; CHECK: 66 69 c0 01 ff imul ax,ax,0xff01
227 ; CHECK: 6b c0 63 imul eax,eax
235 ; CHECK: 6b c0 91 imul eax,eax
243 ; CHECK: 69 c0 01 04 00 00 imul eax,eax
251 ; CHECK: 69 c0 01 ff ff ff imul eax,eax,0xffffff01
260 ; CHECK: 69 c8 e8 00 00 00 imul ecx,eax,0xe8
[all …]
|
| /external/mesa3d/src/gallium/drivers/nouveau/codegen/lib/ |
| D | gm107.asm | 21 imul u32 u32 $r3 $r1 $r2
24 imul u32 u32 $r3 $r1 $r2
27 imul u32 u32 $r3 $r1 $r2
29 imul u32 u32 $r3 $r1 $r2
32 imul u32 u32 $r3 $r1 $r2
36 imul u32 u32 hi $r0 $r0 $r2
71 imul u32 u32 $r3 $r1 $r2
73 imul u32 u32 $r3 $r1 $r2
76 imul u32 u32 $r3 $r1 $r2
79 imul u32 u32 $r3 $r1 $r2
[all …]
|
| /external/boringssl/win-x86_64/crypto/fipsmodule/ |
| D | rsaz-avx2.asm | 343 imul eax,ecx
348 imul rax,QWORD[((-128))+r13]
352 imul rax,QWORD[((8-128))+r13]
356 imul rax,QWORD[((16-128))+r13]
359 imul rdx,QWORD[((24-128))+r13]
363 imul eax,ecx
376 imul rax,QWORD[((-128))+r13]
381 imul rax,QWORD[((8-128))+r13]
388 imul rax,QWORD[((16-128))+r13]
397 imul eax,ecx
[all …]
|
| /external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/ |
| D | vector-arith.ll | 211 ; CHECK: imul
212 ; CHECK: imul
213 ; CHECK: imul
214 ; CHECK: imul
215 ; CHECK: imul
216 ; CHECK: imul
217 ; CHECK: imul
218 ; CHECK: imul
219 ; CHECK: imul
220 ; CHECK: imul
[all …]
|
| D | square.ll | 46 ; CHECK: imul [[REG:e..]],[[REG]]
59 ; CHECK: imul [[REG:..]],[[REG]]
74 ; CHECK: imul al
|
| D | commutativity.ll | 56 ; CHECK-NEXT: imul {{e..}},{{e..}}
57 ; CHECK-NEXT: imul {{e..}},{{e..}}
72 ; CHECK-NEXT: imul {{e..}},{{e..}}
73 ; CHECK-NEXT: imul {{e..}},{{e..}}
|
| D | strength-reduce.ll | 53 ; CHECK: imul
71 ; CHECK: imul
|
| /external/aac/libFDK/include/x86/ |
| D | fixmul_x86.h | 128 imul b in fixmul_DD()
139 imul b in fixmuldiv2_DD()
|
| /external/python/cpython2/Lib/test/ |
| D | test_list.py | 58 def imul(a, b): a *= b function
60 self.assertRaises((MemoryError, OverflowError), imul, lst, n)
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-mca/X86/ |
| D | intel-syntax.s | 9 imul esi, edi
36 # INTEL-NEXT: 2 3 1.00 imul esi, edi
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/X86/ |
| D | x86_64-signed-reloc.s | 13 imul $foo, %rax // CHECK-NEXT: R_X86_64_32S label
|
| /external/llvm/test/MC/X86/ |
| D | x86_64-signed-reloc.s | 13 imul $foo, %rax // CHECK-NEXT: R_X86_64_32S label
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-mca/X86/Znver1/ |
| D | partial-reg-update-6.s | 5 # imul. However, the folded load can start immediately.
9 imul %edx, %ecx label
|
| D | partial-reg-update-4.s | 4 # The lzcnt cannot execute in parallel with the imul because there is a false
7 imul %ax, %bx label
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-mca/X86/BtVer2/ |
| D | partial-reg-update-4.s | 6 # The lzcnt cannot execute in parallel with the imul because there is a false
9 imul %ax, %bx label
|
| D | partial-reg-update-6.s | 6 # imul. However, the folded load can start immediately.
10 imul %edx, %ecx label
|
| /external/llvm/test/CodeGen/X86/ |
| D | imul-lea-2.ll | 3 ; CHECK-NOT: imul
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86InstrArithmetic.td | 112 def IMUL8r : I<0xF6, MRM5r, (outs), (ins GR8:$src), "imul{b}\t$src", []>,
116 def IMUL16r : I<0xF7, MRM5r, (outs), (ins GR16:$src), "imul{w}\t$src", []>,
120 def IMUL32r : I<0xF7, MRM5r, (outs), (ins GR32:$src), "imul{l}\t$src", []>,
124 def IMUL64r : RI<0xF7, MRM5r, (outs), (ins GR64:$src), "imul{q}\t$src", []>,
131 "imul{b}\t$src", []>, SchedLoadReg<WriteIMul.Folded>;
135 "imul{w}\t$src", []>, OpSize16, SchedLoadReg<WriteIMul.Folded>;
139 "imul{l}\t$src", []>, OpSize32, SchedLoadReg<WriteIMul.Folded>;
143 "imul{q}\t$src", []>, SchedLoadReg<WriteIMul64.Folded>,
156 "imul{w}\t{$src2, $dst|$dst, $src2}",
161 "imul{l}\t{$src2, $dst|$dst, $src2}",
[all …]
|
| /external/llvm/lib/Target/X86/ |
| D | X86InstrArithmetic.td | 113 def IMUL8r : I<0xF6, MRM5r, (outs), (ins GR8:$src), "imul{b}\t$src", [],
117 def IMUL16r : I<0xF7, MRM5r, (outs), (ins GR16:$src), "imul{w}\t$src", [],
121 def IMUL32r : I<0xF7, MRM5r, (outs), (ins GR32:$src), "imul{l}\t$src", [],
125 def IMUL64r : RI<0xF7, MRM5r, (outs), (ins GR64:$src), "imul{q}\t$src", [],
132 "imul{b}\t$src", [], IIC_IMUL8>, SchedLoadReg<WriteIMulLd>;
136 "imul{w}\t$src", [], IIC_IMUL16_MEM>, OpSize16,
141 "imul{l}\t$src", [], IIC_IMUL32_MEM>, OpSize32,
146 "imul{q}\t$src", [], IIC_IMUL64>, SchedLoadReg<WriteIMulLd>;
158 "imul{w}\t{$src2, $dst|$dst, $src2}",
163 "imul{l}\t{$src2, $dst|$dst, $src2}",
[all …]
|