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Searched refs:int0 (Results 1 – 17 of 17) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/DebugInfo/MIR/X86/
Dlive-debug-values-spill.mir17 # void foo(int b0, int b1, int int0, int int1, int int2,
31 # int0 += (int1 + int2 + int3) * int4;
37 # int0 = (int1 + int2 + int3) * int4;
40 # int0 += int4 * inta;
41 # use(int0);
50 # GENERATE: ![[INT0:[0-9]+]] = !DILocalVariable(name: "int0",{{.*}})
80 # Check that the spill location rbp-48 (the variable int0) is not propagated
81 # because int0 is redefined within the same basic block.
99 …define void @foo(i32 %b0, i32 %b1, i32 %int0, i32 %int1, i32 %int2, i32 %int3, i32 %int4) local_un…
106 tail call void @llvm.dbg.value(metadata i32 %int0, i64 0, metadata !26, metadata !38), !dbg !41
[all …]
/external/llvm/test/CodeGen/SystemZ/
Dfp-move-02.ll124 %int0 = bitcast double %biased0 to i64
156 %or0 = or i64 %start, %int0
184 %int0 = load volatile i64 , i64 *@iptr
185 %masked0 = and i64 %int0, %mask
251 %int0 = phi i64 [ 0, %entry ], [ %add0, %loop ]
263 %add0 = add i64 %int0, %bias
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/
Dfp-move-02.ll124 %int0 = bitcast double %biased0 to i64
156 %or0 = or i64 %start, %int0
184 %int0 = load volatile i64, i64 *@iptr
185 %masked0 = and i64 %int0, %mask
251 %int0 = phi i64 [ 0, %entry ], [ %add0, %loop ]
263 %add0 = add i64 %int0, %bias
/external/swiftshader/third_party/llvm-7.0/llvm/test/Analysis/ScalarEvolution/
Dno-wrap-add-exprs.ll168 %int0 = ptrtoint i8* %ptr to i32
169 %int5 = add i32 %int0, 5
172 ; CHECK-NEXT: --> (1 + (zext i32 (4 + %int0) to i64))<nuw><nsw> U: [1,4294967294) S: [1,429496729…
/external/u-boot/arch/arm/include/asm/arch-sunxi/
Dlcdc.h16 u32 int0; /* 0x04 */ member
/external/u-boot/drivers/spi/
Ddavinci_spi.c96 dv_reg int0; /* 0x08 */ member
287 writel(0, &ds->regs->int0); in __davinci_spi_claim_bus()
/external/clang/test/CXX/dcl.decl/dcl.init/dcl.init.ref/
Dp5-0x.cpp31 int&& int0 = xvalue<int>(); in test_rvalue_refs()
/external/u-boot/drivers/video/sunxi/
Dlcdc.c34 writel(0, &lcdc->int0); /* Disable all interrupts */ in lcdc_init()
/external/u-boot/arch/arm/dts/
Dimx6ul.dtsi505 interrupt-names = "int0", "pps";
839 interrupt-names = "int0", "pps";
Dstm32mp157c.dtsi939 interrupt-names = "int0", "int1";
952 interrupt-names = "int0", "int1";
Dimx6qdl.dtsi1015 interrupt-names = "int0", "pps";
Dimx7s.dtsi1103 interrupt-names = "int0", "int1", "int2", "pps";
/external/deqp-deps/SPIRV-Tools/test/val/
Dval_decoration_test.cpp4810 OpName %int0 "int0" in ShaderWithUniformLikeDecoration()
/external/swiftshader/third_party/SPIRV-Tools/test/val/
Dval_decoration_test.cpp4755 OpName %int0 "int0" in ShaderWithUniformLikeDecoration()
/external/angle/third_party/spirv-tools/src/test/val/
Dval_decoration_test.cpp4810 OpName %int0 "int0" in ShaderWithUniformLikeDecoration()
/external/cpuinfo/test/dmesg/
Dgalaxy-j1-2016.log507 <3>[ 0.709533] [1: swapper/0: 1] [c1] sprdfb: dsi request irq int0 OK!
Dgalaxy-grand-prime-value-edition.log650 <3>[ 0.605163] [1: swapper/0: 1] [c1] sprdfb: dsi request irq int0 OK!