| /external/u-boot/arch/microblaze/cpu/ |
| D | interrupts.c | 39 microblaze_intc_t *intc; variable
53 mask = intc->ier; in enable_one_interrupt()
54 intc->ier = (mask | offset); in enable_one_interrupt()
57 intc->ier); in enable_one_interrupt()
58 debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, in enable_one_interrupt()
59 intc->iar, intc->mer); in enable_one_interrupt()
68 mask = intc->ier; in disable_one_interrupt()
69 intc->ier = (mask & ~offset); in disable_one_interrupt()
72 intc->ier); in disable_one_interrupt()
73 debug("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier, in disable_one_interrupt()
[all …]
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| /external/u-boot/arch/arm/dts/ |
| D | zynq-7000.dtsi | 51 interrupt-parent = <&intc>;
70 interrupt-parent = <&intc>;
77 interrupt-parent = <&intc>;
88 interrupt-parent = <&intc>;
100 interrupt-parent = <&intc>;
112 interrupt-parent = <&intc>;
121 interrupt-parent = <&intc>;
132 interrupt-parent = <&intc>;
139 intc: interrupt-controller@f8f01000 { label
184 interrupt-parent = <&intc>;
[all …]
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| D | da850-lego-ev3.dts | 38 intc: interrupt-controller@fffee000 { label
39 compatible = "ti,cp-intc";
42 ti,intc-size = <101>;
53 interrupt-parent = <&intc>;
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| D | omap3-evm-common.dtsi | 61 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
62 interrupt-parent = <&intc>;
118 interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>;
125 interrupts-extended = <&intc 86 &omap3_pmx_core 0x12e>;
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| D | zynq-cse-qspi.dtsi | 40 interrupt-parent = <&intc>;
43 intc: interrupt-controller@f8f01000 { label
56 interrupt-parent = <&intc>;
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| D | bcm2836.dtsi | 13 compatible = "brcm,bcm2836-l1-intc";
75 &intc {
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| D | zynq-cse-nor.dts | 39 interrupt-parent = <&intc>;
42 intc: interrupt-controller@f8f01000 { label
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| D | bcm2837.dtsi | 12 compatible = "brcm,bcm2836-l1-intc";
78 &intc {
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| D | logicpd-torpedo-som.dtsi | 78 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
79 interrupt-parent = <&intc>;
172 interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
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| D | logicpd-som-lv.dtsi | 83 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
84 interrupt-parent = <&intc>;
128 interrupts-extended = <&intc 94 &omap3_pmx_core 0x136>;
284 interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
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| D | kirkwood.dtsi | 10 interrupt-parent = <&intc>;
210 compatible = "marvell,orion-bridge-intc";
230 intc: main-interrupt-ctrl@20200 { label
231 compatible = "marvell,orion-intc";
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| D | socfpga_stratix10.dtsi | 58 interrupt-parent = <&intc>;
66 intc: intc@fffc1000 { label
81 interrupt-parent = <&intc>;
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| D | omap3-evm-processor-common.dtsi | 180 interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>;
184 interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
188 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
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| /external/u-boot/arch/mips/dts/ |
| D | jz4780.dtsi | 17 intc: interrupt-controller@10001000 { label
18 compatible = "ingenic,jz4780-intc";
74 interrupt-parent = <&intc>;
88 interrupt-parent = <&intc>;
102 interrupt-parent = <&intc>;
116 interrupt-parent = <&intc>;
130 interrupt-parent = <&intc>;
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| D | mt7628a.dtsi | 227 interrupt-parent = <&intc>;
231 intc: interrupt-controller@200 { label
232 compatible = "ralink,rt2880-intc";
239 reset-names = "intc";
244 ralink,intc-registers = <0x9c 0xa0
264 interrupt-parent = <&intc>;
314 interrupt-parent = <&intc>;
332 interrupt-parent = <&intc>;
350 interrupt-parent = <&intc>;
390 interrupt-parent = <&intc>;
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| D | mscc,servalt.dtsi | 58 interrupt-parent = <&intc>;
65 intc: interrupt-controller@70 { label
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| D | mscc,serval.dtsi | 58 interrupt-parent = <&intc>;
65 intc: interrupt-controller@70 { label
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| /external/arm-trusted-firmware/fdts/ |
| D | stm32mp157c.dtsi | 14 intc: interrupt-controller@a0021000 { label
70 interrupt-parent = <&intc>;
297 interrupts-extended = <&intc GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
319 interrupts-extended = <&intc GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
320 <&intc GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
334 interrupts-extended = <&intc GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
356 interrupts-extended = <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
357 <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
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| /external/u-boot/arch/riscv/dts/ |
| D | fu540-c000.dtsi | 36 compatible = "riscv,cpu-intc";
59 compatible = "riscv,cpu-intc";
82 compatible = "riscv,cpu-intc";
105 compatible = "riscv,cpu-intc";
128 compatible = "riscv,cpu-intc";
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| D | ae350_64.dts | 41 compatible = "riscv,cpu-intc";
62 compatible = "riscv,cpu-intc";
83 compatible = "riscv,cpu-intc";
104 compatible = "riscv,cpu-intc";
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| D | ae350_32.dts | 41 compatible = "riscv,cpu-intc";
62 compatible = "riscv,cpu-intc";
83 compatible = "riscv,cpu-intc";
104 compatible = "riscv,cpu-intc";
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| /external/u-boot/arch/nds32/dts/ |
| D | ag101p.dts | 6 interrupt-parent = <&intc>;
36 intc: interrupt-controller { label
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| D | ae3xx.dts | 6 interrupt-parent = <&intc>;
43 intc: interrupt-controller { label
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| /external/u-boot/doc/device-tree-bindings/i2c/ |
| D | i2c-cdns.txt | 18 interrupt-parent = <&intc>;
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| /external/u-boot/doc/device-tree-bindings/spi/ |
| D | spi-zynq-qspi.txt | 22 interrupt-parent = <&intc>;
|