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Searched refs:isPPC64 (Results 1 – 25 of 45) sorted by relevance

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/external/llvm/lib/Target/PowerPC/
DPPCFrameLowering.cpp42 return STI.isPPC64() ? 16 : 8; in computeReturnSaveOffset()
44 return STI.isPPC64() ? 16 : 4; in computeReturnSaveOffset()
58 return STI.isPPC64() ? -8U : -4U; in computeFramePointerSaveOffset()
61 return STI.isPPC64() ? -8U : -4U; in computeFramePointerSaveOffset()
65 if (STI.isDarwinABI() || STI.isPPC64()) in computeLinkageSize()
66 return (STI.isELFv2ABI() ? 4 : 6) * (STI.isPPC64() ? 8 : 4); in computeLinkageSize()
74 return STI.isPPC64() ? -16U : -8U; in computeBasePointerSaveOffset()
77 return STI.isPPC64() in computeBasePointerSaveOffset()
96 if (Subtarget.isPPC64()) { in getCalleeSavedSpillSlots()
236 if (Subtarget.isPPC64()) { in getCalleeSavedSpillSlots()
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DPPCInstr64Bit.td250 "ldat $rD, $rA, $FC", IIC_LdStLoad>, isPPC64,
260 "stdat $rS, $rA, $FC", IIC_LdStStore>, isPPC64,
571 "cmpd $crD, $rA, $rB", IIC_IntCompare>, isPPC64;
573 "cmpld $crD, $rA, $rB", IIC_IntCompare>, isPPC64;
575 "cmpdi $crD, $rA, $imm", IIC_IntCompare>, isPPC64;
578 IIC_IntCompare>, isPPC64;
592 [(set i64:$rA, (PPCshl i64:$rS, i32:$rB))]>, isPPC64;
595 [(set i64:$rA, (PPCsrl i64:$rS, i32:$rB))]>, isPPC64;
598 [(set i64:$rA, (PPCsra i64:$rS, i32:$rB))]>, isPPC64;
623 "extsb $rA, $rS", IIC_IntSimple, []>, isPPC64;
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DPPCAsmPrinter.cpp451 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || in EmitTlsCall()
452 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && in EmitTlsCall()
455 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || in EmitTlsCall()
456 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && in EmitTlsCall()
459 if (!Subtarget->isPPC64() && !Subtarget->isDarwin() && in EmitTlsCall()
469 MCInstBuilder(Subtarget->isPPC64() ? in EmitTlsCall()
480 bool isPPC64 = Subtarget->isPPC64(); in EmitInstruction() local
758 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); in EmitInstruction()
777 TmpInst.setOpcode(isPPC64 ? PPC::LD : PPC::LWZ); in EmitInstruction()
836 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); in EmitInstruction()
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DPPCRegisterInfo.cpp61 : PPCGenRegisterInfo(TM.isPPC64() ? PPC::LR8 : PPC::LR, in PPCRegisterInfo()
62 TM.isPPC64() ? 0 : 1, in PPCRegisterInfo()
63 TM.isPPC64() ? 0 : 1), in PPCRegisterInfo()
91 if (TM.isPPC64()) in getPointerRegClass()
96 if (TM.isPPC64()) in getPointerRegClass()
113 return TM.isPPC64() in getCalleeSavedRegs()
119 if (TM.isPPC64() && MF->getInfo<PPCFunctionInfo>()->isSplitCSR()) in getCalleeSavedRegs()
125 return TM.isPPC64() in getCalleeSavedRegs()
140 if (!TM.isPPC64()) in getCalleeSavedRegsViaCopy()
172 return TM.isPPC64() ? (Subtarget.hasAltivec() ? CSR_Darwin64_Altivec_RegMask in getCallPreservedMask()
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DPPCInstrInfo.cpp452 bool isPPC64 = Subtarget.isPPC64(); in analyzeBranch() local
504 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
515 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
572 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
586 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
648 bool isPPC64 = Subtarget.isPPC64(); in InsertBranch() local
656 (isPPC64 ? PPC::BDNZ8 : PPC::BDNZ) : in InsertBranch()
657 (isPPC64 ? PPC::BDZ8 : PPC::BDZ))).addMBB(TBB); in InsertBranch()
671 (isPPC64 ? PPC::BDNZ8 : PPC::BDNZ) : in InsertBranch()
672 (isPPC64 ? PPC::BDZ8 : PPC::BDZ))).addMBB(TBB); in InsertBranch()
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DPPCSubtarget.cpp197 CriticalPathRCs.push_back(isPPC64() ? in getCriticalPathRCs()
251 bool PPCSubtarget::isPPC64() const { return TM.isPPC64(); } in isPPC64() function in PPCSubtarget
DPPCISelLowering.cpp78 bool isPPC64 = Subtarget.isPPC64(); in PPCTargetLowering() local
79 setMinStackArgumentAlignment(isPPC64 ? 8:4); in PPCTargetLowering()
115 if (isPPC64 || Subtarget.hasFPCVT()) { in PPCTargetLowering()
118 isPPC64 ? MVT::i64 : MVT::i32); in PPCTargetLowering()
121 isPPC64 ? MVT::i64 : MVT::i32); in PPCTargetLowering()
266 if (Subtarget.hasDirectMove() && isPPC64) { in PPCTargetLowering()
314 if (isPPC64) { in PPCTargetLowering()
333 if (Subtarget.isSVR4ABI() && !isPPC64) in PPCTargetLowering()
378 if (Subtarget.hasLFIWAX() || Subtarget.isPPC64()) in PPCTargetLowering()
566 if (Subtarget.hasDirectMove() && isPPC64) { in PPCTargetLowering()
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DPPCTargetMachine.h55 bool isPPC64() const { in isPPC64() function
DPPCTargetTransformInfo.cpp175 if (ST->isPPC64() && in getIntImmCost()
234 if (ST->isPPC64()) in getRegisterBitWidth()
DPPCRegisterInfo.td241 return S.isPPC64() && S.isSVR4ABI();
253 return S.isPPC64() && S.isSVR4ABI();
266 return S.isPPC64() && S.isSVR4ABI();
276 return S.isPPC64() && S.isSVR4ABI();
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCFrameLowering.cpp42 return STI.isPPC64() ? 16 : 8; in computeReturnSaveOffset()
44 return STI.isPPC64() ? 16 : 4; in computeReturnSaveOffset()
58 return STI.isPPC64() ? -8U : -4U; in computeFramePointerSaveOffset()
61 return STI.isPPC64() ? -8U : -4U; in computeFramePointerSaveOffset()
65 if (STI.isDarwinABI() || STI.isPPC64()) in computeLinkageSize()
66 return (STI.isELFv2ABI() ? 4 : 6) * (STI.isPPC64() ? 8 : 4); in computeLinkageSize()
74 return STI.isPPC64() ? -16U : -8U; in computeBasePointerSaveOffset()
77 return STI.isPPC64() in computeBasePointerSaveOffset()
96 if (Subtarget.isPPC64()) { in getCalleeSavedSpillSlots()
256 if (Subtarget.isPPC64()) { in getCalleeSavedSpillSlots()
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DPPCInstr64Bit.td257 "ldat $rD, $rA, $FC", IIC_LdStLoad>, isPPC64,
267 "stdat $rS, $rA, $FC", IIC_LdStStore>, isPPC64,
510 "ldx $rD, $rA, $rB", IIC_LdStLD, []>, isPPC64;
531 "stdx $rS, $rA, $rB", IIC_LdStSTD, []>, isPPC64,
615 "ldx $rD, $rA, $rB", IIC_LdStLD, []>, isPPC64;
629 "stdx $rS, $rA, $rB", IIC_LdStSTD, []>, isPPC64,
647 "cmpd $crD, $rA, $rB", IIC_IntCompare>, isPPC64;
649 "cmpld $crD, $rA, $rB", IIC_IntCompare>, isPPC64;
651 "cmpdi $crD, $rA, $imm", IIC_IntCompare>, isPPC64;
654 IIC_IntCompare>, isPPC64;
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DPPCRegisterInfo.cpp75 : PPCGenRegisterInfo(TM.isPPC64() ? PPC::LR8 : PPC::LR, in PPCRegisterInfo()
76 TM.isPPC64() ? 0 : 1, in PPCRegisterInfo()
77 TM.isPPC64() ? 0 : 1), in PPCRegisterInfo()
125 if (TM.isPPC64()) in getPointerRegClass()
130 if (TM.isPPC64()) in getPointerRegClass()
147 return TM.isPPC64() in getCalleeSavedRegs()
153 if (TM.isPPC64() && MF->getInfo<PPCFunctionInfo>()->isSplitCSR()) in getCalleeSavedRegs()
163 return TM.isPPC64() in getCalleeSavedRegs()
173 return TM.isPPC64() in getCalleeSavedRegs()
188 if (!TM.isPPC64()) in getCalleeSavedRegsViaCopy()
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DPPCAsmPrinter.cpp479 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) || in EmitTlsCall()
480 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) && in EmitTlsCall()
483 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) || in EmitTlsCall()
484 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) && in EmitTlsCall()
487 if (!Subtarget->isPPC64() && !Subtarget->isDarwin() && in EmitTlsCall()
497 MCInstBuilder(Subtarget->isPPC64() ? in EmitTlsCall()
508 bool isPPC64 = Subtarget->isPPC64(); in EmitInstruction() local
847 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); in EmitInstruction()
866 TmpInst.setOpcode(isPPC64 ? PPC::LD : PPC::LWZ); in EmitInstruction()
925 assert(Subtarget->isPPC64() && "Not supported for 32-bit PowerPC"); in EmitInstruction()
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DPPCSubtarget.cpp191 CriticalPathRCs.push_back(isPPC64() ? in getCriticalPathRCs()
231 bool PPCSubtarget::isPPC64() const { return TM.isPPC64(); } in isPPC64() function in PPCSubtarget
DPPCInstrInfo.cpp104 STI.isPPC64() ? PPC::BLR8 : PPC::BLR), in PPCInstrInfo()
488 bool isPPC64 = Subtarget.isPPC64(); in analyzeBranch() local
554 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
565 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
622 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
636 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
702 bool isPPC64 = Subtarget.isPPC64(); in insertBranch() local
710 (isPPC64 ? PPC::BDNZ8 : PPC::BDNZ) : in insertBranch()
711 (isPPC64 ? PPC::BDZ8 : PPC::BDZ))).addMBB(TBB); in insertBranch()
727 (isPPC64 ? PPC::BDNZ8 : PPC::BDNZ) : in insertBranch()
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DPPCCTRLoops.cpp435 isLargeIntegerTy(!TM->isPPC64(), CI->getSrcTy()->getScalarType()) || in mightUseCTR()
436 isLargeIntegerTy(!TM->isPPC64(), CI->getDestTy()->getScalarType())) in mightUseCTR()
438 } else if (isLargeIntegerTy(!TM->isPPC64(), in mightUseCTR()
445 } else if (!TM->isPPC64() && in mightUseCTR()
580 if (SE->getTypeSizeInBits(EC->getType()) > (TM->isPPC64() ? 64 : 32)) in convertToCTRLoop()
654 Type *CountType = TM->isPPC64() ? Type::getInt64Ty(C) : Type::getInt32Ty(C); in convertToCTRLoop()
DPPCISelLowering.cpp134 bool isPPC64 = Subtarget.isPPC64(); in PPCTargetLowering() local
135 setMinStackArgumentAlignment(isPPC64 ? 8:4); in PPCTargetLowering()
194 if (isPPC64 || Subtarget.hasFPCVT()) { in PPCTargetLowering()
197 isPPC64 ? MVT::i64 : MVT::i32); in PPCTargetLowering()
200 isPPC64 ? MVT::i64 : MVT::i32); in PPCTargetLowering()
384 if (Subtarget.hasDirectMove() && isPPC64) { in PPCTargetLowering()
432 if (isPPC64) { in PPCTargetLowering()
451 if (Subtarget.isSVR4ABI() && !isPPC64) in PPCTargetLowering()
509 if (Subtarget.hasLFIWAX() || Subtarget.isPPC64()) in PPCTargetLowering()
704 if (Subtarget.hasDirectMove() && isPPC64) { in PPCTargetLowering()
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DPPCSubtarget.h205 bool isPPC64() const;
284 return isDarwinABI() ? 224 : (isPPC64() ? 288 : 0); in getRedZoneSize()
DPPCTargetMachine.h58 bool isPPC64() const { in isPPC64() function
DPPCCallingConv.td53 CCIfType<[i32, i1], CCIfSubtarget<"isPPC64()", CCPromoteToType<i64>>>,
54 CCIfType<[i1], CCIfNotSubtarget<"isPPC64()", CCPromoteToType<i32>>>,
77 CCIfType<[i32, i1], CCIfSubtarget<"isPPC64()", CCPromoteToType<i64>>>,
78 CCIfType<[i1], CCIfNotSubtarget<"isPPC64()", CCPromoteToType<i32>>>,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/MCTargetDesc/
DPPCMCTargetDesc.cpp62 bool isPPC64 = in createPPCMCRegisterInfo() local
64 unsigned Flavour = isPPC64 ? 0 : 1; in createPPCMCRegisterInfo()
65 unsigned RA = isPPC64 ? PPC::LR8 : PPC::LR; in createPPCMCRegisterInfo()
79 bool isPPC64 = (TheTriple.getArch() == Triple::ppc64 || in createPPCMCAsmInfo() local
84 MAI = new PPCMCAsmInfoDarwin(isPPC64, TheTriple); in createPPCMCAsmInfo()
86 MAI = new PPCELFMCAsmInfo(isPPC64, TheTriple); in createPPCMCAsmInfo()
89 unsigned Reg = isPPC64 ? PPC::X1 : PPC::R1; in createPPCMCAsmInfo()
/external/llvm/lib/Target/PowerPC/MCTargetDesc/
DPPCMCTargetDesc.cpp54 bool isPPC64 = in createPPCMCRegisterInfo() local
56 unsigned Flavour = isPPC64 ? 0 : 1; in createPPCMCRegisterInfo()
57 unsigned RA = isPPC64 ? PPC::LR8 : PPC::LR; in createPPCMCRegisterInfo()
71 bool isPPC64 = (TheTriple.getArch() == Triple::ppc64 || in createPPCMCAsmInfo() local
76 MAI = new PPCMCAsmInfoDarwin(isPPC64, TheTriple); in createPPCMCAsmInfo()
78 MAI = new PPCELFMCAsmInfo(isPPC64, TheTriple); in createPPCMCAsmInfo()
81 unsigned Reg = isPPC64 ? PPC::X1 : PPC::R1; in createPPCMCAsmInfo()
/external/llvm/lib/Target/PowerPC/AsmParser/
DPPCAsmParser.cpp251 bool isPPC64() const { return IsPPC64; } in isPPC64() function in __anon2a9566d00111::PPCAsmParser
390 bool isPPC64() const { return IsPPC64; } in isPPC64() function
576 if (isPPC64()) in addRegGxRCOperands()
583 if (isPPC64()) in addRegGxRCNoR0Operands()
1272 RegNo = isPPC64()? PPC::LR8 : PPC::LR; in MatchRegisterName()
1276 RegNo = isPPC64()? PPC::CTR8 : PPC::CTR; in MatchRegisterName()
1285 RegNo = isPPC64()? XRegs[IntVal] : RRegs[IntVal]; in MatchRegisterName()
1555 Operands.push_back(PPCOperand::CreateImm(IntVal, S, E, isPPC64())); in ParseOperand()
1570 Operands.push_back(PPCOperand::CreateImm(IntVal, S, E, isPPC64())); in ParseOperand()
1592 Operands.push_back(PPCOperand::CreateFromMCExpr(EVal, S, E, isPPC64())); in ParseOperand()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/AsmParser/
DPPCAsmParser.cpp269 bool isPPC64() const { return IsPPC64; } in isPPC64() function in __anon2f93e1680111::PPCAsmParser
411 bool isPPC64() const { return IsPPC64; } in isPPC64() function
598 if (isPPC64()) in addRegGxRCOperands()
605 if (isPPC64()) in addRegGxRCNoR0Operands()
1341 RegNo = isPPC64()? PPC::LR8 : PPC::LR; in MatchRegisterName()
1344 RegNo = isPPC64()? PPC::CTR8 : PPC::CTR; in MatchRegisterName()
1351 RegNo = isPPC64()? XRegs[IntVal] : RRegs[IntVal]; in MatchRegisterName()
1619 Operands.push_back(PPCOperand::CreateImm(IntVal, S, E, isPPC64())); in ParseOperand()
1639 Operands.push_back(PPCOperand::CreateImm(IntVal, S, E, isPPC64())); in ParseOperand()
1654 Operands.push_back(PPCOperand::CreateFromMCExpr(EVal, S, E, isPPC64())); in ParseOperand()
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