Searched refs:isSGPRReg (Results 1 – 12 of 12) sorted by relevance
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.h | 102 bool isSGPRReg(const MachineRegisterInfo &MRI, unsigned Reg) const { in isSGPRReg() function
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| D | SIWholeQuadMode.cpp | 397 if (TRI->isSGPRReg(*MRI, Op.getReg())) { in processBlock()
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| D | SIInstrInfo.h | 372 return !RI.isSGPRReg(MRI, Dest); in isVGPRCopy()
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| D | SIInstrInfo.cpp | 2068 if (Src0.isReg() && RI.isSGPRReg(MRI, Src0.getReg())) in legalizeOperandsVOP2()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.h | 141 bool isSGPRReg(const MachineRegisterInfo &MRI, unsigned Reg) const { in isSGPRReg() function
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| D | GCNHazardRecognizer.cpp | 609 if (!LaneSelectOp->isReg() || !TRI->isSGPRReg(MRI, LaneSelectOp->getReg())) in checkRWLaneHazards()
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| D | SIWholeQuadMode.cpp | 535 if (TRI->isSGPRReg(*MRI, Op.getReg())) { in requiresCorrectState()
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| D | SIInstrInfo.h | 597 return !RI.isSGPRReg(MRI, Dest); in isVGPRCopy()
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| D | SIFoldOperands.cpp | 562 bool IsSGPR = TRI.isSGPRReg(MRI, MI->getOperand(0).getReg()); in tryConstantFoldOp()
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| D | SIPeepholeSDWA.cpp | 1098 TRI->isSGPRReg(*MRI, Op.getReg())) { in legalizeScalarOperands()
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| D | SIInsertWaitcnts.cpp | 496 } else if (TRI->isSGPRReg(MRIA, Op.getReg())) { in getRegInterval()
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| D | SIInstrInfo.cpp | 2262 (!Src0->isReg() || !RI.isSGPRReg(MBB->getParent()->getRegInfo(), Src0->getReg()))) { in convertToThreeAddress()
3265 if (Src0.isReg() && RI.isSGPRReg(MRI, Src0.getReg())) in legalizeOperandsVOP2()
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