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Searched refs:lis (Results 1 – 25 of 179) sorted by relevance

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/external/u-boot/arch/powerpc/cpu/mpc85xx/
Dstart.S135 lis r2, L2CSR0_L2E@h
142 lis r2,(L2CSR0_L2FL)@h
155 lis r2, L2CSR0_L2E@h
178 lis \scratch, FSL_BOOKE_MAS0(1, \esel, 0)@h
181 lis \scratch, FSL_BOOKE_MAS1(1, 1, 0, \ts, \tsize)@h
184 lis \scratch, FSL_BOOKE_MAS2(\epn, \wimg)@h
187 lis \scratch, FSL_BOOKE_MAS3(\rpn, 0, \perm)@h
190 lis \scratch, \phy_high@h
200 lis \scratch, FSL_BOOKE_MAS0(0, \esel, 0)@h
203 lis \scratch, FSL_BOOKE_MAS1(1, 0, 0, \ts, \tsize)@h
[all …]
Drelease.S37 lis r3, HID0_EMCP@h /* enable machine check */
92 lis r3,BUCSR_ENABLE@h
102 lis r2,(L1CSR1_ICFI|L1CSR1_ICLFR)@h
110 lis r3,(L1CSR1_CPE|L1CSR1_ICE)@h
120 lis r2,(L1CSR0_DCFI|L1CSR0_DCLFR)@h
128 lis r3,(L1CSR0_CPE|L1CSR0_DCE)@h
140 lis r3,toreset(__spin_table_addr)@h
216 lis r5,SVR_P4080@h
227 lis r3,toreset(enable_cpu_a011_workaround)@ha
258 lis r3,SVR_P2040@h
[all …]
/external/llvm/test/CodeGen/PowerPC/
Dpr26356.ll8 ; CHECK: lis 3, 0
16 ; CHECK: lis 3, 0
31 ; CHECK: lis 3, 0
39 ; CHECK: lis 3, 0
54 ; CHECK: lis 3, 0
62 ; CHECK: lis 3, 0
70 ; CHECK: lis 3, 0
78 ; CHECK: lis 3, 0
100 ; CHECK: lis 3, -1
122 ; CHECK: lis 3, -1
Dconstants-i64.ll11 ; CHECK: lis [[REG1:[0-9]+]], -1
22 ; CHECK: lis [[REG1:[0-9]+]], -81
55 ; CHECK: lis [[REG1:[0-9]+]], -4096
66 ; CHECK: lis [[REG1:[0-9]+]], -32768
77 ; CHECK: lis [[REG1:[0-9]+]], -5121
D2010-02-12-saveCR.ll10 ; CHECK: lis [[T2:r[0-9]+]], 1
15 ; CHECK: lis [[T3:r[0-9]+]], 1
28 ; CHECK: lis [[T1:r[0-9]+]], 1
33 ; CHECK: lis [[T1]], 1
DFrames-large.ll16 ; PPC32-NOFP: lis r0, -1
25 ; PPC32-FP: lis r0, -1
37 ; PPC64-NOFP: lis r0, -1
46 ; PPC64-FP: lis r0, -1
Dhidden-vis-2.ll3 ; CHECK: lis r2, ha16(L_x$non_lazy_ptr)
4 ; CHECK: lis r3, ha16(L_y$non_lazy_ptr)
Dprivate.ll20 ; LINUX: lis{{.*}}.Lbaz
21 ; OSX: lis{{.*}}l_baz
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
DtestBitReverse.ll8 ; CHECK-NEXT: lis 4, -21846
9 ; CHECK-NEXT: lis 5, 21845
16 ; CHECK-NEXT: lis 5, 13107
18 ; CHECK-NEXT: lis 4, -13108
25 ; CHECK-NEXT: lis 5, 3855
27 ; CHECK-NEXT: lis 4, -3856
48 ; CHECK-NEXT: lis 4, -21846
49 ; CHECK-NEXT: lis 5, 21845
50 ; CHECK-NEXT: lis 6, -13108
51 ; CHECK-NEXT: lis 7, 13107
[all …]
Dpr26356.ll8 ; CHECK: lis 3, 0
16 ; CHECK: lis 3, 0
31 ; CHECK: lis 3, 0
39 ; CHECK: lis 3, 0
54 ; CHECK: lis 3, 0
62 ; CHECK: lis 3, 0
70 ; CHECK: lis 3, 0
78 ; CHECK: lis 3, 0
100 ; CHECK: lis 3, -1
122 ; CHECK: lis 3, -1
Dpr33093.ll8 ; CHECK-NEXT: lis 4, -21846
9 ; CHECK-NEXT: lis 5, 21845
16 ; CHECK-NEXT: lis 5, 13107
18 ; CHECK-NEXT: lis 4, -13108
25 ; CHECK-NEXT: lis 5, 3855
27 ; CHECK-NEXT: lis 4, -3856
72 ; CHECK-NEXT: lis 4, -21846
73 ; CHECK-NEXT: lis 5, 21845
74 ; CHECK-NEXT: lis 6, -13108
75 ; CHECK-NEXT: lis 7, 13107
[all …]
Dconstants-i64.ll11 ; CHECK: lis [[REG1:[0-9]+]], -1
22 ; CHECK: lis [[REG1:[0-9]+]], -81
55 ; CHECK: lis [[REG1:[0-9]+]], -4096
66 ; CHECK: lis [[REG1:[0-9]+]], -32768
77 ; CHECK: lis [[REG1:[0-9]+]], -5121
D2010-02-12-saveCR.ll10 ; CHECK: lis [[T2:r[0-9]+]], 1
15 ; CHECK: lis [[T3:r[0-9]+]], 1
28 ; CHECK: lis [[T1:r[0-9]+]], 1
33 ; CHECK: lis [[T1]], 1
D2008-10-28-f128-i32.ll13 ; CHECK-NEXT: lis 3, .LCPI0_0@ha
44 ; CHECK-NEXT: lis 3, 15856
66 ; CHECK-NEXT: lis 3, 16864
90 ; CHECK-NEXT: lis 3, .LCPI0_1@ha
121 ; CHECK-NEXT: lis 3, 17392
189 ; CHECK-NEXT: lis 3, 16864
211 ; CHECK-NEXT: lis 3, .LCPI0_2@ha
220 ; CHECK-NEXT: lis 3, .LCPI0_3@ha
244 ; CHECK-NEXT: lis 4, 16864
266 ; CHECK-NEXT: lis 3, .LCPI0_0@ha
[all …]
DFrames-large.ll13 ; PPC32-NOFP: lis r0, -1
22 ; PPC32-FP: lis r0, -1
34 ; PPC64-NOFP: lis r0, -1
43 ; PPC64-FP: lis r0, -1
Dhidden-vis-2.ll3 ; CHECK: lis r2, ha16(L_x$non_lazy_ptr)
4 ; CHECK: lis r3, ha16(L_y$non_lazy_ptr)
Dprivate.ll20 ; LINUX: lis{{.*}}.Lbaz
21 ; OSX: lis{{.*}}l_baz
/external/u-boot/arch/powerpc/cpu/mpc86xx/
Dstart.S159 lis r3, L2_INIT@h
170 lis r3, CONFIG_SYS_MONITOR_BASE_EARLY@h
199 lis r3,addr_trans_enabled@h
226 lis r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
242 lis r4, PIXIS_BASE@h
260 lis r3, CONFIG_SYS_DIAG_ADDR@h
310 lis r4, CONFIG_SYS_IBAT##n##L@h; \
312 lis r3, CONFIG_SYS_IBAT##n##U@h; \
316 lis r4, CONFIG_SYS_DBAT##n##L@h; \
318 lis r3, CONFIG_SYS_DBAT##n##U@h; \
[all …]
Dcache.S56 lis r3,0
57 lis r5,CACHE_LINE_SIZE
62 lis r5,CACHE_LINE_SIZE
311 lis r3, L2_ENABLE@h
328 lis r3, L2_INIT@h
Drelease.S59 lis r0, (HID0_HIGH_BAT_EN | HID0_XBSEN | HID0_XAEN)@h
111 lis r3, L2_ENABLE@h
144 lis r3, CONFIG_LINUX_RESET_VEC@h
/external/u-boot/arch/powerpc/cpu/mpc83xx/
Dstart.S156 lis r4, CONFIG_DEFAULT_IMMR@h
165 lis r3, CONFIG_SYS_IMMR@h
201 lis r4, (CONFIG_SYS_MONITOR_BASE)@h
244 lis r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)@h
288 lis r3, CONFIG_SYS_IMMR@h
424 lis r22,MSR_POW@h
496 lis r3, CONFIG_SYS_IMMR@h
500 lis r4, CONFIG_SYS_WATCHDOG_VALUE
539 lis r3, CONFIG_SYS_HID0_INIT@h
544 lis r3, CONFIG_SYS_HID0_FINAL@h
[all …]
/external/u-boot/arch/powerpc/cpu/mpc8xx/
Dstart.S72 lis r3, CONFIG_SYS_IMMR@h /* position IMMR */
97 lis r3, IDC_UNALL@h /* Unlock all */
101 lis r3, IDC_INVALL@h /* Invalidate all */
105 lis r3, IDC_DISABLE@h /* Disable data cache */
108 lis r3, IDC_ENABLE@h /* Enable instruction cache */
121 lis r3, CONFIG_SYS_MONITOR_BASE@h
143 lis r2, CONFIG_SYS_DER@h
148 lis r3, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@h
158 lis r4, CONFIG_SYS_IMMR@h
175 lis r3, CONFIG_SYS_IMMR@h
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/
Dtls-le-v2-abi.s40 lis 3, i@tprel@h
49 lis 3, i@tprel@highesta
61 lis 3, i@tprel@highest
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DInterferenceCache.h104 void clear(MachineFunction *mf, SlotIndexes *indexes, LiveIntervals *lis) { in clear() argument
109 LIS = lis; in clear()
173 SlotIndexes *indexes, LiveIntervals *lis,
/external/llvm/include/llvm/CodeGen/
DCalcSpillWeights.h62 VirtRegAuxInfo(MachineFunction &mf, LiveIntervals &lis,
66 : MF(mf), LIS(lis), VRM(vrm), Loops(loops), MBFI(mbfi), normalize(norm) {} in MF()

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