| /external/u-boot/drivers/net/mscc_eswitch/ |
| D | mscc_miim.c | 24 static int mscc_miim_wait_ready(struct mscc_miim_dev *miim) in mscc_miim_wait_ready() argument
26 return wait_for_bit_le32(miim->regs + MIIM_STATUS, MIIM_STAT_BUSY, in mscc_miim_wait_ready()
32 struct mscc_miim_dev *miim = (struct mscc_miim_dev *)bus->priv; in mscc_miim_read() local
36 ret = mscc_miim_wait_ready(miim); in mscc_miim_read()
42 miim->regs + MIIM_CMD); in mscc_miim_read()
44 ret = mscc_miim_wait_ready(miim); in mscc_miim_read()
48 val = readl(miim->regs + MIIM_DATA); in mscc_miim_read()
62 struct mscc_miim_dev *miim = (struct mscc_miim_dev *)bus->priv; in mscc_miim_write() local
65 ret = mscc_miim_wait_ready(miim); in mscc_miim_write()
71 MIIM_CMD_OPR_WRITE, miim->regs + MIIM_CMD); in mscc_miim_write()
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| D | servalt_switch.c | 134 static struct mscc_miim_dev miim[SERVALT_MIIM_BUS_COUNT]; variable
395 if (miim[i].miim_base == base && miim[i].miim_size == size) in get_mdiobus()
396 return miim[i].bus; in get_mdiobus()
436 memset(&miim, 0x0, sizeof(struct mscc_miim_dev) * in servalt_probe()
470 mscc_mdiobus_init(miim, &miim_count, addr_base, in servalt_probe()
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| D | serval_switch.c | 162 static struct mscc_miim_dev miim[SERVAL_MIIM_BUS_COUNT]; variable
461 if (miim[i].miim_base == base && miim[i].miim_size == size) in get_mdiobus()
462 return miim[i].bus; in get_mdiobus()
506 memset(&miim, 0x0, sizeof(miim) * SERVAL_MIIM_BUS_COUNT); in serval_probe()
541 mscc_mdiobus_init(miim, &miim_count, addr_base, in serval_probe()
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| D | luton_switch.c | 195 static struct mscc_miim_dev miim[LUTON_MIIM_BUS_COUNT]; variable
568 if (miim[i].miim_base == base && miim[i].miim_size == size) in get_mdiobus()
569 return miim[i].bus; in get_mdiobus()
632 memset(&miim, 0x0, sizeof(miim) * LUTON_MIIM_BUS_COUNT); in luton_probe()
667 mscc_mdiobus_init(miim, &miim_count, addr_base, in luton_probe()
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| D | ocelot_switch.c | 163 static struct mscc_miim_dev miim[OCELOT_MIIM_BUS_COUNT]; variable
504 if (miim[i].miim_base == base && miim[i].miim_size == size) in get_mdiobus()
505 return miim[i].bus; in get_mdiobus()
553 memset(&miim, 0x0, sizeof(struct mscc_miim_dev) * in ocelot_probe()
586 mscc_mdiobus_init(miim, &miim_count, addr_base, in ocelot_probe()
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| D | mscc_miim.h | 19 struct mii_dev *mscc_mdiobus_init(struct mscc_miim_dev *miim, int *miim_count,
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| D | jr2_switch.c | 277 static struct mscc_miim_dev miim[JR2_MIIM_BUS_COUNT]; variable
820 if (miim[i].miim_base == base && miim[i].miim_size == size) in get_mdiobus()
821 return miim[i].bus; in get_mdiobus()
866 memset(&miim, 0x0, sizeof(struct mscc_miim_dev) * JR2_MIIM_BUS_COUNT); in jr2_probe()
901 mscc_mdiobus_init(miim, &miim_count, addr_base, in jr2_probe()
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| /external/u-boot/drivers/net/ |
| D | pch_gbe.c | 342 if (readl(&mac_regs->miim) & PCH_GBE_MIIM_OPER_READY) in pch_gbe_mdio_ready()
354 u32 miim; in pch_gbe_mdio_read() local
359 miim = (addr << PCH_GBE_MIIM_PHY_ADDR_SHIFT) | in pch_gbe_mdio_read()
362 writel(miim, &mac_regs->miim); in pch_gbe_mdio_read()
367 return readl(&mac_regs->miim) & 0xffff; in pch_gbe_mdio_read()
374 u32 miim; in pch_gbe_mdio_write() local
379 miim = (addr << PCH_GBE_MIIM_PHY_ADDR_SHIFT) | in pch_gbe_mdio_write()
382 writel(miim, &mac_regs->miim); in pch_gbe_mdio_write()
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| D | pch_gbe.h | 258 u32 miim; member
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| /external/u-boot/arch/mips/dts/ |
| D | mscc,servalt.dtsi | 176 compatible = "mscc,jr2-miim";
184 compatible = "mscc,jr2-miim";
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| D | mscc,luton.dtsi | 146 compatible = "mscc,luton-miim";
154 compatible = "mscc,luton-miim";
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| D | mscc,jr2.dtsi | 272 compatible = "mscc,jr2-miim";
280 compatible = "mscc,jr2-miim";
288 compatible = "mscc,jr2-miim";
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| D | mscc,serval.dtsi | 184 compatible = "mscc,serval-miim";
192 compatible = "mscc,serval-miim";
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| D | mscc,ocelot.dtsi | 155 compatible = "mscc,ocelot-miim";
164 compatible = "mscc,ocelot-miim";
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