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Searched refs:mmio (Results 1 – 25 of 199) sorted by relevance

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/external/crosvm/devices/src/usb/xhci/
Dxhci_regs.rs150 let mut mmio = RegisterSpace::new(); in init_xhci_mmio_space_and_regs() localVariable
153 mmio.add_register( in init_xhci_mmio_space_and_regs()
161 mmio.add_register( in init_xhci_mmio_space_and_regs()
169 mmio.add_register( in init_xhci_mmio_space_and_regs()
178 mmio.add_register( in init_xhci_mmio_space_and_regs()
189 mmio.add_register( in init_xhci_mmio_space_and_regs()
203 mmio.add_register( in init_xhci_mmio_space_and_regs()
214 mmio.add_register( in init_xhci_mmio_space_and_regs()
223 mmio.add_register( in init_xhci_mmio_space_and_regs()
232 mmio.add_register( in init_xhci_mmio_space_and_regs()
[all …]
Dxhci_controller.rs86 mmio: RegisterSpace,
135 let (mmio, regs) = init_xhci_mmio_space_and_regs(); in init_when_forked()
154 mmio, in init_when_forked()
250 XhciControllerState::Initialized { mmio, .. } => { in read_bar()
252 mmio.read(addr - bar0, data); in read_bar()
268 mmio, fail_handle, .. in write_bar()
271 mmio.write(addr - bar0, data); in write_bar()
/external/u-boot/drivers/mtd/nand/raw/brcmnand/
Dbcm6368_nand.c41 void __iomem *mmio = priv->base + BCM6368_NAND_INT; in bcm6368_nand_intc_ack() local
42 u32 val = brcmnand_readl(mmio); in bcm6368_nand_intc_ack()
48 brcmnand_writel(val, mmio); in bcm6368_nand_intc_ack()
58 void __iomem *mmio = priv->base + BCM6368_NAND_INT; in bcm6368_nand_intc_set() local
59 u32 val = brcmnand_readl(mmio); in bcm6368_nand_intc_set()
69 brcmnand_writel(val, mmio); in bcm6368_nand_intc_set()
Dbcm6858_nand.c42 void __iomem *mmio = priv->base + BCM6858_NAND_INT; in bcm6858_nand_intc_ack() local
43 u32 val = brcmnand_readl(mmio); in bcm6858_nand_intc_ack()
49 brcmnand_writel(val, mmio); in bcm6858_nand_intc_ack()
60 void __iomem *mmio = priv->base + BCM6858_NAND_INT_EN; in bcm6858_nand_intc_set() local
61 u32 val = brcmnand_readl(mmio); in bcm6858_nand_intc_set()
71 brcmnand_writel(val, mmio); in bcm6858_nand_intc_set()
Dbcm6838_nand.c40 void __iomem *mmio = priv->base + BCM6838_NAND_INT; in bcm6838_nand_intc_ack() local
41 u32 val = brcmnand_readl(mmio); in bcm6838_nand_intc_ack()
47 brcmnand_writel(val, mmio); in bcm6838_nand_intc_ack()
58 void __iomem *mmio = priv->base + BCM6838_NAND_INT; in bcm6838_nand_intc_set() local
59 u32 val = brcmnand_readl(mmio); in bcm6838_nand_intc_set()
69 brcmnand_writel(val, mmio); in bcm6838_nand_intc_set()
Dbcm63158_nand.c42 void __iomem *mmio = priv->base + BCM63158_NAND_INT; in bcm63158_nand_intc_ack() local
43 u32 val = brcmnand_readl(mmio); in bcm63158_nand_intc_ack()
49 brcmnand_writel(val, mmio); in bcm63158_nand_intc_ack()
60 void __iomem *mmio = priv->base + BCM63158_NAND_INT_EN; in bcm63158_nand_intc_set() local
61 u32 val = brcmnand_readl(mmio); in bcm63158_nand_intc_set()
71 brcmnand_writel(val, mmio); in bcm63158_nand_intc_set()
/external/strace/tests/
Dioctl_kvm_run_common.c235 (unsigned long long) run->mmio.phys_addr, in run_kvm()
236 run->mmio.data[0], run->mmio.data[1], in run_kvm()
237 run->mmio.data[2], run->mmio.data[3], in run_kvm()
238 run->mmio.data[4], run->mmio.data[5], in run_kvm()
239 run->mmio.data[6], run->mmio.data[7], in run_kvm()
240 run->mmio.len, run->mmio.is_write); in run_kvm()
/external/strace/tests-m32/
Dioctl_kvm_run_common.c235 (unsigned long long) run->mmio.phys_addr, in run_kvm()
236 run->mmio.data[0], run->mmio.data[1], in run_kvm()
237 run->mmio.data[2], run->mmio.data[3], in run_kvm()
238 run->mmio.data[4], run->mmio.data[5], in run_kvm()
239 run->mmio.data[6], run->mmio.data[7], in run_kvm()
240 run->mmio.len, run->mmio.is_write); in run_kvm()
/external/strace/tests-mx32/
Dioctl_kvm_run_common.c235 (unsigned long long) run->mmio.phys_addr, in run_kvm()
236 run->mmio.data[0], run->mmio.data[1], in run_kvm()
237 run->mmio.data[2], run->mmio.data[3], in run_kvm()
238 run->mmio.data[4], run->mmio.data[5], in run_kvm()
239 run->mmio.data[6], run->mmio.data[7], in run_kvm()
240 run->mmio.len, run->mmio.is_write); in run_kvm()
/external/u-boot/drivers/video/
Datmel_lcdfb.c48 #define lcdc_readl(mmio, reg) __raw_readl((mmio)+(reg)) argument
49 #define lcdc_writel(mmio, reg, val) __raw_writel((val), (mmio)+(reg)) argument
54 return (ushort *)(panel_info.mmio + ATMEL_LCDC_LUT(0)); in configuration_get_cmap()
95 lcdc_writel(panel_info.mmio, ATMEL_LCDC_LUT(regno), in lcd_setcolreg()
98 lcdc_writel(panel_info.mmio, ATMEL_LCDC_LUT(regno), in lcd_setcolreg()
230 atmel_fb_init(panel_info.mmio, &timing, panel_info.vl_bpix, in lcd_ctrl_init()
/external/linux-kselftest/tools/testing/selftests/kvm/lib/aarch64/
Ducall.c98 run->mmio.phys_addr == (uint64_t)ucall_exit_mmio_addr) { in get_ucall()
101 TEST_ASSERT(run->mmio.is_write && run->mmio.len == 8, in get_ucall()
103 memcpy(&gva, run->mmio.data, sizeof(gva)); in get_ucall()
/external/u-boot/arch/riscv/dts/
Dae350_64.dts246 compatible = "virtio,mmio";
253 compatible = "virtio,mmio";
260 compatible = "virtio,mmio";
267 compatible = "virtio,mmio";
274 compatible = "virtio,mmio";
281 compatible = "virtio,mmio";
288 compatible = "virtio,mmio";
295 compatible = "virtio,mmio";
Dae350_32.dts246 compatible = "virtio,mmio";
253 compatible = "virtio,mmio";
260 compatible = "virtio,mmio";
267 compatible = "virtio,mmio";
274 compatible = "virtio,mmio";
281 compatible = "virtio,mmio";
288 compatible = "virtio,mmio";
295 compatible = "virtio,mmio";
/external/u-boot/drivers/ata/
Dahci.c178 void __iomem *mmio = uc_priv->mmio_base; in ahci_host_init() local
186 cap_save = readl(mmio + HOST_CAP); in ahci_host_init()
194 writel_with_flush(HOST_AHCI_EN, mmio + HOST_CTL); in ahci_host_init()
195 writel(cap_save, mmio + HOST_CAP); in ahci_host_init()
196 writel_with_flush(0xf, mmio + HOST_PORTS_IMPL); in ahci_host_init()
217 uc_priv->cap = readl(mmio + HOST_CAP); in ahci_host_init()
218 uc_priv->port_map = readl(mmio + HOST_PORTS_IMPL); in ahci_host_init()
233 uc_priv->port[i].port_mmio = ahci_port_base(mmio, i); in ahci_host_init()
314 writel(1 << i, mmio + HOST_IRQ_STAT); in ahci_host_init()
323 tmp = readl(mmio + HOST_CTL); in ahci_host_init()
[all …]
/external/igt-gpu-tools/man/
Dintel_reg.rst47 --mmio=FILE
76 dump [--mmio=FILE --devid=DEVID]
90 dump or read with the --mmio=FILE and --devid=DEVID parameters.
110 methods supported on all platforms are "mmio", "portio-vga", and "mmio-vga".
/external/u-boot/arch/arm/dts/
Dimx6qp.dtsi10 compatible = "mmio-sram";
16 compatible = "mmio-sram";
Darmada-xp.dtsi201 compatible = "mmio-sram";
210 compatible = "mmio-sram";
219 compatible = "mmio-sram";
Dat91sam9g20.dtsi24 compatible = "mmio-sram";
/external/crosvm/kvm/src/
Dlib.rs1192 let mmio = unsafe { &mut run.__bindgen_anon_1.mmio }; in set_data() localVariable
1193 if mmio.is_write != 0 { in set_data()
1196 let len = mmio.len as usize; in set_data()
1200 mmio.data[..len].copy_from_slice(data); in set_data()
1251 let mmio = unsafe { &run.__bindgen_anon_1.mmio }; in run() localVariable
1252 let address = mmio.phys_addr; in run()
1253 let size = min(mmio.len as usize, mmio.data.len()); in run()
1254 if mmio.is_write != 0 { in run()
1258 data: mmio.data, in run()
/external/u-boot/include/
Datmel_lcd.h44 u_long mmio; /* Memory mapped registers */ member
/external/u-boot/configs/
Dls2080a_emu_defconfig14 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=…
Dls1012afrwy_tfa_SECURE_BOOT_defconfig18 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250…
Dls1012afrwy_qspi_defconfig19 CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 quiet lpj=250…
/external/u-boot/board/freescale/ls2080a/
DREADME25 earlycon=uart8250,mmio,0x21c0600,115200 default_hugepagesz=2m hugepagesz=2m
/external/igt-gpu-tools/tests/i915/
Dgem_exec_latency.c621 volatile uint32_t *mmio; in clockrate() local
635 mmio = (volatile uint32_t *)((volatile char *)igt_global_mmio + reg); in clockrate()
638 r_start = *mmio; in clockrate()
644 r_end = *mmio; in clockrate()

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