| /external/libcxx/test/std/experimental/memory/memory.resource/memory.resource.eq/ |
| D | equal.pass.cpp | 29 ex::memory_resource const * mr1(nullptr); in main() local
31 static_assert(std::is_same<decltype(*mr1 == *mr2), bool>::value, ""); in main()
32 static_assert(noexcept(*mr1 == *mr2), ""); in main()
38 ex::memory_resource const & mr1 = r1; in main() local
41 assert(mr1 == mr2); in main()
45 assert(mr2 == mr1); in main()
52 ex::memory_resource const & mr1 = r1; in main() local
55 assert(mr1 == mr2); in main()
58 assert(mr2 == mr1); in main()
65 ex::memory_resource const & mr1 = r1; in main() local
[all …]
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| D | not_equal.pass.cpp | 28 ex::memory_resource const * mr1(nullptr); in main() local
30 static_assert(std::is_same<decltype(*mr1 != *mr2), bool>::value, ""); in main()
31 static_assert(noexcept(*mr1 != *mr2), ""); in main()
37 ex::memory_resource const & mr1 = r1; in main() local
40 assert(mr1 != mr2); in main()
44 assert(mr2 != mr1); in main()
52 ex::memory_resource const & mr1 = r1; in main() local
55 assert(!(mr1 != mr2)); in main()
59 assert(!(mr2 != mr1)); in main()
66 ex::memory_resource const & mr1 = r1; in main() local
[all …]
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| /external/arm-trusted-firmware/drivers/st/ddr/ |
| D | stm32mp1_ddr.c | 151 DDRPHY_REG_TIMING(mr1),
523 uint32_t mr1 = mmio_read_32((uintptr_t)&priv->phy->mr1); in stm32mp1_ddr3_dll_off() local
527 VERBOSE("mr1: 0x%x\n", mr1); in stm32mp1_ddr3_dll_off()
561 mr1 &= ~(BIT(9) | BIT(6) | BIT(2)); in stm32mp1_ddr3_dll_off()
562 stm32mp1_mode_register_write(priv, 1, mr1); in stm32mp1_ddr3_dll_off()
586 mr1 |= BIT(0); in stm32mp1_ddr3_dll_off()
587 stm32mp1_mode_register_write(priv, 1, mr1); in stm32mp1_ddr3_dll_off()
821 mmio_clrbits_32((uintptr_t)&priv->phy->mr1, BIT(0)); in stm32mp1_ddr_init()
823 (uintptr_t)&priv->phy->mr1, in stm32mp1_ddr_init()
824 mmio_read_32((uintptr_t)&priv->phy->mr1)); in stm32mp1_ddr_init()
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| /external/u-boot/board/ti/ks2_evm/ |
| D | ddr3_k2g.c | 31 .mr1 = 0x00000006ul,
71 .mr1 = 0x00000006ul,
132 .mr1 = 0x00000006ul,
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| D | ddr3_cfg.c | 29 .mr1 = 0x00000006ul,
|
| /external/u-boot/board/imgtec/ci20/ |
| D | ci20.c | 288 .mr1 = (DDR3_MR1_DIC_7 | DDR3_MR1_RTT_DIS | DDR3_MR1_DLL_DISABLE),
290 .mr1 = (DDR3_MR1_DIC_7 | DDR3_MR1_RTT_DIS),
332 .mr1 = (DDR3_MR1_DIC_7 | DDR3_MR1_RTT_DIS | DDR3_MR1_DLL_DISABLE),
334 .mr1 = (DDR3_MR1_DIC_7 | DDR3_MR1_RTT_DIS),
|
| /external/google-breakpad/src/common/windows/ |
| D | omap_unittest.cc | 40 bool operator==(const MappedRange& mr1, const MappedRange& mr2) { in operator ==() argument
41 return mr1.rva_original == mr2.rva_original && in operator ==()
42 mr1.rva_transformed == mr2.rva_transformed && in operator ==()
43 mr1.length == mr2.length && in operator ==()
44 mr1.injected == mr2.injected && in operator ==()
45 mr1.removed == mr2.removed; in operator ==()
|
| /external/libopus/celt/arm/ |
| D | kiss_fft_armv5e.h | 57 : [mr1]"=r"(mr1__), [mr2]"=r"(mr2__), [mi]"=r"(mi__), \
82 : [mr1]"=r"(mr1__), [mr2]"=r"(mr2__), [mi]"=r"(mi__), \
|
| /external/u-boot/arch/arm/mach-sunxi/ |
| D | dram_sun8i_a23.c | 38 .mr1 = 4,
115 writel(dram_para.mr1, &mctl_phy->mr1); in mctl_init()
200 writel((dram_para.mr0 << 16) | dram_para.mr1, &mctl_ctl->init3); in mctl_init()
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| D | dram_sun8i_a83t.c | 135 writel(MCTL_MR1, &mctl_ctl->mr1); in auto_set_timing_para()
140 writel(MCTL_LPDDR3_MR1, &mctl_ctl->mr1); in auto_set_timing_para()
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| D | dram_sun8i_a33.c | 134 writel(MCTL_MR1, &mctl_ctl->mr1); in auto_set_timing_para()
|
| /external/u-boot/arch/arm/mach-keystone/include/mach/ |
| D | ddr3.h | 29 unsigned int mr1; member
|
| /external/u-boot/arch/arm/include/asm/arch-sunxi/ |
| D | dram_sun8i_a23.h | 25 u32 mr1; member
185 u32 mr1; /* 0x58 mode register 1 */ member
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| D | dram_sun8i_a33.h | 75 u32 mr1; /* 0x34 */ member
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| D | dram_sun8i_a83t.h | 75 u32 mr1; /* 0x34 */ member
|
| D | dram_sun9i.h | 108 u32 mr1; /* 0xa0 mode register 1 */ member
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| D | dram_sun6i.h | 174 u32 mr1; /* 0x44 mode register 1 */ member
|
| /external/ethtool/ |
| D | ibm_emac.c | 41 u32 mr1; /* Reset */ member
184 p->mr0, p->mr1, p->rmr, in print_emac_regs()
|
| /external/autotest/server/site_tests/provision_CheetsUpdate/ |
| D | README.md | 8 (chroot) $ test_that IP provision_CheetsUpdate --args='value=git_nyc-mr1-arc/cheets_arm-user/488513…
|
| /external/arm-trusted-firmware/include/drivers/st/ |
| D | stm32mp1_ddr.h | 134 uint32_t mr1; member
|
| /external/u-boot/drivers/ram/stm32mp1/ |
| D | stm32mp1_ddr.h | 138 u32 mr1; member
|
| /external/u-boot/arch/arm/mach-keystone/ |
| D | ddr3_spd.c | 35 debug_ddr_cfg("mr1 0x%08X\n", ptr->mr1); in dump_phy_config()
350 spd_cb->phy_cfg.mr1 = 0 << 12 | 0 << 11 | 0 << 7 | 0 << 3 | in init_ddr3param()
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| /external/u-boot/arch/arm/mach-omap2/omap4/ |
| D | sdram_elpida.c | 308 .mr1 = MR1_BL_8_BT_SEQ_WRAP_EN_NWR_3,
|
| /external/u-boot/arch/mips/mach-jz47xx/jz4780/ |
| D | sdram.c | 75 writel(ddr_config->mr1, ddr_phy_regs + DDRP_MR1); in ddr_phy_init()
|
| /external/u-boot/arch/mips/mach-jz47xx/include/mach/ |
| D | jz4780_dram.h | 438 u16 mr1; /* Mode Register 1 */ member
|