| /external/u-boot/drivers/net/phy/ |
| D | mv88e6352.c | 32 static int sw_wait_rdy(const char *devname, u8 phy_addr) in sw_wait_rdy() argument
41 ret = miiphy_read(devname, phy_addr, COMMAND_REG, &command); in sw_wait_rdy()
56 static int sw_reg_read(const char *devname, u8 phy_addr, u8 port, in sw_reg_read() argument
62 ret = sw_wait_rdy(devname, phy_addr); in sw_reg_read()
69 ret = miiphy_write(devname, phy_addr, COMMAND_REG, command); in sw_reg_read()
73 ret = sw_wait_rdy(devname, phy_addr); in sw_reg_read()
77 ret = miiphy_read(devname, phy_addr, DATA_REG, data); in sw_reg_read()
82 static int sw_reg_write(const char *devname, u8 phy_addr, u8 port, in sw_reg_write() argument
88 ret = sw_wait_rdy(devname, phy_addr); in sw_reg_write()
93 ret = miiphy_write(devname, phy_addr, DATA_REG, data); in sw_reg_write()
[all …]
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| /external/u-boot/board/freescale/t104xrdb/ |
| D | eth.c | 23 int phy_addr = 0; in board_eth_init() local
70 phy_addr = CONFIG_SYS_SGMII1_PHY_ADDR; in board_eth_init()
72 phy_addr = CONFIG_SYS_SGMII2_PHY_ADDR; in board_eth_init()
74 phy_addr = CONFIG_SYS_SGMII3_PHY_ADDR; in board_eth_init()
75 fm_info_set_phy_address(i, phy_addr); in board_eth_init()
80 phy_addr = CONFIG_SYS_RGMII1_PHY_ADDR; in board_eth_init()
82 phy_addr = CONFIG_SYS_RGMII2_PHY_ADDR; in board_eth_init()
83 fm_info_set_phy_address(i, phy_addr); in board_eth_init()
111 phy_addr = CONFIG_SYS_FM1_QSGMII11_PHY_ADDR + i; in board_eth_init()
115 vsc9953_port_info_set_phy_address(i, phy_addr); in board_eth_init()
[all …]
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| /external/u-boot/drivers/net/ti/ |
| D | davinci_emac.c | 60 #define emac_gigabit_enable(phy_addr) davinci_eth_gigabit_enable(phy_addr) argument
62 #define emac_gigabit_enable(phy_addr) /* no gigabit to enable */ argument
72 static int gen_init_phy(int phy_addr);
73 static int gen_is_phy_connected(int phy_addr);
74 static int gen_get_link_speed(int phy_addr);
75 static int gen_auto_negotiate(int phy_addr);
207 int davinci_eth_phy_read(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t *data) in davinci_eth_phy_read() argument
217 ((phy_addr & 0x1f) << 16), in davinci_eth_phy_read()
233 int davinci_eth_phy_write(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t data) in davinci_eth_phy_write() argument
242 ((phy_addr & 0x1f) << 16) | in davinci_eth_phy_write()
[all …]
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| D | davinci_emac.h | 293 int davinci_eth_phy_read(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t *data);
294 int davinci_eth_phy_write(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t data);
298 int (*init)(int phy_addr);
299 int (*is_phy_connected)(int phy_addr);
300 int (*get_link_speed)(int phy_addr);
301 int (*auto_negotiate)(int phy_addr);
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| /external/u-boot/board/freescale/ls1088a/ |
| D | eth_ls1088aqds.c | 98 int phy_addr = 0; in sgmii_configure_repeater() local
131 phy_addr = 4; in sgmii_configure_repeater()
135 phy_addr = 0; in sgmii_configure_repeater()
139 phy_addr = 0xc; in sgmii_configure_repeater()
143 phy_addr = 8; in sgmii_configure_repeater()
155 ret = miiphy_write(dev, phy_addr, 0x1f, 3); in sgmii_configure_repeater()
160 ret = miiphy_read(dev, phy_addr, 0x11, &value); in sgmii_configure_repeater()
167 miiphy_write(dev, phy_addr, 0x1f, 0); in sgmii_configure_repeater()
201 ret = miiphy_read(dev, phy_addr, 0x11, &value); in sgmii_configure_repeater()
206 ret = miiphy_read(dev, phy_addr, 0x11, &value); in sgmii_configure_repeater()
[all …]
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| /external/u-boot/drivers/net/pfe_eth/ |
| D | pfe_mdio.c | 16 static int pfe_write_addr(struct mii_dev *bus, int phy_addr, int dev_addr, in pfe_write_addr() argument
26 phy = ((phy_addr & EMAC_MII_DATA_PA_MASK) << EMAC_MII_DATA_PA_SHIFT); in pfe_write_addr()
50 static int pfe_phy_read(struct mii_dev *bus, int phy_addr, int dev_addr, in pfe_phy_read() argument
64 pfe_write_addr(bus, phy_addr, dev_addr, reg_addr); in pfe_phy_read()
69 phy = ((phy_addr & EMAC_MII_DATA_PA_MASK) << EMAC_MII_DATA_PA_SHIFT); in pfe_phy_read()
100 phy_addr, reg_addr, val); in pfe_phy_read()
105 static int pfe_phy_write(struct mii_dev *bus, int phy_addr, int dev_addr, in pfe_phy_write() argument
118 pfe_write_addr(bus, phy_addr, dev_addr, reg_addr); in pfe_phy_write()
123 phy = ((phy_addr & EMAC_MII_DATA_PA_MASK) << EMAC_MII_DATA_PA_SHIFT); in pfe_phy_write()
149 debug("%s: phy: %02x reg:%02x val:%#x\n", __func__, phy_addr, in pfe_phy_write()
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| /external/u-boot/drivers/phy/marvell/ |
| D | comphy_a3700.c | 174 reg_set16(phy_addr(PCIE, LANE_CFG1), bf_use_max_pll_rate, 0); in comphy_pcie_power_up()
179 reg_set16(phy_addr(PCIE, GLOB_CLK_SRC_LO), bf_cfg_sel_20b, 0); in comphy_pcie_power_up()
184 reg_set16(phy_addr(PCIE, MISC_REG1), bf_sel_bits_pcie_force, 0); in comphy_pcie_power_up()
189 reg_set16(phy_addr(PCIE, PWR_MGM_TIM1), 0x10C, 0xFFFF); in comphy_pcie_power_up()
194 reg_set16(phy_addr(PCIE, UNIT_CTRL), 0x60 | rb_idle_sync_en, 0xFFFF); in comphy_pcie_power_up()
199 reg_set16(phy_addr(PCIE, MISC_REG0), in comphy_pcie_power_up()
213 reg_set16(phy_addr(PCIE, PWR_PLL_CTRL), 0xFC63, 0xFFFF); in comphy_pcie_power_up()
216 reg_set16(phy_addr(PCIE, PWR_PLL_CTRL), 0xFC62, 0xFFFF); in comphy_pcie_power_up()
222 reg_set16(phy_addr(PCIE, KVCO_CAL_CTRL), 0x0040 | rb_use_max_pll_rate, in comphy_pcie_power_up()
229 reg_set16(phy_addr(PCIE, SYNC_PATTERN), phy_txd_inv, 0); in comphy_pcie_power_up()
[all …]
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| /external/u-boot/drivers/net/ |
| D | uli526x.c | 136 u8 phy_addr; member
346 uli_phy_write(db->ioaddr, db->phy_addr, 0, 0x8000, db->chip_id); in uli526x_disable()
378 db->phy_addr = 1; in uli526x_init()
384 db->phy_addr = phy_tmp; in uli526x_init()
391 printf("%s(): db->phy_addr= 0x%x\n", __FUNCTION__, db->phy_addr); in uli526x_init()
402 db->phy_addr, 0, db->chip_id); in uli526x_init()
404 uli_phy_write(db->ioaddr, db->phy_addr, 0, in uli526x_init()
779 db->phy_addr, 4, db->chip_id) & ~0x01e0; in uli526x_set_phyxcer()
800 uli_phy_write(db->ioaddr, db->phy_addr, 4, phy_reg, db->chip_id); in uli526x_set_phyxcer()
803 uli_phy_write(db->ioaddr, db->phy_addr, 0, 0x1200, db->chip_id); in uli526x_set_phyxcer()
[all …]
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| D | dnet.c | 31 unsigned short phy_addr; member
75 dnet->phy_addr, reg, value); in dnet_mdio_write()
88 tmp |= (dnet->phy_addr << 8); in dnet_mdio_write()
114 value = (dnet->phy_addr << 8); in dnet_mdio_read()
128 dnet->phy_addr, reg, value); in dnet_mdio_read()
251 dnet->phy_addr = i; in dnet_phy_init()
359 int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr) in dnet_eth_initialize() argument
375 dnet->phy_addr = phy_addr; in dnet_eth_initialize()
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| D | mcfmii.c | 143 return info->phy_addr; in mii_discover_phy()
237 info->phy_addr = mii_discover_phy(dev); in __mii_init()
243 miiphy_read(dev->name, info->phy_addr, MII_BMCR, &status); in __mii_init()
254 miiphy_read(dev->name, info->phy_addr, MII_BMSR, &status); in __mii_init()
265 info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16; in __mii_init()
266 info->dup_spd |= miiphy_speed(dev->name, info->phy_addr); in __mii_init()
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| D | ftgmac100.c | 80 u32 phy_addr; member
96 static int ftgmac100_mdio_read(struct mii_dev *bus, int phy_addr, int dev_addr, in ftgmac100_mdio_read() argument
106 FTGMAC100_PHYCR_PHYAD(phy_addr) | in ftgmac100_mdio_read()
116 priv->phydev->dev->name, phy_addr, reg_addr); in ftgmac100_mdio_read()
125 static int ftgmac100_mdio_write(struct mii_dev *bus, int phy_addr, int dev_addr, in ftgmac100_mdio_write() argument
135 FTGMAC100_PHYCR_PHYAD(phy_addr) | in ftgmac100_mdio_write()
148 priv->phydev->dev->name, phy_addr, reg_addr); in ftgmac100_mdio_write()
217 phydev = phy_connect(priv->bus, priv->phy_addr, dev, priv->phy_mode); in ftgmac100_phy_init()
546 priv->phy_addr = 0; in ftgmac100_probe()
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| D | macb.c | 122 unsigned short phy_addr; member
449 macb_mdio_write(macb, macb->phy_addr, MII_ADVERTISE, adv); in macb_phy_reset()
451 macb_mdio_write(macb, macb->phy_addr, MII_BMCR, (BMCR_ANENABLE in macb_phy_reset()
455 status = macb_mdio_read(macb, macb->phy_addr, MII_BMSR); in macb_phy_reset()
475 macb->phy_addr = i; in macb_phy_find()
476 phy_id = macb_mdio_read(macb, macb->phy_addr, MII_PHYSID1); in macb_phy_find()
594 phy_id = macb_mdio_read(macb, macb->phy_addr, MII_PHYSID1); in macb_phy_init()
602 macb->phydev = phy_connect(macb->bus, macb->phy_addr, dev, in macb_phy_init()
606 macb->phydev = phy_connect(macb->bus, macb->phy_addr, &macb->netdev, in macb_phy_init()
617 status = macb_mdio_read(macb, macb->phy_addr, MII_BMSR); in macb_phy_init()
[all …]
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| D | armada100_fec.c | 59 static int smi_reg_read(struct mii_dev *bus, int phy_addr, int devad, in smi_reg_read() argument
68 if (phy_addr == PHY_ADR_REQ && phy_reg == PHY_ADR_REQ) { in smi_reg_read()
75 if (phy_addr > PHY_MASK) { in smi_reg_read()
77 __func__, phy_addr); in smi_reg_read()
92 writel((phy_addr << 16) | (phy_reg << 21) | SMI_OP_R, ®s->smi); in smi_reg_read()
107 static int smi_reg_write(struct mii_dev *bus, int phy_addr, int devad, in smi_reg_write() argument
114 if (phy_addr == PHY_ADR_REQ && phy_reg == PHY_ADR_REQ) { in smi_reg_write()
120 if (phy_addr > PHY_MASK) { in smi_reg_write()
135 writel((phy_addr << 16) | (phy_reg << 21) | SMI_OP_W | (value & 0xffff), in smi_reg_write()
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| /external/u-boot/board/freescale/t1040qds/ |
| D | eth.c | 444 int phy_addr; in board_eth_init() local
505 phy_addr = 0; in board_eth_init()
515 phy_addr = CONFIG_SYS_FM1_QSGMII21_PHY_ADDR + in board_eth_init()
528 phy_addr = CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR in board_eth_init()
531 phy_addr = CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR; in board_eth_init()
541 phy_addr = CONFIG_SYS_FM1_QSGMII11_PHY_ADDR + in board_eth_init()
550 phy_addr = CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR in board_eth_init()
581 vsc9953_port_info_set_phy_address(i, phy_addr); in board_eth_init()
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| /external/u-boot/arch/arm/mach-rockchip/ |
| D | make_fit_atf.py | 50 def append_bl31_node(file, atf_index, phy_addr, elf_entry): argument
52 data = 'bl31_0x%08x.bin' % phy_addr
60 file.write('\t\t\tload = <0x%08x>;\n' % phy_addr)
66 def append_tee_node(file, atf_index, phy_addr, elf_entry): argument
68 data = 'tee_0x%08x.bin' % phy_addr
76 file.write('\t\t\tload = <0x%08x>;\n' % phy_addr)
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| D | sdram.c | 23 s64 phy_addr; member
29 s64 phy_addr; member
54 gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr in dram_init_banksize()
56 gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr + in dram_init_banksize()
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| /external/u-boot/drivers/net/ldpaa_eth/ |
| D | ldpaa_wriop.c | 39 dpmac_info[dpmac_id].phy_addr[phy_num] = -1; in wriop_init_dpmac()
52 dpmac_info[dpmac_id].phy_addr[phy_num] = -1; in wriop_init_dpmac_enet_if()
138 dpmac_info[i].phy_addr[phy_num] = address; in wriop_set_phy_address()
152 return dpmac_info[i].phy_addr[phy_num]; in wriop_get_phy_address()
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| /external/u-boot/drivers/net/mscc_eswitch/ |
| D | servalt_switch.c | 116 size_t phy_addr; member
402 size_t phy_addr, struct mii_dev *bus) in add_port_entry() argument
404 priv->ports[index].phy_addr = phy_addr; in add_port_entry()
417 size_t phy_addr; in servalt_probe() local
455 phy_addr = res.start; in servalt_probe()
475 add_port_entry(priv, i, phy_addr, bus); in servalt_probe()
484 phy_connect(priv->ports[i].bus, priv->ports[i].phy_addr, dev, in servalt_probe()
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| D | ocelot_switch.c | 151 size_t phy_addr; member
511 size_t phy_addr, struct mii_dev *bus, in add_port_entry() argument
514 priv->ports[index].phy_addr = phy_addr; in add_port_entry()
534 size_t phy_addr; in ocelot_probe() local
571 phy_addr = res.start; in ocelot_probe()
596 add_port_entry(priv, i, phy_addr, bus, 0xff, 0xff); in ocelot_probe()
598 add_port_entry(priv, i, phy_addr, bus, phandle.args[1], in ocelot_probe()
609 priv->ports[i].phy_addr, dev, in ocelot_probe()
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| D | luton_switch.c | 169 size_t phy_addr; member
575 size_t phy_addr, struct mii_dev *bus, in add_port_entry() argument
578 priv->ports[index].phy_addr = phy_addr; in add_port_entry()
593 size_t phy_addr; in luton_probe() local
652 phy_addr = res.start; in luton_probe()
677 add_port_entry(priv, i, phy_addr, bus, 0xff, 0xff); in luton_probe()
679 add_port_entry(priv, i, phy_addr, bus, phandle.args[1], in luton_probe()
688 priv->ports[i].phy_addr, dev, in luton_probe()
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| D | serval_switch.c | 136 size_t phy_addr; member
468 size_t phy_addr, struct mii_dev *bus, in add_port_entry() argument
471 priv->ports[index].phy_addr = phy_addr; in add_port_entry()
486 size_t phy_addr; in serval_probe() local
526 phy_addr = res.start; in serval_probe()
553 add_port_entry(priv, i, phy_addr, bus, phandle.args[1], in serval_probe()
562 priv->ports[i].phy_addr, dev, in serval_probe()
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| /external/u-boot/board/freescale/ls2080aqds/ |
| D | eth.c | 255 int phy_addr = 0; in qsgmii_configure_repeater() local
296 phy_addr = 0; in qsgmii_configure_repeater()
304 phy_addr = 4; in qsgmii_configure_repeater()
312 phy_addr = 8; in qsgmii_configure_repeater()
320 phy_addr = 0xc; in qsgmii_configure_repeater()
326 ret = miiphy_write(dev, phy_addr, 0x1f, 3); in qsgmii_configure_repeater()
328 ret = miiphy_read(dev, phy_addr, 0x11, &value); in qsgmii_configure_repeater()
330 ret = miiphy_read(dev, phy_addr, 0x11, &value); in qsgmii_configure_repeater()
363 ret = miiphy_read(dev, phy_addr, 0x11, &value); in qsgmii_configure_repeater()
367 ret = miiphy_read(dev, phy_addr, 0x11, &value); in qsgmii_configure_repeater()
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| /external/u-boot/board/ti/am335x/ |
| D | board.c | 638 int phy_addr; in ft_board_setup() local
663 phy_addr = cpsw_get_slave_phy_addr(ethdev, i); in ft_board_setup()
669 if (phy_id[1] != phy_addr) { in ft_board_setup()
671 alias, phy_id[1], phy_addr); in ft_board_setup()
674 phy_id[1] = cpu_to_fdt32(phy_addr); in ft_board_setup()
688 if (ret != phy_addr) { in ft_board_setup()
690 alias, ret, phy_addr); in ft_board_setup()
693 cpu_to_fdt32(phy_addr)); in ft_board_setup()
889 .phy_addr = 0,
894 .phy_addr = 1,
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| /external/u-boot/board/freescale/mpc837xemds/ |
| D | mpc837xemds.c | 142 int phy_addr) in __ft_tsec_fixup() argument
177 phy_addr = cpu_to_fdt32(phy_addr); in __ft_tsec_fixup()
178 err = fdt_setprop(blob, off, "reg", &phy_addr, sizeof(phy_addr)); in __ft_tsec_fixup()
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| /external/u-boot/arch/arm/cpu/armv7/ls102xa/ |
| D | cpu.c | 100 static inline void set_pgtable(u32 *page_table, u32 index, u32 phy_addr) in set_pgtable() argument
102 u32 value = phy_addr | PMD_TYPE_TABLE; in set_pgtable()
109 static inline void set_pgsection(u32 *page_table, u32 index, u64 phy_addr, in set_pgsection() argument
114 value = phy_addr | PMD_TYPE_SECT | PMD_SECT_AF; in set_pgsection()
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