| /external/libevent/ |
| D | event_iocp.c | 66 struct event_iocp_port *port = port_; in loop() local
67 long ms = port->ms; in loop()
68 HANDLE p = port->port; in loop()
79 EnterCriticalSection(&port->lock); in loop()
80 if (port->shutdown) { in loop()
81 if (--port->n_live_threads == 0) in loop()
82 ReleaseSemaphore(port->shutdownSemaphore, 1, in loop()
84 LeaveCriticalSection(&port->lock); in loop()
87 LeaveCriticalSection(&port->lock); in loop()
95 EnterCriticalSection(&port->lock); in loop()
[all …]
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| /external/selinux/libsepol/src/ |
| D | port_record.c | 63 const sepol_port_t * port, in hidden_def()
68 (handle, port->low, port->high, port->proto, key_ptr) < 0) { in hidden_def()
71 sepol_port_get_proto_str(port->proto), in hidden_def()
72 port->low, port->high); in hidden_def()
85 int sepol_port_compare(const sepol_port_t * port, const sepol_port_key_t * key) in sepol_port_compare() argument
88 if ((port->low == key->low) && in sepol_port_compare()
89 (port->high == key->high) && (port->proto == key->proto)) in sepol_port_compare()
92 if (port->low < key->low) in sepol_port_compare()
95 else if (key->low < port->low) in sepol_port_compare()
98 else if (port->high < key->high) in sepol_port_compare()
[all …]
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| /external/u-boot/arch/powerpc/cpu/mpc8xxx/ |
| D | srio.c | 72 static int srio_erratum_a004034(u8 port) in srio_erratum_a004034() argument
84 >> (12 - port * 4)) & 0x3; in srio_erratum_a004034()
86 .port[port].pccsr) >> 27) & 0x7; in srio_erratum_a004034()
105 .port[port].pescsr) & 0x2) { in srio_erratum_a004034()
121 .port[port].pccsr, in srio_erratum_a004034()
127 setbits_be32((void *)&srio_regs->impl.port[port].pcr, in srio_erratum_a004034()
134 if (port) in srio_erratum_a004034()
180 out_be32((void *)&srio_regs->impl.port[port].slcsr, in srio_erratum_a004034()
183 clrbits_be32((void *)&srio_regs->impl.port[port].pcr, in srio_erratum_a004034()
187 .port[port].pccsr, in srio_erratum_a004034()
[all …]
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| /external/u-boot/drivers/serial/ |
| D | serial_sh.c | 23 static int scif_rxfill(struct uart_port *port) in scif_rxfill() argument
25 return sci_in(port, SCRFDR) & 0xff; in scif_rxfill()
28 static int scif_rxfill(struct uart_port *port) in scif_rxfill() argument
30 if ((port->mapbase == 0xffe00000) || in scif_rxfill()
31 (port->mapbase == 0xffe08000)) { in scif_rxfill()
33 return sci_in(port, SCRFDR) & 0xff; in scif_rxfill()
36 return sci_in(port, SCFDR) & SCIF2_RFDC_MASK; in scif_rxfill()
40 static int scif_rxfill(struct uart_port *port) in scif_rxfill() argument
42 return sci_in(port, SCFDR) & SCIF_RFDC_MASK; in scif_rxfill()
46 static void sh_serial_init_generic(struct uart_port *port) in sh_serial_init_generic() argument
[all …]
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| D | serial_sh.h | 18 # define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ argument
30 # define SCSCR_INIT(port) (((port)->type == PORT_SCI) ? \ argument
40 # define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ argument
49 # define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ argument
58 # define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ argument
66 # define SCSCR_INIT(port) 0x38 argument
73 # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ argument
80 # define SCSCR_INIT(port) 0x3a argument
91 # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ argument
100 # define SCSCR_INIT(port) (port->clk_mode == EXT_CLK ? 0x32 : 0x30) argument
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| /external/u-boot/drivers/bios_emulator/ |
| D | besys.c | 249 #define IS_TIMER_PORT(port) (0x40 <= port && port <= 0x43) argument
250 #define IS_CMOS_PORT(port) (0x70 <= port && port <= 0x71) argument
252 #define IS_VGA_PORT(port) (0x3C0 <= port && port <= 0x3DA) argument
253 #define IS_PCI_PORT(port) (0xCF8 <= port && port <= 0xCFF) argument
254 #define IS_SPKR_PORT(port) (port == 0x61) argument
267 static u8 VGA_inpb (const int port) in VGA_inpb() argument
271 debug_io("vga_inb.%04X -> ", (u16) port); in VGA_inpb()
272 switch (port) { in VGA_inpb()
343 static void VGA_outpb (int port, u8 val) in VGA_outpb() argument
345 switch (port) { in VGA_outpb()
[all …]
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| D | biosemui.h | 131 #define PM_inpb(port) inb(port+VIDEO_IO_OFFSET) argument
132 #define PM_inpw(port) inw(port+VIDEO_IO_OFFSET) argument
133 #define PM_inpd(port) inl(port+VIDEO_IO_OFFSET) argument
134 #define PM_outpb(port,val) outb(val,port+VIDEO_IO_OFFSET) argument
135 #define PM_outpw(port,val) outw(val,port+VIDEO_IO_OFFSET) argument
136 #define PM_outpd(port,val) outl(val,port+VIDEO_IO_OFFSET) argument
138 #define LOG_inpb(port) PM_inpb(port) argument
139 #define LOG_inpw(port) PM_inpw(port) argument
140 #define LOG_inpd(port) PM_inpd(port) argument
141 #define LOG_outpb(port,val) PM_outpb(port,val) argument
[all …]
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| /external/u-boot/arch/arm/cpu/arm926ejs/mx27/ |
| D | generic.c | 210 unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT; in imx_gpio_mode() local
218 writel(readl(®s->port[port].puen) | (1 << pin), in imx_gpio_mode()
219 ®s->port[port].puen); in imx_gpio_mode()
221 writel(readl(®s->port[port].puen) & ~(1 << pin), in imx_gpio_mode()
222 ®s->port[port].puen); in imx_gpio_mode()
227 writel(readl(®s->port[port].gpio_dir) | 1 << pin, in imx_gpio_mode()
228 ®s->port[port].gpio_dir); in imx_gpio_mode()
230 writel(readl(®s->port[port].gpio_dir) & ~(1 << pin), in imx_gpio_mode()
231 ®s->port[port].gpio_dir); in imx_gpio_mode()
236 writel(readl(®s->port[port].gpr) | (1 << pin), in imx_gpio_mode()
[all …]
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| /external/u-boot/drivers/ata/ |
| D | sata_sil3114.c | 39 static struct sata_port port[CONFIG_SYS_SATA_MAX_DEVICE]; variable
60 port[num].dev_mask = 1; in sata_bus_softreset()
62 port[num].ctl_reg = 0x08; /*Default value of control reg */ in sata_bus_softreset()
63 writeb (port[num].ctl_reg, port[num].ioaddr.ctl_addr); in sata_bus_softreset()
65 writeb (port[num].ctl_reg | ATA_SRST, port[num].ioaddr.ctl_addr); in sata_bus_softreset()
67 writeb (port[num].ctl_reg, port[num].ioaddr.ctl_addr); in sata_bus_softreset()
78 status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 300, 0); in sata_bus_softreset()
81 status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 3, 0); in sata_bus_softreset()
90 status = sata_chk_status (&port[num].ioaddr, 0); in sata_bus_softreset()
96 port[num].dev_mask = 0; in sata_bus_softreset()
[all …]
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| /external/tensorflow/tensorflow/stream_executor/platform/default/ |
| D | dso_loader.h | 37 port::StatusOr<void*> GetCudaDriverDsoHandle();
38 port::StatusOr<void*> GetCudaRuntimeDsoHandle();
39 port::StatusOr<void*> GetCublasDsoHandle();
40 port::StatusOr<void*> GetCufftDsoHandle();
41 port::StatusOr<void*> GetCurandDsoHandle();
42 port::StatusOr<void*> GetCusolverDsoHandle();
43 port::StatusOr<void*> GetCusparseDsoHandle();
44 port::StatusOr<void*> GetCuptiDsoHandle();
45 port::StatusOr<void*> GetCudnnDsoHandle();
46 port::StatusOr<void*> GetNvInferDsoHandle();
[all …]
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| D | dso_loader.cc | 38 port::StatusOr<void*> GetDsoHandle(const string& name, const string& version) { in GetDsoHandle()
39 auto filename = port::Env::Default()->FormatLibraryFileName(name, version); in GetDsoHandle()
41 port::Status status = in GetDsoHandle()
42 port::Env::Default()->LoadLibrary(filename.c_str(), &dso_handle); in GetDsoHandle()
56 return port::Status(port::error::FAILED_PRECONDITION, message); in GetDsoHandle()
61 port::StatusOr<void*> GetCudaDriverDsoHandle() { in GetCudaDriverDsoHandle()
75 port::StatusOr<void*> GetCudaRuntimeDsoHandle() { in GetCudaRuntimeDsoHandle()
79 port::StatusOr<void*> GetCublasDsoHandle() { in GetCublasDsoHandle()
83 port::StatusOr<void*> GetCufftDsoHandle() { in GetCufftDsoHandle()
87 port::StatusOr<void*> GetCusolverDsoHandle() { in GetCusolverDsoHandle()
[all …]
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| /external/u-boot/drivers/misc/ |
| D | smsc_sio1007.c | 11 static inline u8 sio1007_read(int port, int reg) in sio1007_read() argument
13 outb(reg, port); in sio1007_read()
15 return inb(port + 1); in sio1007_read()
18 static inline void sio1007_write(int port, int reg, int val) in sio1007_write() argument
20 outb(reg, port); in sio1007_write()
21 outb(val, port + 1); in sio1007_write()
24 static inline void sio1007_clrsetbits(int port, int reg, u8 clr, u8 set) in sio1007_clrsetbits() argument
26 sio1007_write(port, reg, (sio1007_read(port, reg) & ~clr) | set); in sio1007_clrsetbits()
29 void sio1007_enable_serial(int port, int num, int iobase, int irq) in sio1007_enable_serial() argument
35 outb(0x55, port); in sio1007_enable_serial()
[all …]
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| /external/u-boot/drivers/net/ |
| D | mvpp2.c | 68 #define MVPP2_RX_DATA_FIFO_SIZE_REG(port) (0x00 + 4 * (port)) argument
69 #define MVPP2_RX_ATTR_FIFO_SIZE_REG(port) (0x20 + 4 * (port)) argument
74 #define MVPP2_RX_CTRL_REG(port) (0x140 + 4 * (port)) argument
95 #define MVPP2_PRS_PORT_LU_MASK(port) (0xff << ((port) * 4)) argument
96 #define MVPP2_PRS_PORT_LU_VAL(port, val) ((val) << ((port) * 4)) argument
97 #define MVPP2_PRS_INIT_OFFS_REG(port) (0x1004 + ((port) & 4)) argument
98 #define MVPP2_PRS_INIT_OFF_MASK(port) (0x3f << (((port) % 4) * 8)) argument
99 #define MVPP2_PRS_INIT_OFF_VAL(port, val) ((val) << (((port) % 4) * 8)) argument
100 #define MVPP2_PRS_MAX_LOOP_REG(port) (0x100c + ((port) & 4)) argument
101 #define MVPP2_PRS_MAX_LOOP_MASK(port) (0xff << (((port) % 4) * 8)) argument
[all …]
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| /external/u-boot/arch/m68k/include/asm/ |
| D | io.h | 46 #define insb(port, buf, ns) _insb((u8 *)((port)+_IO_BASE), (buf), (ns)) argument
47 #define outsb(port, buf, ns) _outsb((u8 *)((port)+_IO_BASE), (buf), (ns)) argument
48 #define insw(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) argument
49 #define outsw(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) argument
50 #define insl(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) argument
51 #define outsl(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) argument
53 #define inb(port) in_8((u8 *)((port)+_IO_BASE)) argument
54 #define outb(val, port) out_8((u8 *)((port)+_IO_BASE), (val)) argument
56 #define inw(port) in_be16((u16 *)((port)+_IO_BASE)) argument
57 #define outw(val, port) out_be16((u16 *)((port)+_IO_BASE), (val)) argument
[all …]
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| /external/u-boot/arch/arm/mach-mvebu/serdes/axp/ |
| D | board_env_spec.h | 130 #define SATA_BASE_REG(port) (0xA2000 + (port)*0x2000) argument
132 #define SATA_PWR_PLL_CTRL_REG(port) (SATA_BASE_REG(port) + 0x804) argument
133 #define SATA_DIG_LP_ENA_REG(port) (SATA_BASE_REG(port) + 0x88C) argument
134 #define SATA_REF_CLK_SEL_REG(port) (SATA_BASE_REG(port) + 0x918) argument
135 #define SATA_COMPHY_CTRL_REG(port) (SATA_BASE_REG(port) + 0x920) argument
136 #define SATA_LP_PHY_EXT_CTRL_REG(port) (SATA_BASE_REG(port) + 0x058) argument
137 #define SATA_LP_PHY_EXT_STAT_REG(port) (SATA_BASE_REG(port) + 0x05C) argument
138 #define SATA_IMP_TX_SSC_CTRL_REG(port) (SATA_BASE_REG(port) + 0x810) argument
139 #define SATA_GEN_1_SET_0_REG(port) (SATA_BASE_REG(port) + 0x834) argument
140 #define SATA_GEN_1_SET_1_REG(port) (SATA_BASE_REG(port) + 0x838) argument
[all …]
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| /external/libchrome/mojo/core/ports/ |
| D | node.cc | 82 bool CanAcceptMoreMessages(const Port* port) { in CanAcceptMoreMessages() argument
85 uint64_t next_sequence_num = port->message_queue.next_sequence_num(); in CanAcceptMoreMessages()
86 if (port->state == Port::kClosed) in CanAcceptMoreMessages()
88 if (port->peer_closed || port->remove_proxy_on_last_message) { in CanAcceptMoreMessages()
89 if (port->last_sequence_num_to_receive == next_sequence_num - 1) in CanAcceptMoreMessages()
133 auto* port = locker.port(); in CanShutdownCleanly() local
134 if (port->peer_node_name != name_ && port->state != Port::kReceiving) { in CanShutdownCleanly()
138 << port->peer_node_name << " is blocking shutdown of " in CanShutdownCleanly()
139 << "node " << name_ << " (state=" << port->state << ")"; in CanShutdownCleanly()
170 scoped_refptr<Port> port(new Port(kInitialSequenceNum, kInitialSequenceNum)); in CreateUninitializedPort() local
[all …]
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| /external/u-boot/arch/x86/include/asm/arch-quark/ |
| D | msg_port.h | 44 void msg_port_setup(int op, int port, int reg);
54 u32 msg_port_read(u8 port, u32 reg);
63 void msg_port_write(u8 port, u32 reg, u32 value);
73 u32 msg_port_alt_read(u8 port, u32 reg);
82 void msg_port_alt_write(u8 port, u32 reg, u32 value);
92 u32 msg_port_io_read(u8 port, u32 reg);
101 void msg_port_io_write(u8 port, u32 reg, u32 value);
108 #define msg_port_generic_clrsetbits(type, port, reg, clr, set) \ argument
109 msg_port_##type##_write(port, reg, \
110 (msg_port_##type##_read(port, reg) \
[all …]
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| /external/autotest/server/cros/servo/ |
| D | pd_console.py | 180 def execute_pd_state_cmd(self, port): argument
194 pd_cmd = cmd +" " + str(port) + " " + subcmd
207 (port, key))
239 def get_pd_state(self, port): argument
246 pd_dict = self.execute_pd_state_cmd(port)
249 def get_pd_port(self, port): argument
255 pd_dict = self.execute_pd_state_cmd(port)
258 def get_pd_role(self, port): argument
264 pd_dict = self.execute_pd_state_cmd(port)
267 def get_pd_flags(self, port): argument
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| /external/tensorflow/tensorflow/compiler/xla/service/interpreter/ |
| D | executor.h | 57 port::Status Init(int device_ordinal, DeviceOptions device_options) override { in Init()
58 return port::Status::OK(); in Init()
61 port::Status GetKernel(const MultiKernelLoaderSpec &spec, in GetKernel()
63 return port::UnimplementedError("Not Implemented"); in GetKernel()
65 port::Status Launch(Stream *stream, const ThreadDim &thread_dims, in Launch()
68 return port::UnimplementedError("Not Implemented"); in Launch()
93 port::Status MemZero(Stream *stream, DeviceMemoryBase *location, in MemZero()
95 return port::InternalError("Interpreter can not memzero"); in MemZero()
97 port::Status Memset(Stream *stream, DeviceMemoryBase *location, uint8 pattern, in Memset()
99 return port::InternalError("Interpreter can not memset"); in Memset()
[all …]
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| /external/u-boot/arch/powerpc/include/asm/ |
| D | io.h | 43 #define insb(port, buf, ns) _insb((u8 *)((port)+_IO_BASE), (buf), (ns)) argument
44 #define outsb(port, buf, ns) _outsb((u8 *)((port)+_IO_BASE), (buf), (ns)) argument
45 #define insw(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) argument
46 #define outsw(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) argument
47 #define insl(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) argument
48 #define outsl(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) argument
50 #define inb(port) in_8((u8 *)((port)+_IO_BASE)) argument
51 #define outb(val, port) out_8((u8 *)((port)+_IO_BASE), (val)) argument
53 #define inw(port) in_be16((u16 *)((port)+_IO_BASE)) argument
54 #define outw(val, port) out_be16((u16 *)((port)+_IO_BASE), (val)) argument
[all …]
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| /external/selinux/libsemanage/src/ |
| D | port_record.c | 27 int semanage_port_compare(const semanage_port_t * port, in semanage_port_compare() argument
31 return sepol_port_compare(port, key); in semanage_port_compare()
36 int semanage_port_compare2(const semanage_port_t * port, in hidden_def()
40 return sepol_port_compare2(port, port2); in hidden_def()
45 hidden int semanage_port_compare2_qsort(const semanage_port_t ** port, in hidden_def()
49 return sepol_port_compare2(*port, *port2); in hidden_def()
61 const semanage_port_t * port, in semanage_port_key_extract() argument
65 return sepol_port_key_extract(handle->sepolh, port, key_ptr); in semanage_port_key_extract()
79 int semanage_port_get_proto(const semanage_port_t * port) in hidden_def()
82 return sepol_port_get_proto(port); in hidden_def()
[all …]
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| /external/autotest/client/site_tests/usbpd_GFU/ |
| D | usbpd_GFU.py | 65 def _is_gfu(self, port): argument
72 return port.is_amode_supported(self.GOOGLE_VID)
74 def _is_in_rw(self, port): argument
81 flash_info = port.get_flash_info()
95 def _modify_rw(self, port, rw=None, tries=3): argument
117 port.ec_command('flashpd 0 %d %s' % (port.index, rw),
126 if rw != '/dev/null' and not self._is_in_rw(port):
128 port.index)
135 msg = self._reader.get_last_msg([r'%s.*is in RO' % port.index,
140 port.index)
[all …]
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| /external/u-boot/arch/xtensa/include/asm/ |
| D | io.h | 59 #define inb(port) readb((u8 *)((port))) argument
60 #define outb(val, port) writeb((val), (u8 *)((unsigned long)(port))) argument
61 #define inw(port) readw((u16 *)((port))) argument
62 #define outw(val, port) writew((val), (u16 *)((unsigned long)(port))) argument
63 #define inl(port) readl((u32 *)((port))) argument
64 #define outl(val, port) writel((val), (u32 *)((unsigned long)(port))) argument
66 #define inb_p(port) inb((port)) argument
67 #define outb_p(val, port) outb((val), (port)) argument
68 #define inw_p(port) inw((port)) argument
69 #define outw_p(val, port) outw((val), (port)) argument
[all …]
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| /external/u-boot/drivers/net/fm/ |
| D | init.c | 116 static int fm_port_to_index(enum fm_port port) in fm_port_to_index() argument
121 if (fm_info[i].port == port) in fm_port_to_index()
140 enet_if = fman_port_enet_if(fm_info[i].port); in fman_enet_init()
152 void fm_disable_port(enum fm_port port) in fm_disable_port() argument
154 int i = fm_port_to_index(port); in fm_disable_port()
161 fman_disable_port(port); in fm_disable_port()
165 void fm_enable_port(enum fm_port port) in fm_enable_port() argument
167 int i = fm_port_to_index(port); in fm_enable_port()
173 fman_enable_port(port); in fm_enable_port()
176 void fm_info_set_mdio(enum fm_port port, struct mii_dev *bus) in fm_info_set_mdio() argument
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| /external/u-boot/drivers/pci/ |
| D | pcie_mediatek.c | 101 static void mtk_pcie_port_free(struct mtk_pcie_port *port) in mtk_pcie_port_free() argument
103 list_del(&port->list); in mtk_pcie_port_free()
104 free(port); in mtk_pcie_port_free()
107 static int mtk_pcie_startup_port(struct mtk_pcie_port *port) in mtk_pcie_startup_port() argument
109 struct mtk_pcie *pcie = port->pcie; in mtk_pcie_startup_port()
110 u32 slot = PCI_DEV(port->slot << 11); in mtk_pcie_startup_port()
115 setbits_le32(pcie->base + PCIE_SYS_CFG, PCIE_PORT_PERST(port->slot)); in mtk_pcie_startup_port()
117 clrbits_le32(pcie->base + PCIE_SYS_CFG, PCIE_PORT_PERST(port->slot)); in mtk_pcie_startup_port()
120 err = readl_poll_timeout(port->base + PCIE_LINK_STATUS, val, in mtk_pcie_startup_port()
127 PCIE_PORT_INT_EN(port->slot)); in mtk_pcie_startup_port()
[all …]
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