| /external/arm-trusted-firmware/drivers/st/ddr/ |
| D | stm32mp1_ddr.c | 55 DDRCTL_REG_REG(pwrctl),
594 mmio_setbits_32((uintptr_t)&priv->ctl->pwrctl, in stm32mp1_ddr3_dll_off()
597 (uintptr_t)&priv->ctl->pwrctl, in stm32mp1_ddr3_dll_off()
598 mmio_read_32((uintptr_t)&priv->ctl->pwrctl)); in stm32mp1_ddr3_dll_off()
650 mmio_clrbits_32((uintptr_t)&priv->ctl->pwrctl, in stm32mp1_ddr3_dll_off()
678 mmio_clrbits_32((uintptr_t)&ctl->pwrctl, DDRCTRL_PWRCTL_POWERDOWN_EN); in stm32mp1_refresh_disable()
685 uint32_t rfshctl3, uint32_t pwrctl) in stm32mp1_refresh_restore() argument
692 if ((pwrctl & DDRCTRL_PWRCTL_POWERDOWN_EN) != 0U) { in stm32mp1_refresh_restore()
693 mmio_setbits_32((uintptr_t)&ctl->pwrctl, in stm32mp1_refresh_restore()
905 config->c_reg.pwrctl); in stm32mp1_ddr_init()
|
| /external/u-boot/drivers/ram/stm32mp1/ |
| D | stm32mp1_tuning.c | 1283 u32 pwrctl = readl(&ctl->pwrctl); in do_read_dqs_gating() local
1288 stm32mp1_refresh_restore(ctl, rfshctl3, pwrctl); in do_read_dqs_gating()
1298 u32 pwrctl = readl(&ctl->pwrctl); in do_bit_deskew() local
1303 stm32mp1_refresh_restore(ctl, rfshctl3, pwrctl); in do_bit_deskew()
1313 u32 pwrctl = readl(&ctl->pwrctl); in do_eye_training() local
1318 stm32mp1_refresh_restore(ctl, rfshctl3, pwrctl); in do_eye_training()
|
| D | stm32mp1_ddr.c | 75 DDRCTL_REG_REG(pwrctl),
642 clrbits_le32(&ctl->pwrctl, DDRCTRL_PWRCTL_POWERDOWN_EN); in stm32mp1_refresh_disable()
648 u32 rfshctl3, u32 pwrctl) in stm32mp1_refresh_restore() argument
653 if (pwrctl & DDRCTRL_PWRCTL_POWERDOWN_EN) in stm32mp1_refresh_restore()
654 setbits_le32(&ctl->pwrctl, DDRCTRL_PWRCTL_POWERDOWN_EN); in stm32mp1_refresh_restore()
805 config->c_reg.pwrctl); in stm32mp1_ddr_init()
|
| D | stm32mp1_ddr.h | 46 u32 pwrctl; member
180 u32 pwrctl);
|
| D | stm32mp1_ddr_regs.h | 21 u32 pwrctl; /* 0x30 Low Power Control*/ member
|
| /external/u-boot/drivers/ram/rockchip/ |
| D | sdram_rk3328.c | 236 u32 pwrctl; in data_training() local
240 pwrctl = readl(pctl_base + DDR_PCTL2_PWRCTL); in data_training()
250 writel(pwrctl, pctl_base + DDR_PCTL2_PWRCTL); in data_training()
|
| D | sdram_px30.c | 345 u32 pwrctl; in data_training() local
349 pwrctl = readl(pctl_base + DDR_PCTL2_PWRCTL); in data_training()
359 writel(pwrctl, pctl_base + DDR_PCTL2_PWRCTL); in data_training()
|
| /external/arm-trusted-firmware/include/drivers/st/ |
| D | stm32mp1_ddr.h | 43 uint32_t pwrctl; member
|
| D | stm32mp1_ddr_regs.h | 24 uint32_t pwrctl; /* 0x30 Low Power Control */ member
|
| /external/u-boot/arch/arm/include/asm/arch-sunxi/ |
| D | dram_sun8i_a33.h | 67 u32 pwrctl; /* 0x04 */ member
|
| D | dram_sunxi_dw.h | 83 u32 pwrctl; /* 0x04 */ member
|
| D | dram_sun8i_a83t.h | 67 u32 pwrctl; /* 0x04 */ member
|
| D | dram_sun9i.h | 50 u32 pwrctl; /* 0x30 low power control register */ member
|
| D | dram_sun50i_h6.h | 84 u32 pwrctl; /* 0x030 unused */ member
|
| D | dram_sun8i_a23.h | 102 u32 pwrctl; /* 0x30 */ member
|
| /external/u-boot/arch/arm/mach-sunxi/ |
| D | dram_sun8i_a23.c | 216 writel(0x00000002, &mctl_ctl->pwrctl); in mctl_init()
|
| /external/u-boot/arch/arm/include/asm/arch-imx8m/ |
| D | ddr.h | 81 u32 pwrctl; member
|