Searched refs:rd_reg (Results 1 – 7 of 7) sorted by relevance
/external/v8/src/execution/mips64/ |
D | simulator-mips64.cc | 3677 SetResult(rd_reg(), rt() == 0 ? rs() : 0); in DecodeTypeRegisterSPECIAL() 3681 SetResult(rd_reg(), rt() != 0 ? rs() : 0); in DecodeTypeRegisterSPECIAL() 3696 int32_t return_addr_reg = rd_reg(); in DecodeTypeRegisterSPECIAL() 3706 SetResult(rd_reg(), static_cast<int32_t>(rt()) << sa()); in DecodeTypeRegisterSPECIAL() 3709 SetResult(rd_reg(), rt() << sa()); in DecodeTypeRegisterSPECIAL() 3712 SetResult(rd_reg(), rt() << sa() << 32); in DecodeTypeRegisterSPECIAL() 3730 SetResult(rd_reg(), alu_out); in DecodeTypeRegisterSPECIAL() 3746 SetResult(rd_reg(), alu_out); in DecodeTypeRegisterSPECIAL() 3763 SetResult(rd_reg(), alu_out); in DecodeTypeRegisterSPECIAL() 3766 SetResult(rd_reg(), (int32_t)rt() >> sa()); in DecodeTypeRegisterSPECIAL() [all …]
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D | simulator-mips64.h | 483 inline int32_t rd_reg() const { return instr_.RdValue(); } in rd_reg() function 494 inline void SetResult(const int32_t rd_reg, const int64_t alu_out) { in SetResult() argument 495 set_register(rd_reg, alu_out); in SetResult()
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/external/u-boot/drivers/spi/ |
D | cadence_qspi_apb.c | 536 unsigned int rd_reg; in cadence_qspi_apb_indirect_read_setup() local 561 rd_reg = cmdbuf[0] << CQSPI_REG_RD_INSTR_OPCODE_LSB; in cadence_qspi_apb_indirect_read_setup() 565 rd_reg |= CQSPI_INST_TYPE_QUAD << CQSPI_REG_RD_INSTR_TYPE_DATA_LSB; in cadence_qspi_apb_indirect_read_setup() 577 rd_reg |= (1 << CQSPI_REG_RD_INSTR_MODE_EN_LSB); in cadence_qspi_apb_indirect_read_setup() 590 rd_reg |= (dummy_clk & CQSPI_REG_RD_INSTR_DUMMY_MASK) in cadence_qspi_apb_indirect_read_setup() 594 writel(rd_reg, plat->regbase + CQSPI_REG_RD_INSTR); in cadence_qspi_apb_indirect_read_setup()
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/external/v8/src/execution/mips/ |
D | simulator-mips.cc | 3754 SetResult(rd_reg(), rt() == 0 ? rs() : 0); in DecodeTypeRegisterSPECIAL() 3758 SetResult(rd_reg(), rt() != 0 ? rs() : 0); in DecodeTypeRegisterSPECIAL() 3772 int32_t return_addr_reg = rd_reg(); in DecodeTypeRegisterSPECIAL() 3784 SetResult(rd_reg(), static_cast<int32_t>(alu_out)); in DecodeTypeRegisterSPECIAL() 3797 SetResult(rd_reg(), static_cast<int32_t>(alu_out)); in DecodeTypeRegisterSPECIAL() 3801 SetResult(rd_reg(), static_cast<int32_t>(alu_out)); in DecodeTypeRegisterSPECIAL() 3805 SetResult(rd_reg(), static_cast<int32_t>(alu_out)); in DecodeTypeRegisterSPECIAL() 3818 SetResult(rd_reg(), static_cast<int32_t>(alu_out)); in DecodeTypeRegisterSPECIAL() 3821 SetResult(rd_reg(), rt() >> rs()); in DecodeTypeRegisterSPECIAL() 3831 SetResult(rd_reg(), (rs() << (lsa_sa() + 1)) + rt()); in DecodeTypeRegisterSPECIAL() [all …]
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D | simulator-mips.h | 470 inline int32_t rd_reg() const { return instr_.RdValue(); } in rd_reg() function 481 inline void SetResult(int32_t rd_reg, int32_t alu_out) { in SetResult() argument 482 set_register(rd_reg, alu_out); in SetResult()
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/external/v8/src/codegen/mips/ |
D | assembler-mips.cc | 617 uint32_t rd_reg = static_cast<uint32_t>(rd.code()); in IsAddu() local 622 rd_reg == rd_field && rs_reg == rs_field && rt_reg == rt_field; in IsAddu() 630 uint32_t rd_reg = static_cast<uint32_t>(rd.code()); in IsMov() local 634 bool res = opcode == SPECIAL && function_field == OR && rd_field == rd_reg && in IsMov()
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/external/v8/src/codegen/mips64/ |
D | assembler-mips64.cc | 540 uint32_t rd_reg = static_cast<uint32_t>(rd.code()); in IsMov() local 544 bool res = opcode == SPECIAL && function_field == OR && rd_field == rd_reg && in IsMov()
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